# Copyright (c) 2026 Eclipse ThreadX contributors # SPDX-License-Identifier: MIT # Portions of this file were generated with AI assistance. target_sources(${PROJECT_NAME} PRIVATE # {{BEGIN_TARGET_SOURCES}} ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_context_restore.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_context_save.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_nesting_end.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_nesting_start.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_irq_nesting_end.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_irq_nesting_start.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_vectored_context_save.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S ${CMAKE_CURRENT_LIST_DIR}/src/tx_port_offset_check.c # {{END_TARGET_SOURCES}} ) target_include_directories(${PROJECT_NAME} SYSTEM PUBLIC ${CMAKE_CURRENT_LIST_DIR}/inc ) # Lazy floating-point context save and restore. PUBLIC because the assembly # in the library and the application must agree: the flag changes which # registers the context switch saves, so a mismatched application would either # lose floating-point state or misread the thread control block. Requires a # floating-point ABI, so pair it with -DTX_R52_FLOAT_ABI=hard. option(TX_R52_ENABLE_VFP "Build with lazy VFP context save/restore" OFF) # FIQ support and interrupt nesting. These change which registers the # assembly saves and what tx_port.h reports in TX_PORT_SPECIFIC_BUILD_OPTIONS, # so like the VFP flag they must be PUBLIC: library and application have to # agree. FIQ nesting additionally requires FIQ support. option(TX_R52_ENABLE_FIQ "Build with FIQ support" OFF) option(TX_R52_ENABLE_IRQ_NESTING "Build with nested IRQ support" OFF) option(TX_R52_ENABLE_FIQ_NESTING "Build with nested FIQ support" OFF) if(TX_R52_ENABLE_FIQ) target_compile_definitions(${PROJECT_NAME} PUBLIC TX_ENABLE_FIQ_SUPPORT) endif() if(TX_R52_ENABLE_IRQ_NESTING) target_compile_definitions(${PROJECT_NAME} PUBLIC TX_ENABLE_IRQ_NESTING) endif() if(TX_R52_ENABLE_FIQ_NESTING) if(NOT TX_R52_ENABLE_FIQ) message(FATAL_ERROR "TX_R52_ENABLE_FIQ_NESTING requires TX_R52_ENABLE_FIQ: nested FIQ " "handling is meaningless without FIQ support compiled in.") endif() target_compile_definitions(${PROJECT_NAME} PUBLIC TX_ENABLE_FIQ_NESTING) endif() if(TX_R52_ENABLE_VFP) if(NOT TX_R52_FLOAT_ABI STREQUAL "hard") message(FATAL_ERROR "TX_R52_ENABLE_VFP requires TX_R52_FLOAT_ABI=hard, but it is " "'${TX_R52_FLOAT_ABI}'. TX_ENABLE_VFP_SUPPORT enables the VMRS, " "VSTMDB and VLDMIA blocks in the port assembly, and a soft float " "ABI leaves the assembler with no FPU to accept them, so this " "combination fails to assemble. Use -DTX_R52_FLOAT_ABI=hard.") endif() target_compile_definitions(${PROJECT_NAME} PUBLIC TX_ENABLE_VFP_SUPPORT) endif() # Armv8-R AEM FVP example builds (boot check now, kernel demo from AR1/M2). # Off by default so the default build stays a pure static-library build. option(TX_R52_BUILD_FVP_EXAMPLE "Build the Armv8-R AEM FVP example targets" OFF) if(TX_R52_BUILD_FVP_EXAMPLE) add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/example_build/fvp_baser_aemv8r) endif() # NXP S32Z280-594EVB example build. Separate option from the FVP example so # that FVP regression stays green while silicon bring-up is in progress, and so # neither build can perturb the other: the two boards differ in reset state, # memory map and instruction set at reset. option(TX_R52_BUILD_S32Z280_EXAMPLE "Build the NXP S32Z280-594EVB example targets" OFF) if(TX_R52_BUILD_S32Z280_EXAMPLE) add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/example_build/s32z280_evb) endif()