tinyusb.git/.github/workflows/ci_set_matrix.py, branch worktree-ch569-hydrausb3

ch32h417: register in CI matrix, lwIP throughput, docs and presets

2026-07-11T22:02:59Z

Final integration for the CH32H417 port. - .github/workflows/ci_set_matrix.py: add ch32h417 (riscv-gcc) so CI builds it. - examples/device/net_lwip_webserver: enable LWIP_HIGH_THROUGHPUT for the H417 (SuperSpeed iperf). - docs/reference/{boards,dependencies}.rst + hw/bsp/BoardPresets.json: regenerated for the new board and dependency. usbtest quirks intentionally left at 0 for the H417: its endpoint engine fixes the two CH569 5 Gbps silicon limitations (RB_EP_TX/RX_HALT gives a repeatable STALL for case 13; the reworked EP0/chain path is expected free of the wLength%4==1 ctrl_out drop), so the H417 targets a full 30/30 at SuperSpeed rather than 27/27. The HIL entry (test/hil/tinyusb.json) is deliberately deferred: it needs the chip's ESIG unique id read from the board on first flash, which is pending hardware access. Co-Authored-By: Claude Opus 4.8 (1M context) Claude-Session: https://claude.ai/code/session_01QWhrtHjbSVMKcY68vxBwBm

Switch CH569 port to the official openwch/ch569 SDK

2026-07-07T16:08:19Z

Replace the hydrausb3/wch-ch56x-bsp dependency with WCH's official EVT (openwch/ch569 @0424d2968); rename the family hw/bsp/ch56x -> hw/bsp/ch569 to match. Adaptations for the EVT layout and API: - family.cmake/mk: EVT/EXAM/SRC paths (Peripheral/src|inc, RVMSIS, Startup) - CH56xSFR.H case-wrapper (EVT includes the uppercase name, which breaks case-sensitive filesystems) - debug_uart: official UART1_BaudRateCfg + explicit TXD1/RXD1 pin setup (the EVT has no pin-configuring UART init) - family.c: .dmadata (RAMX) zeroing moved into board_init (EVT startup only clears .bss) and a self-contained SPI-ROM reader for the factory unique ID (the EVT flash API is a binary blob, not linked) - dcd_ch56x_usbhs.c: plain volatile casts instead of hydrausb3-only pointer typedefs - -Wno-comment for the EVT's nested header comments Validated: full 19-example CMake sweep + Make build green, 65/65 unit tests, pre-commit clean; on HydraUSB3 hardware cdc_msc_throughput enumerates at SuperSpeed 5000M with MSC 124/110 MB/s read/write (direct-IO dd). Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE

Add CH569/CH565 family with HydraUSB3 v1 board and USB2 HS dcd

2026-07-07T03:49:55Z

- OPT_MCU_CH569 (2250) + tusb_mcu.h capability block: USB3 SuperSpeed (USBSS) or USB2 HighSpeed (USBHS) selected at compile time via CFG_TUD_WCH_USBIP_USB30/USBHS, both on rhport 0 - New dcd_ch56x_usbhs.c: CH56x USB2 HS device driver ported from dcd_ch32_usbhs.c (same bit encoding, CH56x-specific register layout: R8_UEPn_MOD enables, different DMA/MAX_LEN/control offsets, 8 EPs). Internals exposed as ch56x_usb2_* (dcd_ch56x.h) for the upcoming USB3 dcd's runtime fallback. USB DMA only reaches RAMX: buffers in the .dmadata section, non-RAMX transfer buffers bounce per-endpoint - hw/bsp/ch56x family (SDK dep hydrausb3/wch-ch56x-bsp, Apache-2.0, no binary blobs) + hydrausb3_v1 board: 120 MHz clock (required for USB3), UART1 PA8/PA7 logging, LED PB22, button PB23, linker script with 16-byte aligned NOLOAD .dmadata section in RAMX - SPEED=high|super build option (default high until the USB3 dcd lands) - CI: add ch56x to riscv-gcc matrix; skip FreeRTOS/audio/video examples (as CH583) and msc_dual_lun (16 KB RAMS, as SAMD11/MKL25) Verified: cdc_msc builds via CMake and Make; full example sweep green; .dmadata lands at 0x20020000 (RAMX) with 16-byte alignment. Co-Authored-By: Claude Fable 5

hw/bsp+wch: rename the CH58x family to ch583 and OPT_MCU_CH58X to OPT_MCU_CH583

2026-06-22T08:23:08Z

The BSP family and MCU option were named "ch58x"/"CH58X", but the supported part is the CH583/CH582 (and the SDK repo is openwch/ch583); CH585 is a separate MCU family, so the CH58x umbrella was misleading. Rename to the specific family: - hw/bsp/ch58x -> hw/bsp/ch583 (dir), and the BSP-local files ch58x_it.* -> ch583_it.*, system_ch58x.* -> system_ch583.* (include guards/refs updated). The vendor SDK files (CH58x_common.h, CH58x_*.c in hw/mcu/wch/ch583) keep their names. - OPT_MCU_CH58X -> OPT_MCU_CH583 in tusb_option.h, tusb_mcu.h, and the shared WCH USBFS driver (ch32_usbfs_reg.h, dcd_ch32_usbfs.c). OPT_MCU_CH582 is kept as an alias (same value), so either name selects the same code. - FAMILY_MCUS CH58X -> CH583, CFG_TUSB_MCU=OPT_MCU_CH583, mcu:CH58X -> mcu:CH583 in the example skip lists, the CI build matrix (ci_set_matrix.py), the get_deps family tag, and docs/reference/boards.rst. Board names (ch582m_evt, yd-ch582m) are unchanged. Verified: make + cmake build for ch582m_evt, and ci.lan HIL (all device examples pass). Co-Authored-By: Claude Opus 4.8 (1M context)

Merge remote-tracking branch 'origin/master' into add-ch58x-usbfs

2026-06-18T08:31:03Z

add stm32c5 support

2026-05-10T12:17:00Z

Signed-off-by: HiFiPHile

ci: add ch58x to build matrix (riscv-gcc)

2026-03-18T07:23:28Z

update rx65n_target: correct pin configuration and remove unused USB interrupt definitions

2026-03-14T05:58:41Z

migrate kinetis_k32l build system to new mcux-devices paths

2026-03-13T17:11:45Z

add ft9xx-gcc toolchain support to CI

2026-03-13T16:01:38Z