tinyusb.git/examples/device/hid_composite_freertos/src, branch 0.18.0 Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/tinyusb.git/atom/examples/device/hid_composite_freertos/src?h=0.18.0 2024-11-21T10:49:38Z - move freertos_hooks to board.c 2024-11-21T10:49:38Z hathach thach@tinyusb.org 2024-11-21T10:49:38Z urn:sha1:dbdc5a239c42e96eeeb8759a121798fa9b3f39c3 - add device/midi_test_freertos example - update bth/dfu/midi device for cache line size move core init code to dwc2 common. update/correct build for esppressif 2024-10-15T10:55:24Z hathach thach@tinyusb.org 2024-10-15T10:55:24Z urn:sha1:4012e150757b517620465d93a22b0787c6400c5d change the tusb_rhport_init_t struct, exclude the rhport to make API more consistent 2024-10-14T11:27:52Z hathach thach@tinyusb.org 2024-10-14T11:27:52Z urn:sha1:1f18be93db39dbc57bbf34f982dbe07e209a2ae3 change tusb_init(), tusb_rhport_init() to use init struct for expandability 2024-10-11T06:41:53Z hathach thach@tinyusb.org 2024-10-11T05:58:18Z urn:sha1:92602b9de3675c2d3e240bcd0838082e1a07b13b add new tusb_int_handler(rhport, in_isr) as common irq handler 2024-10-10T09:28:36Z hathach thach@tinyusb.org 2024-10-10T09:22:12Z urn:sha1:57aac432b52df6d284c98daf591e661d1c55aa05 update tusb_init() to take rhport and role, defined as macro with optional argument for backward compatible Make FreeRTOS config work with Cortex-M33. 2024-06-27T18:46:44Z HiFiPhile admin@hifiphile.com 2024-06-27T18:45:37Z urn:sha1:fbe025190cf65e16b756c428f84bb8b22b8aa3eb adding support for esp32 for use with max3421e host 2024-04-25T13:23:40Z hathach thach@tinyusb.org 2024-04-25T13:23:40Z urn:sha1:2e995d7cf4b2971e3ca7167a097b99832c8d61ce Renesas RX controllers: Recover the previous state of the system write protect register in functions that are called within init-code 2024-04-09T05:15:32Z Matthias Schär matthias.schaer@jennyscience.ch 2022-07-28T11:25:39Z urn:sha1:bd67fdf01108304061f9dfaf4aa8624bb2a731ef Revert "Fixed behavior of the PRCR register. Previous write protection will be recovered." 2024-04-09T05:14:27Z Matthias Schär matthias.schaer@jennyscience.ch 2022-07-28T11:11:15Z urn:sha1:385611c5a9157569205986550022dee090f26c2f This reverts commit 4d7296109e31690972d8cf09e6138131938cb0ed. Fixed behavior of the PRCR register. Previous write protection will be recovered. 2024-04-09T05:13:38Z Matthias Schär matthias.schaer@jennyscience.ch 2022-07-28T11:01:36Z urn:sha1:5c7876d4444de25942778728d377ec77f74a75dd