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<title>tinyusb.git/hw/bsp/ch583, branch claude/add-systemview-debug</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-09-03T21:21:57Z</updated>
<entry>
<title>sysview: share the WCH RTT configuration and interrupt lock</title>
<updated>2026-09-03T21:21:57Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-08-11T10:07:44Z</published>
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<id>urn:sha1:95ec96b2962ebe57a43902495fd76e40dfb5558d</id>
<content type='text'>
One sysview_rtt_conf_wch.h serves every WCH family instead of a per-family
copy; ch583 keeps its own RTT lock header because its interrupt controller
needs a different masking sequence than the ch32v parts.
</content>
</entry>
<entry>
<title>sysview: take the timestamp from a BSP hardware timer where the core has no DWT</title>
<updated>2026-09-03T21:21:57Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-09-03T10:14:28Z</published>
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<id>urn:sha1:5a0d707dd96ae7821d97793b441b86aabb684855</id>
<content type='text'>
Cortex-M0/M0+, the WCH RISC-V parts and MAX3266x have no usable DWT cycle
counter, so their family.c provides SEGGER_SYSVIEW_X_GetTimestamp() from a
free-running hardware timer: a 32-bit general-purpose timer on ST parts
(sysview_stm32_tim2.h), SysTick-extended sources on the M0 families, the
core's SysTick-equivalent on WCH with the documented ordered read of the
split count registers (sysview_wch_timestamp.h), and a TMR on MAX3266x
(sysview_max32_tmr.h).

max32666fthr's DWT implements only watchpoint comparators (DWT_CTRL.NOCYCCNT=1
read live; UG6971 documents no DWT/trace at all), so SystemView's ARMv7-M
default read 0xE0001004 as a frozen 0 and every duration decoded as zero. The
TMR runs at 48 MHz (f_PCLK = f_SYS_CLK/2; Continuous mode, CMP=0xFFFFFFFF,
prescaler 1 - UG6971 15.2 guarantees TMRn_CNT readable while counting); TMR0
by default - present on every MAX32 part, unused by the examples, FreeRTOS
ticks on SysTick - overridable with -DSYSVIEW_MAX32_TMR=n. The family builds
SystemView with SEGGER_SYSVIEW_CORE_OTHER and sets CFG_TUSB_SYSVIEW_TIMESTAMP_BSP,
a tusb_sysview.c opt-in for ARMv7-M parts without CYCCNT where the BSP also
reports the rate via SEGGER_SYSVIEW_X_GetTimestampFreq(); the fixed-1MHz
microsecond contract is unreachable on a powers-of-two-only prescaler.
SEGGER_SYSVIEW_X_GetInterruptId() gains the ICSR.VECTACTIVE read for
CORE_OTHER builds. MAX32650/32690 use different GCR clock-gate names and stay
unported. Measured on the rig: seven host-timed 1.000 s gaps at
1.00044-1.00091 (median +0.05%).

stm32f0 refuses to configure SYSVIEW for stm32f070xb at CMake time: that
variant has no TIM2 at all, and the alternative was an undefined-reference
link error with no hint.

The shared hw/bsp/sysview_*.h join ci_select rule 16's hw/bsp file list
(cross-family build files, compiled only under -DSYSVIEW which no CI leg
enables), mirrored in the spec's rule table, so master's classification
guard resolves them on both axes.
</content>
</entry>
<entry>
<title>bsp, hil: flash WCH boards with the unified OpenOCD fork (#3791)</title>
<updated>2026-07-28T05:50:28Z</updated>
<author>
<name>Ha Thach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-28T05:50:28Z</published>
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<id>urn:sha1:1d915b6b59cb88f14344521db1f9345d8c7dc9a7</id>
<content type='text'>
bsp, hil: flash with the unified OpenOCD fork

https://github.com/hathach/openocd (branch tinyusb) is mainline plus every
config these boards need: RPi RP2350, ADI max32/max78, the MounRiver WCH
configs, and the wlinke adapter on mainline's riscv target. It is a superset
of the vendor forks, so one 'openocd' covers all boards; -DOPENOCD=/OPENOCD=
still select another, msdk's when MAXIM_PATH is set.

Drops family_flash_openocd_wch and the OPENOCD_WCH pair, dedups
family_flash_openocd_adi, aligns ch583's work area, and points hil at the
flasher's own config instead of generating one per probe.

Verified: HIL green on all four WCH boards and max32666fthr.</content>
</entry>
<entry>
<title>hw/bsp+wch: rename the CH58x family to ch583 and OPT_MCU_CH58X to OPT_MCU_CH583</title>
<updated>2026-06-22T08:23:08Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-06-22T08:23:08Z</published>
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<id>urn:sha1:eda704ca1acef9691b51e17026765f497b1fffbe</id>
<content type='text'>
The BSP family and MCU option were named "ch58x"/"CH58X", but the supported part is
the CH583/CH582 (and the SDK repo is openwch/ch583); CH585 is a separate MCU family,
so the CH58x umbrella was misleading. Rename to the specific family:

- hw/bsp/ch58x -&gt; hw/bsp/ch583 (dir), and the BSP-local files ch58x_it.* -&gt;
  ch583_it.*, system_ch58x.* -&gt; system_ch583.* (include guards/refs updated). The
  vendor SDK files (CH58x_common.h, CH58x_*.c in hw/mcu/wch/ch583) keep their names.
- OPT_MCU_CH58X -&gt; OPT_MCU_CH583 in tusb_option.h, tusb_mcu.h, and the shared WCH
  USBFS driver (ch32_usbfs_reg.h, dcd_ch32_usbfs.c). OPT_MCU_CH582 is kept as an
  alias (same value), so either name selects the same code.
- FAMILY_MCUS CH58X -&gt; CH583, CFG_TUSB_MCU=OPT_MCU_CH583, mcu:CH58X -&gt; mcu:CH583 in
  the example skip lists, the CI build matrix (ci_set_matrix.py), the get_deps family
  tag, and docs/reference/boards.rst.

Board names (ch582m_evt, yd-ch582m) are unchanged. Verified: make + cmake build for
ch582m_evt, and ci.lan HIL (all device examples pass).

Co-Authored-By: Claude Opus 4.8 (1M context) &lt;noreply@anthropic.com&gt;
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