tinyusb.git/hw/bsp/ra/family.c, branch codex/class-reference-docsUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/tinyusb.git/atom/hw/bsp/ra/family.c?h=codex%2Fclass-reference-docs2026-07-24T11:38:40Zaddress #3787 reviews: bsp fixes, script hardening, board-note accuracy2026-07-24T11:38:40Zhathachthach@tinyusb.org2026-07-24T11:38:40Zurn:sha1:e65368ea16975710f029f7ff7e2089b9ea90186d
Bot findings (Copilot/Codex): no-op board_trace_pinmux stubs for
lpcxpresso18s37/43s67 (TRACE_ETM otherwise broke their build), SAME70
ID_PIOD clock enable, capture-script duplicate BeforeTargetConnect on the
RA references, profile-script support for --no-timestamps itraces.
Deep review (whole branch): same70_xplained board row + caveat restored,
stale pico2 72 MHz claim corrected to the shipped 48, explicit
SetTracePortWidth(4) in the three references that relied on Ozone's
default, coverage-cell guard, median-based SysTick calibration, dead
session flag removed, stale RA8M1 divider comment fixed (0x02 = /4 is the
validated chip max) and the debugger guard indented.
EVKB bench findings: only R1884/D3 remains open (D1/D2 meter-verified);
RT1176 trace width is 1 or 4 only - J-Link arms the CSSYS TPIU and its
own sampler at 4-bit for any width>=2 request; a powered MCU-Link USB
breaks the external probe even with JP4 shorted.
ra: TRACE_ETM for ra6m5_ek and ra8m1_ek2026-07-24T08:56:14Zhathachthach@tinyusb.org2026-07-24T08:28:53Zurn:sha1:4d9e4c9e3895b0c15a04763028d1becd27bbf89c
Generic TRCKCR setup gated on DHCSR.C_DEBUGEN (a standalone-boot TRCKCR
write wedges the chip un-attachable until power-cycle), two-step write per
the hardware manual. ra6m5_ek: div-4 (25 MHz pin) - div-2 is dead on this
board at every width/timing; J9 must be closed. ra8m1_ek: chip-max
120 MHz TRCLK / 60 MHz pin via the committed JLinkScript whose empty
OnTraceStart defers the trace clock to firmware (J-Link's from-reset
enable steps the clock mid-stream at the FSP MOCO-to-PLL switch);
ReadIntoTraceCache covers runtime ROM execution. J9 closed on both EKs -
open = SWD contention up to apparent bricks.
make board_uart_read()/write() return -1 when unimplemented for consistency across all families2026-04-04T14:32:39Zhathachthach@tinyusb.org2026-04-04T14:32:39Zurn:sha1:9838a231ad9bff623a3ec819d05aad4a4087193breplace board_millis() with tusb_time_millis_api()2026-02-27T17:01:40Zhathachthach@tinyusb.org2026-02-27T16:51:36Zurn:sha1:8444c25ab6bc841bad81fd04afc1e66a9d57a115bsp: Disable SysTick ISR if FreeRTOS is enabled2025-11-25T15:30:32ZZixun LIadmin@hifiphile.com2025-11-25T14:54:45Zurn:sha1:8221ea220bb523b3d8c6bab915a968477a228a16embed metadata to family.c and board.h to generate supported boards doc2024-12-27T02:11:09Zhathachthach@tinyusb.org2024-12-27T02:11:09Zurn:sha1:6a36c74b10b25f1455d83ba473fff52a9dbcc6d2update build for ra8m1: usbfs work, but usbhs not working just yet. Probably missing configuration or clock setup2024-12-13T10:28:45Zhathachthach@tinyusb.org2024-12-13T10:24:57Zurn:sha1:0785daecc1a3a11d5bacbd7c4cd7dc4a48b11b49rasc ra2a1_ek, but usb does not seem to work. Note fsp.ld need extra 0x100 byte for ROM registers to work.2024-12-12T16:31:16Zhathachthach@tinyusb.org2024-12-12T09:45:45Zurn:sha1:4d1f9450969146da89aca1e3064c7f27d2645ba9used pin generated by rasc2024-12-12T09:07:30Zhathachthach@tinyusb.org2024-12-12T08:37:07Zurn:sha1:8f2b1bc7b9705493e028b9212728ebcc2aaa8abbadd new tusb_int_handler(rhport, in_isr) as common irq handler2024-10-10T09:28:36Zhathachthach@tinyusb.org2024-10-10T09:22:12Zurn:sha1:57aac432b52df6d284c98daf591e661d1c55aa05
update tusb_init() to take rhport and role, defined as macro with optional argument for backward compatible