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<title>tinyusb.git/hw/bsp/samd5x_e5x, branch claude/add-systemview-debug</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/tinyusb.git/atom/hw/bsp/samd5x_e5x?h=claude%2Fadd-systemview-debug</id>
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<updated>2026-09-03T21:21:57Z</updated>
<entry>
<title>sysview: per-family RTT buffer defaults, 65536 on RAM-rich parts</title>
<updated>2026-09-03T21:21:57Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-08-11T10:07:44Z</published>
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<id>urn:sha1:d2de029fd9def460d66e87fd1088cc49ed0f4574</id>
<content type='text'>
The dual-role dogfood measured the 4096 fallback losing 96.7% of ISR exit
contexts on mimxrt1064_evk and 99.1% on metro_m4_express; a local-board run
measured stm32u575nucleo losing ~19% of the whole stream under a 12 s
cdc_msc workload. The default was too small for any real capture on fast
parts and every user had to rediscover that per board.

Families now declare SYSVIEW_BUFFER_SIZE_DEFAULT in family.cmake (the
SYSVIEW_RAM_BASE_DEFAULT pattern): imxrt, nrf, rp2040, samd5x_e5x, stm32f4,
stm32f7, stm32h7 and stm32u5 set 65536, the measured-safe value.
-DSYSVIEW_BUFFER_SIZE still beats everything; small-RAM parts keep the 4096
fallback and their per-board overrides (stm32f072disco's 2048 verified
still honoured). lpc55 measured 34 lost events on the same route, an order
of magnitude lighter, so it keeps the fallback rather than inheriting a
default on thin evidence.
</content>
</entry>
<entry>
<title>sysview: take the timestamp from a BSP hardware timer where the core has no DWT</title>
<updated>2026-09-03T21:21:57Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-09-03T10:14:28Z</published>
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<id>urn:sha1:5a0d707dd96ae7821d97793b441b86aabb684855</id>
<content type='text'>
Cortex-M0/M0+, the WCH RISC-V parts and MAX3266x have no usable DWT cycle
counter, so their family.c provides SEGGER_SYSVIEW_X_GetTimestamp() from a
free-running hardware timer: a 32-bit general-purpose timer on ST parts
(sysview_stm32_tim2.h), SysTick-extended sources on the M0 families, the
core's SysTick-equivalent on WCH with the documented ordered read of the
split count registers (sysview_wch_timestamp.h), and a TMR on MAX3266x
(sysview_max32_tmr.h).

max32666fthr's DWT implements only watchpoint comparators (DWT_CTRL.NOCYCCNT=1
read live; UG6971 documents no DWT/trace at all), so SystemView's ARMv7-M
default read 0xE0001004 as a frozen 0 and every duration decoded as zero. The
TMR runs at 48 MHz (f_PCLK = f_SYS_CLK/2; Continuous mode, CMP=0xFFFFFFFF,
prescaler 1 - UG6971 15.2 guarantees TMRn_CNT readable while counting); TMR0
by default - present on every MAX32 part, unused by the examples, FreeRTOS
ticks on SysTick - overridable with -DSYSVIEW_MAX32_TMR=n. The family builds
SystemView with SEGGER_SYSVIEW_CORE_OTHER and sets CFG_TUSB_SYSVIEW_TIMESTAMP_BSP,
a tusb_sysview.c opt-in for ARMv7-M parts without CYCCNT where the BSP also
reports the rate via SEGGER_SYSVIEW_X_GetTimestampFreq(); the fixed-1MHz
microsecond contract is unreachable on a powers-of-two-only prescaler.
SEGGER_SYSVIEW_X_GetInterruptId() gains the ICSR.VECTACTIVE read for
CORE_OTHER builds. MAX32650/32690 use different GCR clock-gate names and stay
unported. Measured on the rig: seven host-timed 1.000 s gaps at
1.00044-1.00091 (median +0.05%).

stm32f0 refuses to configure SYSVIEW for stm32f070xb at CMake time: that
variant has no TIM2 at all, and the alternative was an undefined-reference
link error with no hint.

The shared hw/bsp/sysview_*.h join ci_select rule 16's hw/bsp file list
(cross-family build files, compiled only under -DSYSVIEW which no CI leg
enables), mirrored in the spec's rule table, so master's classification
guard resolves them on both axes.
</content>
</entry>
<entry>
<title>sysview: FreeRTOS trace hooks, stack high-water and heap tracking</title>
<updated>2026-09-03T21:21:57Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-08-11T10:07:23Z</published>
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<id>urn:sha1:a40af493a57fa99e9383290dabdcc10e1fa9a309</id>
<content type='text'>
hw/bsp/sysview_freertos_hooks.h maps the FreeRTOS trace macros onto
SystemView task records (task names, switches, ready/blocked) and adds heap
tracking; the FreeRTOSConfig.h of the families used on the rig include it
when SYSVIEW is on.

The FreeRTOS examples grow their USB task stacks when CFG_TU*_SYSVIEW is
enabled, the same way they already do for CFG_TUSB_DEBUG -- the
instrumentation's stack cost is real (measured overflows on lpc55 before
the bump).
</content>
</entry>
<entry>
<title>samd5x_e5x: ETM trace support for same54_xplained</title>
<updated>2026-07-24T08:56:14Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-24T08:28:53Z</published>
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<id>urn:sha1:853f7e8f70caf4df9786001e84eca048d2664de7</id>
<content type='text'>
The populated 20-pin Cortex Debug+ETM header carries 4-bit trace
(TRACECLK=PC27, D0-3=PC28/PC26/PC25/PC24, mux H). TRACE_ETM builds mux
the pins and enable GCLK channel 47 (GCLK_CM4_TRACE) from GCLK0 - without
that gate the port stays silent with pins and TPIU armed. Chip-max
120 MHz core / 60 MHz TRACECLK validated (3x 280M-fetch captures).
</content>
</entry>
<entry>
<title>remove IAR toolchain support from make build system</title>
<updated>2026-04-06T04:17:34Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-03-19T15:23:47Z</published>
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<id>urn:sha1:4c7a9fed96e0a81cc640333c1c82fee54fa4be34</id>
<content type='text'>
IAR is only supported with CMake. Remove all IAR-specific references
from the Make build system including toolchain files, SRC_S_IAR,
LD_FILE_IAR variables, and IAR toolchain detection.

Also fix GET_SECTOR_COUNT truncation in msc_file_explorer and
broken formatting in stm32f7 board_uart_write.

Co-Authored-By: Claude Opus 4.6 (1M context) &lt;noreply@anthropic.com&gt;
</content>
</entry>
<entry>
<title>move MAX3421_HOST build flag to test config for metro_m4_express</title>
<updated>2026-04-04T14:35:42Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-04-04T14:35:42Z</published>
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<id>urn:sha1:3747355841f35cf5f1b2998c1806d8d19b167722</id>
<content type='text'>
</content>
</entry>
<entry>
<title>make board_uart_read()/write() return -1 when unimplemented for consistency across all families</title>
<updated>2026-04-04T14:32:39Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-04-04T14:32:39Z</published>
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<id>urn:sha1:9838a231ad9bff623a3ec819d05aad4a4087193b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>implement board_uart_read()/write() as non-blocking for all families</title>
<updated>2026-04-04T06:20:58Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-04-04T06:20:58Z</published>
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<id>urn:sha1:3c6c87479be6a9fdd04240b8bb1267ef80b1a0e8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>replace board_millis() with tusb_time_millis_api()</title>
<updated>2026-02-27T17:01:40Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-02-27T16:51:36Z</published>
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<id>urn:sha1:8444c25ab6bc841bad81fd04afc1e66a9d57a115</id>
<content type='text'>
</content>
</entry>
<entry>
<title>bsp: Disable SysTick ISR if FreeRTOS is enabled</title>
<updated>2025-11-25T15:30:32Z</updated>
<author>
<name>Zixun LI</name>
<email>admin@hifiphile.com</email>
</author>
<published>2025-11-25T14:54:45Z</published>
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<id>urn:sha1:8221ea220bb523b3d8c6bab915a968477a228a16</id>
<content type='text'>
</content>
</entry>
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