tinyusb.git/hw/bsp/stm32l476disco/stm32l476disco.c, branch codex/class-reference-docsUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/tinyusb.git/atom/hw/bsp/stm32l476disco/stm32l476disco.c?h=codex%2Fclass-reference-docs2021-11-02T09:10:40Zgrouping stm32L4 family in bsp2021-11-02T09:10:40Zhathachthach@tinyusb.org2021-11-02T08:15:54Zurn:sha1:7e688947265075afdaa343e69ec29a2b2cac5f33add fix for stm32l4 (version 3.10a) which generate transfer complete when setup recieved and control out data complete2021-11-02T06:52:30Zhathachthach@tinyusb.org2021-11-02T06:52:30Zurn:sha1:aa682d730123a1191782b1a160ce25ea20580ee6stm32l476disco: Fix system clock setup2020-05-06T13:13:55ZJerzy Kasenbergjerzy.kasenberg@codecoup.pl2020-05-06T12:34:40Zurn:sha1:615369a6eb28c9203d33549c8b944d35539de1b9
Code suggested that PLL with MSI is used resulting in 80MHz clock.
When in fact PLL was not configured and system clock was left at MSI 48MHz.
This happens because PLL configuration requires that SysTick interrupt
has interrupt priority level configured correctly.
As it seems ST code intentionally setups variable uwTickPrio to invalid
value and later when it is not setup by user code configuration
of oscillator will fail before PLL is configured.
This simple changes systick priority to some valid value that
allows clock to use PLL.
stm32l476disco: fix uninitialized filed usage2020-05-06T12:25:46ZJerzy Kasenbergjerzy.kasenberg@codecoup.pl2020-05-06T12:25:46Zurn:sha1:d9e534f6f274d0d8b02a6258a55d6178517bd5fa
Field PLLState was not initialized in RCC_OscInitStruct.PLL in
function SystemClock_Config().
Value is used in HAL_RCC_OscConfig() regardless of oscillator.
In lucky case value would be 0 RCC_PLL_NONE and nothing would
happen.
If value was incorrect following line would end up in assert:
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
If value was valid but no RCC_PLL_NONE pll could be configured
with some other random values.
Setting PLLState to RCC_PLL_NONE eliminates potential problem.
mass rename tud/dcd_irq_handler to tud/dcd_init_handler2020-04-17T05:27:53Zhathachthach@tinyusb.org2020-04-17T05:27:53Zurn:sha1:50be9d7c3ad08fdc8a79f38606111cf83c84efb9move irq for stm32 synopsys2020-04-08T09:37:09Zhathachthach@tinyusb.org2020-04-08T09:37:09Zurn:sha1:8f17945b6792a326f8dee6abbd49af84a1791209Modify include of HAL, and remove CMSIS clock configuration code, and implement UART for STM32F407Disco2020-03-26T14:10:06ZNathan Conradpigrew@gmail.com2020-03-26T03:52:40Zurn:sha1:705d43cda722c140b5267b4e0e2ea5dbb73e851amove VBUS sense out of dcd_synosys to bsp2019-12-11T07:03:36Zhathachthach@tinyusb.org2019-12-11T07:03:36Zurn:sha1:96a9eca6a041c8a7e9e86792f06abd0ef5a187a3fix missing board uart read/write()2019-10-24T05:20:06Zhathachthach@tinyusb.org2019-10-24T05:20:06Zurn:sha1:6f952a8e84acfbc962cf3d37ed72bddefebaf58bcouldn't get 32L4 running with crystal less mode2019-10-03T06:37:10Zhathachthach@tinyusb.org2019-10-03T06:37:10Zurn:sha1:7fd68efe7b0d1fe95834828f08014ec97f1e005a