tinyusb.git/hw, branch claude/add-systemview-debug

sysview: fix cycle-3 review findings

2026-09-03T23:06:25Z

- kill_traffic(): stop the recording at --duration-ms exactly, then reap the workload, instead of waiting on it (up to 60s) before -stop - sysview_report.py: key open_calls by (func id, context) so interleaved callers of the same function don't cross-pair CALL/RET - build.yml: intersect the sysview dep-fetch board list with the PR's own HIL selection (tinyusb.json vs hfp.json), and skip entirely when HIL is not running for this PR - nrf54h20dk: shrink SYSVIEW_BUFFER_SIZE_DEFAULT to 4096 -- .data/.bss sit in the 32 KiB primary RAM, so the family's 65536 default fails to link - tusb_sysview.c: copy pcTaskName into a local buffer at snapshot time so a task deleted mid-lap can't leave SendTaskInfo() dereferencing a freed TCB - sysview_ci.py: drop a comparison against a baseline whose capture config (example/workload/duration_s) changed, and fail cdc_burst when the link stays enumerated but echoes nothing back - SKILL.md: document the WCH post-mortem dump path (OpenOCD, no J-Link)

sysview: fix cycle-2 review findings

2026-09-03T22:11:02Z

- sysview_ci.py: wait() after kill() on the OpenOCD/nc grace-period timeout, so a still-exiting process can't hold the probe when the recovery flash starts - SKILL.md: point the OpenOCD and post-mortem recipes at examples/device/cdc_msc_freertos, where build-sv actually lands - stm32f401blackpill: override SYSVIEW_BUFFER_SIZE_DEFAULT to 4096; the 64 KiB part overflows RAM by 12952 bytes at the family's 65536 default under SYSVIEW=4 - get_deps.py: align the SystemView entry's continuation lines

sysview: per-family RTT buffer defaults, 65536 on RAM-rich parts

2026-09-03T21:21:57Z

The dual-role dogfood measured the 4096 fallback losing 96.7% of ISR exit contexts on mimxrt1064_evk and 99.1% on metro_m4_express; a local-board run measured stm32u575nucleo losing ~19% of the whole stream under a 12 s cdc_msc workload. The default was too small for any real capture on fast parts and every user had to rediscover that per board. Families now declare SYSVIEW_BUFFER_SIZE_DEFAULT in family.cmake (the SYSVIEW_RAM_BASE_DEFAULT pattern): imxrt, nrf, rp2040, samd5x_e5x, stm32f4, stm32f7, stm32h7 and stm32u5 set 65536, the measured-safe value. -DSYSVIEW_BUFFER_SIZE still beats everything; small-RAM parts keep the 4096 fallback and their per-board overrides (stm32f072disco's 2048 verified still honoured). lpc55 measured 34 lost events on the same route, an order of magnitude lighter, so it keeps the fallback rather than inheriting a default on thin evidence.

sysview: share the WCH RTT configuration and interrupt lock

2026-09-03T21:21:57Z

One sysview_rtt_conf_wch.h serves every WCH family instead of a per-family copy; ch583 keeps its own RTT lock header because its interrupt controller needs a different masking sequence than the ch32v parts.

sysview: take the timestamp from a BSP hardware timer where the core has no DWT

2026-09-03T21:21:57Z

Cortex-M0/M0+, the WCH RISC-V parts and MAX3266x have no usable DWT cycle counter, so their family.c provides SEGGER_SYSVIEW_X_GetTimestamp() from a free-running hardware timer: a 32-bit general-purpose timer on ST parts (sysview_stm32_tim2.h), SysTick-extended sources on the M0 families, the core's SysTick-equivalent on WCH with the documented ordered read of the split count registers (sysview_wch_timestamp.h), and a TMR on MAX3266x (sysview_max32_tmr.h). max32666fthr's DWT implements only watchpoint comparators (DWT_CTRL.NOCYCCNT=1 read live; UG6971 documents no DWT/trace at all), so SystemView's ARMv7-M default read 0xE0001004 as a frozen 0 and every duration decoded as zero. The TMR runs at 48 MHz (f_PCLK = f_SYS_CLK/2; Continuous mode, CMP=0xFFFFFFFF, prescaler 1 - UG6971 15.2 guarantees TMRn_CNT readable while counting); TMR0 by default - present on every MAX32 part, unused by the examples, FreeRTOS ticks on SysTick - overridable with -DSYSVIEW_MAX32_TMR=n. The family builds SystemView with SEGGER_SYSVIEW_CORE_OTHER and sets CFG_TUSB_SYSVIEW_TIMESTAMP_BSP, a tusb_sysview.c opt-in for ARMv7-M parts without CYCCNT where the BSP also reports the rate via SEGGER_SYSVIEW_X_GetTimestampFreq(); the fixed-1MHz microsecond contract is unreachable on a powers-of-two-only prescaler. SEGGER_SYSVIEW_X_GetInterruptId() gains the ICSR.VECTACTIVE read for CORE_OTHER builds. MAX32650/32690 use different GCR clock-gate names and stay unported. Measured on the rig: seven host-timed 1.000 s gaps at 1.00044-1.00091 (median +0.05%). stm32f0 refuses to configure SYSVIEW for stm32f070xb at CMake time: that variant has no TIM2 at all, and the alternative was an undefined-reference link error with no hint. The shared hw/bsp/sysview_*.h join ci_select rule 16's hw/bsp file list (cross-family build files, compiled only under -DSYSVIEW which no CI leg enables), mirrored in the spec's rule table, so master's classification guard resolves them on both axes.

sysview: FreeRTOS trace hooks, stack high-water and heap tracking

2026-09-03T21:21:57Z

hw/bsp/sysview_freertos_hooks.h maps the FreeRTOS trace macros onto SystemView task records (task names, switches, ready/blocked) and adds heap tracking; the FreeRTOSConfig.h of the families used on the rig include it when SYSVIEW is on. The FreeRTOS examples grow their USB task stacks when CFG_TU*_SYSVIEW is enabled, the same way they already do for CFG_TUSB_DEBUG -- the instrumentation's stack cost is real (measured overflows on lpc55 before the bump).

sysview: wire the -DSYSVIEW= build option

2026-09-03T21:21:57Z

family_support.cmake/.mk translate -DSYSVIEW= (CMake) / SYSVIEW= (Make) into CFG_TUD_SYSVIEW/CFG_TUH_SYSVIEW, pull in lib/SystemView sources and the RTT/SystemView include paths, and refuse levels the family cannot honour. The lpc11/13/15/17/40/43 families declare SYSVIEW_RAM_BASE_DEFAULT 0x10000000: their SRAM does not start at the Cortex-M-canonical 0x20000000, and the recorder needs the real base to find the RTT control block.

Merge pull request #3877 from kilograham/rp2040-pio-usb-fix

2026-09-03T02:55:54Z

rp2040: do not require PICO_DEFAULT_PIO_USB_DP_PIN to be set for pio_usb

2026-09-02T18:35:51Z

rp2350: PIO-USB runs the pico-sdk stock 150 MHz

2026-08-28T18:08:40Z

Closes the sys-clock question. rp2350: the dynamic 156 MHz switch is removed - 150 MHz soak-tested clean (and a runtime switch truncates ETM capture on the trace carrier). rp2040 keeps its existing 120 MHz: soak sweeps show 120 = 8/8, stock 125 = 0/3 (bulk-OUT collapses, device NAKs ~600:1 with zero CRC errors on the wire), and 132 = 2/10 flaky despite an exact 12n/375k divider - no divider criterion predicts rp2040 PIO-USB health (the RX state machine samples at raw sysclk), so only soak-validated clocks ship.