Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/tinyusb.git/atom/src/common/tusb_sysview.c?h=claude%2Fadd-systemview-debug 2026-09-03T23:06:25Z 2026-09-03T23:06:25Z hathach thach@tinyusb.org 2026-09-03T23:06:25Z urn:sha1:633e074a0b9effbfbb84c93695e52fb75009564c - kill_traffic(): stop the recording at --duration-ms exactly, then reap the workload, instead of waiting on it (up to 60s) before -stop - sysview_report.py: key open_calls by (func id, context) so interleaved callers of the same function don't cross-pair CALL/RET - build.yml: intersect the sysview dep-fetch board list with the PR's own HIL selection (tinyusb.json vs hfp.json), and skip entirely when HIL is not running for this PR - nrf54h20dk: shrink SYSVIEW_BUFFER_SIZE_DEFAULT to 4096 -- .data/.bss sit in the 32 KiB primary RAM, so the family's 65536 default fails to link - tusb_sysview.c: copy pcTaskName into a local buffer at snapshot time so a task deleted mid-lap can't leave SendTaskInfo() dereferencing a freed TCB - sysview_ci.py: drop a comparison against a baseline whose capture config (example/workload/duration_s) changed, and fail cdc_burst when the link stays enumerated but echoes nothing back - SKILL.md: document the WCH post-mortem dump path (OpenOCD, no J-Link) 2026-09-03T21:21:57Z hathach thach@tinyusb.org 2026-09-03T10:14:28Z urn:sha1:5a0d707dd96ae7821d97793b441b86aabb684855 Cortex-M0/M0+, the WCH RISC-V parts and MAX3266x have no usable DWT cycle counter, so their family.c provides SEGGER_SYSVIEW_X_GetTimestamp() from a free-running hardware timer: a 32-bit general-purpose timer on ST parts (sysview_stm32_tim2.h), SysTick-extended sources on the M0 families, the core's SysTick-equivalent on WCH with the documented ordered read of the split count registers (sysview_wch_timestamp.h), and a TMR on MAX3266x (sysview_max32_tmr.h). max32666fthr's DWT implements only watchpoint comparators (DWT_CTRL.NOCYCCNT=1 read live; UG6971 documents no DWT/trace at all), so SystemView's ARMv7-M default read 0xE0001004 as a frozen 0 and every duration decoded as zero. The TMR runs at 48 MHz (f_PCLK = f_SYS_CLK/2; Continuous mode, CMP=0xFFFFFFFF, prescaler 1 - UG6971 15.2 guarantees TMRn_CNT readable while counting); TMR0 by default - present on every MAX32 part, unused by the examples, FreeRTOS ticks on SysTick - overridable with -DSYSVIEW_MAX32_TMR=n. The family builds SystemView with SEGGER_SYSVIEW_CORE_OTHER and sets CFG_TUSB_SYSVIEW_TIMESTAMP_BSP, a tusb_sysview.c opt-in for ARMv7-M parts without CYCCNT where the BSP also reports the rate via SEGGER_SYSVIEW_X_GetTimestampFreq(); the fixed-1MHz microsecond contract is unreachable on a powers-of-two-only prescaler. SEGGER_SYSVIEW_X_GetInterruptId() gains the ICSR.VECTACTIVE read for CORE_OTHER builds. MAX32650/32690 use different GCR clock-gate names and stay unported. Measured on the rig: seven host-timed 1.000 s gaps at 1.00044-1.00091 (median +0.05%). stm32f0 refuses to configure SYSVIEW for stm32f070xb at CMake time: that variant has no TIM2 at all, and the alternative was an undefined-reference link error with no hint. The shared hw/bsp/sysview_*.h join ci_select rule 16's hw/bsp file list (cross-family build files, compiled only under -DSYSVIEW which no CI leg enables), mirrored in the spec's rule table, so master's classification guard resolves them on both axes. 2026-09-03T21:21:57Z hathach thach@tinyusb.org 2026-08-11T10:07:23Z urn:sha1:3baa7c8fbafd2cbccc5810626ebbfaa50c0ea4da Level 2 marks the stack's task-side entry points (tud_task/tuh_task inner loop, usbd_edpt_xfer, control transfers); level 3 adds the class drivers (cdc, msc) and the rp2040 dcd/hcd as the reference portable layer. All call sites compile away below their level. 2026-09-03T21:21:57Z hathach thach@tinyusb.org 2026-08-11T10:07:06Z urn:sha1:4158178230ec491c7eef03df6bbbd8c46811805c tusb_sysview.{c,h} carry the SystemView glue: the TU_SV_* event/function-name table (offset TU_SV_EVENT_BASE 512), module registration, the leveled CFG_TUD_SYSVIEW/CFG_TUH_SYSVIEW gates (1 = ISR only, 2 = +stack call sites, 3 = +class drivers), per-task stack high-water reporting with a cached snapshot refreshed once per rotation, and the dual-role guard that collapses double-recording when device and host share one vector. ISR exit emits RecordExitISRToScheduler() when SCB->ICSR.PENDSVSET is set at exit (Cortex-M0/M3+), so FreeRTOS captures don't show a causeless task switch after every USB ISR; RISC-V keeps the plain exit record. Unit-tested under ceedling against a fake SEGGER_SYSVIEW.h vendor header.