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<title>tinyusb.git/src/portable/microchip/pic32mz, branch 0.20.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/tinyusb.git/atom/src/portable/microchip/pic32mz?h=0.20.0</id>
<link rel='self' href='http://cgit.235523.xyz/tinyusb.git/atom/src/portable/microchip/pic32mz?h=0.20.0'/>
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<updated>2025-11-17T05:09:30Z</updated>
<entry>
<title>make TUP_DCD_EDPT_ISO_ALLOC i.e dcd_edpt_iso_alloc()/dcd_edpt_iso_activate() as default driver implementation. dcd_edpt_close() is deprecated and will be removed from all driver in the future.</title>
<updated>2025-11-17T05:09:30Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2025-11-15T12:46:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=6b28a4478c9f8fa3993d593360eb5574bbdeda22'/>
<id>urn:sha1:6b28a4478c9f8fa3993d593360eb5574bbdeda22</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Replace old delay functions by tusb_time_delay_ms_api</title>
<updated>2025-09-17T20:48:59Z</updated>
<author>
<name>HiFiPhile</name>
<email>admin@hifiphile.com</email>
</author>
<published>2025-09-17T20:45:25Z</published>
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<id>urn:sha1:73f3900b2da5d00e707078a591067f0329118dcb</id>
<content type='text'>
Signed-off-by: HiFiPhile &lt;admin@hifiphile.com&gt;
</content>
</entry>
<entry>
<title>change dcd_init() return from void to bool</title>
<updated>2024-10-14T12:42:22Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2024-10-14T12:42:22Z</published>
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<id>urn:sha1:e83e08343afca86b2bacf26822ef9032571e6f56</id>
<content type='text'>
</content>
</entry>
<entry>
<title>change the tusb_rhport_init_t struct, exclude the rhport to make API more consistent</title>
<updated>2024-10-14T11:27:52Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2024-10-14T11:27:52Z</published>
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<id>urn:sha1:1f18be93db39dbc57bbf34f982dbe07e209a2ae3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>change dcd_init() to take rhport struct</title>
<updated>2024-10-11T08:31:49Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2024-10-11T08:21:32Z</published>
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<id>urn:sha1:d997f0071ea5d2d07e340d183fffb97e09526773</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix trailing space and new line</title>
<updated>2023-03-17T09:12:49Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2023-03-17T09:12:49Z</published>
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<id>urn:sha1:3623ba1884ddff23e9b64766cb6dd032f1425846</id>
<content type='text'>
temporarily disable codespell
</content>
</entry>
<entry>
<title>Fix typos</title>
<updated>2022-12-04T12:43:23Z</updated>
<author>
<name>Bastien Nocera</name>
<email>hadess@hadess.net</email>
</author>
<published>2022-12-04T06:58:47Z</published>
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<id>urn:sha1:6a2cf6728906aa61b44ecfe43b4ceef287b29bf8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge pull request #1381 from hathach/add-sof-isr</title>
<updated>2022-05-31T15:25:14Z</updated>
<author>
<name>Ha Thach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2022-05-31T15:25:14Z</published>
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<id>urn:sha1:fdeac8508be5cdd95966422d1e776604efbc9b3f</id>
<content type='text'>
Add SOF IRQ Handler </content>
</entry>
<entry>
<title>dcd_pic32: Fix memory overwrite in incoming data</title>
<updated>2022-05-01T12:26:24Z</updated>
<author>
<name>Jerzy Kasenberg</name>
<email>jerzy.kasenberg@gmail.com</email>
</author>
<published>2022-05-01T12:18:53Z</published>
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<id>urn:sha1:e49cad84e2798ddd4ee49d3684ce7b414d30ccb2</id>
<content type='text'>
When transfer was finished rx_fifo_read() read all that
was to read RXPKTRDY was cleared allowing next packet to
be received.
Then xfer_complete was called.
Interrupt for OUT endpoint was left enable, that would not
be a problem if data was handled fast and new transfer was
scheduled.
For MSC when host sends a lot of data this interrupt that was
enabled could cause epn_handle_rx_int() to be called after
transfer was completed and next was not scheduled yet.
Without TU_ASSERT that was added to detect this, incoming
data was written past buffer provided by user code resulting
in random memory corruption.

This just blocks RX interrupt when transfer is finished,
and also only unmasked rx interrupts are handled.
</content>
</entry>
<entry>
<title>dcd_pic32: Add asserts transfer sanity check</title>
<updated>2022-05-01T12:14:42Z</updated>
<author>
<name>Jerzy Kasenberg</name>
<email>jerzy.kasenberg@gmail.com</email>
</author>
<published>2022-05-01T12:14:42Z</published>
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<id>urn:sha1:c145777e0eb6b9add414504dd8cf4ec7da6cc61a</id>
<content type='text'>
TU_ASSERTS added to detect transfer inconsistency.
</content>
</entry>
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