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<title>tinyusb.git/src/portable/st/synopsys, branch 0.7.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/tinyusb.git/atom/src/portable/st/synopsys?h=0.7.0</id>
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<updated>2020-10-24T23:16:05Z</updated>
<entry>
<title>Move into if statement</title>
<updated>2020-10-24T23:16:05Z</updated>
<author>
<name>Jacob Potter</name>
<email>jacob@j4cbo.com</email>
</author>
<published>2020-10-24T23:16:05Z</published>
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<id>urn:sha1:229be75a98af03bdbcfabb29b8a3ddd106ba5f30</id>
<content type='text'>
</content>
</entry>
<entry>
<title>CR feedback: compare CFG_TUSB_RHPORT1_MODE instead of using new macro</title>
<updated>2020-10-24T23:11:32Z</updated>
<author>
<name>Jacob Potter</name>
<email>jacob@j4cbo.com</email>
</author>
<published>2020-10-24T23:11:32Z</published>
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<id>urn:sha1:01996457c8974de5fcb02dab32210ddb99f0134a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Allow use of internal FS PHY on OTG_HS interface</title>
<updated>2020-10-18T23:01:17Z</updated>
<author>
<name>Jacob Potter</name>
<email>jacob@j4cbo.com</email>
</author>
<published>2020-10-18T22:55:14Z</published>
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<id>urn:sha1:c87ed8eff1ac1305f69dd83144890f5a6f752a6f</id>
<content type='text'>
Some ST parts (like STM32F74xxx / STM32F75xxx) allow the USB_OTG_HS core to be used with
either an external high-speed ULPI PHY or an internal full-speed-only (12mbps) PHY. Currently
the code assumes than an ULPI PHY is used unless the chip has an internal high-speed PHY
(`#if defined(USB_HS_PHYC)`), with no provision to use the internal FS PHY.
</content>
</entry>
<entry>
<title>Revert dcd_alloc_mem_for_conf() but keep changes from @kasjer for ISO EP</title>
<updated>2020-10-09T17:50:05Z</updated>
<author>
<name>Reinhard Panhuber</name>
<email>panhuber_reinhard@gmx.at</email>
</author>
<published>2020-10-09T17:50:05Z</published>
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<id>urn:sha1:032e84c9befa0797f6a6faf86fbfdff13ec77bbe</id>
<content type='text'>
Add tud_audio_set_itf_close_EP_cb()</content>
</entry>
<entry>
<title>Fix minor issue.</title>
<updated>2020-09-28T17:23:38Z</updated>
<author>
<name>Reinhard Panhuber</name>
<email>panhuber_reinhard@gmx.at</email>
</author>
<published>2020-09-28T17:23:38Z</published>
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<id>urn:sha1:9c837300f1d01593457f75b6e2a07a775ed3c5e1</id>
<content type='text'>
- Change set_EP0_max_pkt_size() to set_EP0_max_pkt_size(void).
</content>
</entry>
<entry>
<title>Cleanup for PR.</title>
<updated>2020-09-28T16:10:57Z</updated>
<author>
<name>Reinhard Panhuber</name>
<email>panhuber_reinhard@gmx.at</email>
</author>
<published>2020-09-28T16:10:57Z</published>
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<id>urn:sha1:529622710ca6a234fa385402e4a298759a04ad72</id>
<content type='text'>
</content>
</entry>
<entry>
<title>synopsys: Fix odd/even frame handling for ISO</title>
<updated>2020-09-28T06:41:17Z</updated>
<author>
<name>Jerzy Kasenberg</name>
<email>jerzy.kasenberg@codecoup.pl</email>
</author>
<published>2020-09-14T10:31:00Z</published>
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<id>urn:sha1:642a8b00c8bb733ddf84efbfbb6b3451bb747485</id>
<content type='text'>
Current implementation always sets odd/even bit for ISO transactions.
This is a good strategy only if interval is 1.
For ISO endpoint interval in (micro)frames is computed as
2^(interval-1), which means that odd/frame number should stay
same for interval values &gt; 1.
With this change only when interval is 1 odd/even bit is modified.
</content>
</entry>
<entry>
<title>synopsys: Remove compilation warning in dcd_edpt_close</title>
<updated>2020-09-28T06:41:17Z</updated>
<author>
<name>Jerzy Kasenberg</name>
<email>jerzy.kasenberg@codecoup.pl</email>
</author>
<published>2020-09-14T08:22:54Z</published>
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<id>urn:sha1:6b5233096978305f1d6a87ef83393ba50e8b0bd2</id>
<content type='text'>
dcd_edpt_close() no longer modifies FIFO distribution.
Code that that was commented out is removed along with
variables that are no longer used.
FIFO distribution among endpoints is handled upfront
and does not need to be modified in open and close endpoint
functions.
</content>
</entry>
<entry>
<title>synopsys: Fix fifo allocation schema</title>
<updated>2020-09-28T06:41:17Z</updated>
<author>
<name>Jerzy Kasenberg</name>
<email>jerzy.kasenberg@codecoup.pl</email>
</author>
<published>2020-08-26T14:08:33Z</published>
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<id>urn:sha1:6f3d0af1e65f9741cd9a735fea596e466645e234</id>
<content type='text'>
Recommended FIFO allocation schema includes 2 maximum endpoint sizes.
Comment suggested that this is the case while it would work according
to this description only in checked endpoints were ascending sizes.
Also two same size endpoints would be counted as one.
That is fixed by way sz is filled.

Calculation used too much modulo operation while single division was enough
to account for odd FIFO sizes.

Extra space that is evenly distributed between Bulk and control endpoints
was incorrectly calculated it could prevent allocation of ISO endpoint FIFO
when bulk endpoints existed with smaller endpoint numbers.

Minimum endpoint FIFO size is 16 32bit words, FIFO space requirement is
now observed.
</content>
</entry>
<entry>
<title>Start of sampling works.</title>
<updated>2020-09-06T09:37:59Z</updated>
<author>
<name>Reinhard Panhuber</name>
<email>panhuber_reinhard@gmx.at</email>
</author>
<published>2020-09-06T09:37:59Z</published>
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<id>urn:sha1:4e789b240deb0b124b65fd3a177674f562f0b3c1</id>
<content type='text'>
</content>
</entry>
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