tinyusb.git/test/hil/hil_test.py, branch worktree-ch569-hydrausb3

usbtest: skip silicon-impossible cases via bcdDevice quirk flags

2026-07-09T07:34:13Z

The CH569 USBSS ctrl_out flakiness (cases 14/21, host -EPROTO) is a silicon erratum, not a driver bug: EP0 OUT data stages whose wLength % 4 == 1 are intermittently dropped at 5 Gbps. Proven by A/B against WCH's own binary USB3 stack (SimulateCDC EVT demo patched to accept the gadget-zero 0x5b/0x5c requests), which fails identically on the same board — independent of host LPM (persists with U1/U2 disabled) and sysclk (80 vs 120 MHz). Bulk OUT at the same lengths is clean. Document the erratum in the dcd and drop the ineffective zeroed-BOS workaround. Rather than letting known-impossible cases flake the battery, the firmware now advertises quirk flags in bcdDevice bits 4-7 (tier stays in bits 0-3): 0x10 skips ctrl_out 14/21, 0x20 skips ep-halt 13 (the previously proven single-STALL limitation). usbtest.py skips flagged cases visibly at SuperSpeed only (explicit --tests still runs them) and reports them in the summary/JSON. Also fix the CH56x USB3 dcd leaving an endpoint halted across reconfiguration: clear the stalled flag in dcd_edpt_open/close/ close_all (USB 2.0 9.4.5) so a SET_CONFIGURATION recovery of a halted-then-reopened endpoint does not STALL forever. Validated on hydrausb3_v1 at 5000M: tier-4 battery x3 = 27/27 passed + 3 skipped, full HIL device suite 12/12 green (MSC 160/134 MB/s). Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE

address review round 3: bound the ZLP deselect spin, quote the HIL uid

2026-07-06T18:33:48Z

- dcd(rusb2): pipe_zlp_in()'s CURPIPE deselect wait gets the same spin bound as the other FIFO waits — it runs with the USB IRQ masked, where any stuck spin freezes the stack. - test/hil: quote the board uid interpolated into the shell=True usbtest invocation. Verified: ra4m1_ek 30/30 through the HIL battery. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

address review round 2 (4 fixed, 1 answered)

2026-07-06T18:23:38Z

- dcd(nrf5x): dcd_edpt_iso_activate drops a stale armed transfer (started/ data_received/iso_in_transfer_ready) — there is no dcd close on this port, so a transfer armed before SET_INTERFACE would trip TU_ASSERT(!xfer->started) on the class's next arm after usbd reset the endpoint's claim state. - class(vendor): tud_vendor_n_mounted() counts the interrupt endpoints, so an interrupt-only vendor interface (bulk absent) reports mounted. - example(usbtest): int/iso write lengths follow the negotiated speed (tud_speed_get), not the compile-time capability — a high-speed build enumerated at full speed serves the FS descriptor (mps 64/128) and must not submit HS-sized packets. - test/hil: test_example() return annotation matches the (err, status, metric) 3-tuple it returns. Verified: feather_nrf52840_express and raspberry_pi_pico 30/30 through the HIL battery; pico/feather/ch32v307-usbhs builds clean. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

test/hil: serialize usbtest batteries across the board worker pool

2026-07-06T15:47:37Z

hil_test.py tests boards in a multiprocessing Pool, so the full-fleet run had many usbtest batteries running concurrently — each saturates the host controller with bulk-perf, iso streams and unlink storms, and together they hard-froze the CI rig mid-run (fatal PCIe error on the VFIO-passed xHCI; the machine rebooted). Single-board runs and the earlier sequential sweep never hit this. Add a pool-wide lock so only one battery runs at a time while other boards' ordinary tests keep going in parallel (the baseline load the rig has always handled), and raise the default pool timeout to 70 min for the serialized tail. Verified: 3-board pool run (lpcxpresso11u37, ra4m1_ek, ch32v307 usbhs+usbfs) all report ✅ 30/30 with batteries serialized, 160 s total. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

test/hil: integrate usbtest into the HIL suite

2026-07-06T08:56:54Z

Add device/usbtest to the device test battery. test_device_usbtest() waits for the cafe:4010 device to enumerate, runs usbtest.py --json against it, and shows the pass count in the report cell — "✅ 30/30" on a clean run or "❌ 29/30" on a partial, instead of a bare ✅/❌. To carry the count onto a failing cell, a test may raise TestFail(msg, metric=…); test_example() captures that metric on the final failed attempt. The report tally is now icon-aware so an icon-prefixed metric ("❌ 29/30") is counted as a failure (and "✅ …" as a pass), keeping the passed/failed/skipped totals correct. Verified end-to-end: ra4m1_ek reports "✅ 30/30"; the partial path renders "❌ N/M" and tallies as failed. Co-Authored-By: Claude Opus 4.8 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

test/hil: show pass/fail/skip counts above the HIL report table

2026-06-24T09:42:04Z

Prefix each rig's hil_report.md matrix with a one-line tally (passed / failed / skipped) so the number of failed tests is visible at a glance in the PR comment without scanning the table. A metric-string cell (e.g. throughput) counts as a pass; blank/not-run cells are excluded. Co-Authored-By: Claude Opus 4.8 (1M context)

Merge remote-tracking branch 'origin/master' into add-ch58x-usbfs

2026-06-22T08:36:37Z

test/hil: add ch582m_evt to CI HIL pool

2026-06-19T14:37:34Z

Add the device-only CH582M-EVT (WCH USBFS via the shared dcd_ch32_usbfs.c), riscv-gcc, flashed by openocd_wch probe 7FD88F0604B5, to tinyusb.json. Also reorder device_tests to keep examples sharing a VID:PID non-adjacent: cdc_msc and cdc_msc_throughput both use cafe:4003, and on boards whose CPU-reset does not drop D+ (e.g. WCH CH58x via openocd) back-to-back same-PID firmware leaves the host on the previous example's cached descriptors, so the new example's CDC never enumerates and the test fails. Moving dfu (cafe:4000) between them changes the PID and forces the host to re-enumerate. Remote HIL on ci.lan: all device examples pass, including cdc_msc_throughput (no skip needed). Co-Authored-By: Claude Opus 4.8 (1M context)

test/hil: fail audio test on missing alsa-utils instead of skipping

2026-06-18T10:15:50Z

arecord (alsa-utils) is a documented HIL host requirement, like mtools/libmtp9/iperf — none of which have a skip-if-missing guard. The audio test was the exception: it silently returned 'skipped' when arecord was absent, masking host misconfiguration. The ci.lan rig had been silently skipping device/audio_test_freertos on every board because alsa-utils was never installed. Remove the shutil.which('arecord') guard so a missing package surfaces as a failure, consistent with the other tool-dependent tests, and drop the now-unused shutil import. Note in the host-setup comment that these packages are required (a missing tool fails its test rather than skipping). Co-Authored-By: Claude Opus 4.8 (1M context)

Merge pull request #3643 from hathach/musb_ep0_race

2026-06-17T02:20:24Z

dcd/musb: defer EP0 SETUP during DATA_IN/STATUS race