tinyusb.git/test/hil/tinyusb.json, branch worktree-ch569-hydrausb3

hil: update hydrausb3_v1 flasher probe uid (WCH-Link swapped)

2026-07-09T07:34:16Z

Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE

Merge branch 'usbtest': Linux kernel usbtest battery support

2026-07-08T05:26:08Z

Brings the usbtest device example (gadget-zero source/sink peer for the kernel's usbtest.ko/testusb), the test/hil/usbtest.py battery runner and the extended vendor class driver (interrupt/isochronous endpoints, alt settings) into the CH569 SuperSpeed branch, enabling the battery to run against both CH56x dcds. Conflict resolution: test/hil/tinyusb.json keeps this branch's hydrausb3_v1 fixture entry and adds the usbtest branch's ch32v307v_r1_1v0 entry. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE

Add CH569 runtime USB2 fallback, HIL board entry and docs

2026-07-07T04:35:06Z

- CFG_TUD_WCH_USB30_FALLBACK (on by default for SPEED=super): the USB3 dcd owns both controllers on rhport 0. TMR0 times out SuperSpeed link training (2x 0.5 s: shut USB3 down, then bring USB2 up); an LTSSM disabled event (SS rejected by the port) switches immediately. The active controller is dispatched at each dcd entry point; IRQ pendings are cleared on switch and dcd_int_enable is mode-aware (a stale LINK pending otherwise refires on every usbd queue unlock) - Bounded link busy-waits (LINK_STATUS busy can stick once the link is torn down) - board_get_unique_id from the factory ID in read-only info flash (0x77FE4), so the USB serial identifies the chip (HIL requirement) - HIL: replace ch582m_evt (probe moved) with hydrausb3_v1 - Regenerate boards.rst, dependencies.rst, BoardPresets.json Verified on HydraUSB3 v1 (ci rig): SuperSpeed still trains at 5000M with fallback armed (3x replug); with SS terminations disabled the device falls back and enumerates fully at 480M. Full HIL run passes 10/10 device tests including cdc_msc at SuperSpeed and cdc_msc_throughput (MSC 22.1/14.1 MBps read/write at NUMP=1); non-SuperSpeed-aware examples recover onto USB2 via the fallback. Co-Authored-By: Claude Fable 5

test/hil: move ch582m_evt to boards-skip (fixture unplugged)

2026-07-06T17:35:54Z

Its board and WCH-Link failed to re-enumerate after the rig reboot and need a physical replug; skip so HIL runs stay green until then. Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

usbtest: support CH32V307 on both USB ports (usbfs + usbhs), 30/30 each

2026-07-06T08:32:17Z

The CH32V307 exposes two device controllers: the full-speed USBFS (dcd_ch32_usbfs, selected with -DSPEED=full) and the high-speed USBHS (dcd_ch32_usbhs, the default). Both now pass the Linux testusb tier-4 battery 30/30 (3 reflash cycles each) on ch32v307v_r1_1v0. - dcd(ch32_usbhs): fix clear-stall on an armed OUT endpoint. It set the pipe to NAK unconditionally, so a receive the class still considers submitted NAKed forever after CLEAR_FEATURE(HALT) and usbtest toggle test 29 timed out. Re-queue the pending receive (ACK/NYET) instead. This is the first usbtest coverage of the ch32_usbhs driver. - bsp(ch32v30x): implement board_get_unique_id from the ESIG UID (0x1FFFF7E8); the port previously fell back to the placeholder serial. - usbtest: the CH32V307 usbfs port caps iso at 64 B like the other WCH USBFS parts, so add it to the FS iso-64 descriptor branch (its usbhs port uses the HS sizes). - test/hil: register ch32v307v_r1_1v0 (usbhs + usbfs variants, WCH-Link BC5DA47360D0) and move nrf54lm20dk to boards-skip. Co-Authored-By: Claude Opus 4.8 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

test/hil: add nrf54lm20dk (NRF54, high-speed dwc2) to usbtest board list

2026-07-06T07:26:55Z

Passes usbtest tier-4 30/30 at high speed. J-Link OB S/N 1051856258. Co-Authored-By: Claude Opus 4.8 Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg

test/hil: enable cdc_msc_throughput on ch32v103r_r1_1v0

2026-06-26T08:15:05Z

The board was added to the CI HIL pool with device/cdc_msc_throughput skipped, so the test had never run on it. Remove the skip to include it in the device test set. Verified passing on the ci rig (USBFS, full-speed): CDC read 639 / write 544 kBps, MSC read 845 / write 575 kBps. Co-Authored-By: Claude Opus 4.8 (1M context)

Merge remote-tracking branch 'origin/master' into add-ch58x-usbfs

2026-06-22T08:36:37Z

hw/bsp/ch58x: address review feedback and read the real chip unique id

2026-06-20T16:06:07Z

Fold in the CH58x BSP review fixes: - family.mk: drop stray trailing backslashes on the last LDFLAGS/SRC_C entries (harmless -- GNU Make ends the list at the blank line -- but misleading). - debug_uart.c: uart_write() spun on a full ring buffer with nothing to drain it (only uart_sync() advances tx_consume), so a burst larger than the buffer deadlocked. Drain the FIFO while waiting, like uart_sync() does. - wch-riscv.cfg: move the OpenOCD work area from 0x80000000 (unmapped) to the 0x20000000 SRAM, sized to 32 KB, matching ch32v20x/wch-riscv.cfg. - family.c: implement board_get_unique_id() from the factory MAC. CH58x is a BLE part, so a unique 6-byte MAC lives in FlashROM at ROM_CFG_MAC_ADDR; GetMACAddress() reads it via FLASH_EEPROM_CMD (in libISP583.a), so no extra source file is needed. The read buffer is TU_ATTR_ALIGNED(4) and 8 bytes, per the SDK's documented 4-byte-aligned, word-granular buffer contract (CH58x_flash.c). - test/hil/tinyusb.json: key ch582m_evt off this board's actual MAC (D443627B5450) instead of the fixed placeholder, like every other board. Verified on ci.lan HIL: ch582m_evt enumerates with serial D443627B5450 and all device examples pass. Co-Authored-By: Claude Opus 4.8 (1M context)

test/hil: add ch582m_evt to CI HIL pool

2026-06-19T14:37:34Z

Add the device-only CH582M-EVT (WCH USBFS via the shared dcd_ch32_usbfs.c), riscv-gcc, flashed by openocd_wch probe 7FD88F0604B5, to tinyusb.json. Also reorder device_tests to keep examples sharing a VID:PID non-adjacent: cdc_msc and cdc_msc_throughput both use cafe:4003, and on boards whose CPU-reset does not drop D+ (e.g. WCH CH58x via openocd) back-to-back same-PID firmware leaves the host on the previous example's cached descriptors, so the new example's CDC never enumerates and the test fails. Moving dfu (cafe:4000) between them changes the PID and forces the host to re-enumerate. Remote HIL on ci.lan: all device examples pass, including cdc_msc_throughput (no skip needed). Co-Authored-By: Claude Opus 4.8 (1M context)