<feed xmlns='http://www.w3.org/2005/Atom'>
<title>tinyusb.git/test, branch worktree-ch569-hydrausb3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/tinyusb.git/atom/test?h=worktree-ch569-hydrausb3</id>
<link rel='self' href='http://cgit.235523.xyz/tinyusb.git/atom/test?h=worktree-ch569-hydrausb3'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/'/>
<updated>2026-07-09T07:34:16Z</updated>
<entry>
<title>hil: update hydrausb3_v1 flasher probe uid (WCH-Link swapped)</title>
<updated>2026-07-09T07:34:16Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-09T07:34:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=03ed840f33756821634e0f0ce5cef9e6a422a956'/>
<id>urn:sha1:03ed840f33756821634e0f0ce5cef9e6a422a956</id>
<content type='text'>
Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE
</content>
</entry>
<entry>
<title>usbtest: skip silicon-impossible cases via bcdDevice quirk flags</title>
<updated>2026-07-09T07:34:13Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-09T07:34:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=62175c3e0d6a5cabf3008667eef0638335a69b3b'/>
<id>urn:sha1:62175c3e0d6a5cabf3008667eef0638335a69b3b</id>
<content type='text'>
The CH569 USBSS ctrl_out flakiness (cases 14/21, host -EPROTO) is a
silicon erratum, not a driver bug: EP0 OUT data stages whose wLength
% 4 == 1 are intermittently dropped at 5 Gbps. Proven by A/B against
WCH's own binary USB3 stack (SimulateCDC EVT demo patched to accept
the gadget-zero 0x5b/0x5c requests), which fails identically on the
same board — independent of host LPM (persists with U1/U2 disabled)
and sysclk (80 vs 120 MHz). Bulk OUT at the same lengths is clean.
Document the erratum in the dcd and drop the ineffective zeroed-BOS
workaround.

Rather than letting known-impossible cases flake the battery, the
firmware now advertises quirk flags in bcdDevice bits 4-7 (tier stays
in bits 0-3): 0x10 skips ctrl_out 14/21, 0x20 skips ep-halt 13 (the
previously proven single-STALL limitation). usbtest.py skips flagged
cases visibly at SuperSpeed only (explicit --tests still runs them)
and reports them in the summary/JSON.

Also fix the CH56x USB3 dcd leaving an endpoint halted across
reconfiguration: clear the stalled flag in dcd_edpt_open/close/
close_all (USB 2.0 9.4.5) so a SET_CONFIGURATION recovery of a
halted-then-reopened endpoint does not STALL forever.

Validated on hydrausb3_v1 at 5000M: tier-4 battery x3 = 27/27 passed
+ 3 skipped, full HIL device suite 12/12 green (MSC 160/134 MB/s).

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE
</content>
</entry>
<entry>
<title>Pass the usbtest battery on CH569 at high and SuperSpeed</title>
<updated>2026-07-08T05:26:08Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-08T05:26:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=597f27d0f46d24c276eb00f62aba6efd4199f2ba'/>
<id>urn:sha1:597f27d0f46d24c276eb00f62aba6efd4199f2ba</id>
<content type='text'>
Running the Linux kernel usbtest/testusb battery against the CH569 for
the first time. Results: 30/30 at high speed (4 consecutive reflash
cycles), 25/26 at SuperSpeed.

DCD fixes found by the battery:
- dcd_ch56x_usbhs: clear-halt on an armed bulk-OUT pipe reset the toggle
  but dropped the queued receive, NAKing forever (usbtest case 29 - the
  same defect previously found on rp2040/fsdev/ch32_usbhs/rusb2)
- dcd_ch56x_usb30: endpoint halt is now latched; the endpoint event
  handler used to clear the response field on every completion, wiping a
  just-set STALL while the peer streamed, and clear-halt now re-arms a
  still-armed transfer with the fresh packet sequence (cases 13/29)

usbtest example gains SuperSpeed support: tier 3 on SS builds, a
4-endpoint SS descriptor set with companions, EP0 512 config and
1024-byte receive buffers.

test/hil/usbtest.py gains SuperSpeed-aware case parameters: bulk sizes
and vary steps must be 1024-multiples at SS or the device's whole-packet
source overruns the host request (case 4 EOVERFLOW).

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE
</content>
</entry>
<entry>
<title>Merge branch 'usbtest': Linux kernel usbtest battery support</title>
<updated>2026-07-08T05:26:08Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-08T05:26:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=4ab165639e9eb520329b3c1ba8bd7d45bf2bf44b'/>
<id>urn:sha1:4ab165639e9eb520329b3c1ba8bd7d45bf2bf44b</id>
<content type='text'>
Brings the usbtest device example (gadget-zero source/sink peer for the
kernel's usbtest.ko/testusb), the test/hil/usbtest.py battery runner and
the extended vendor class driver (interrupt/isochronous endpoints, alt
settings) into the CH569 SuperSpeed branch, enabling the battery to run
against both CH56x dcds.

Conflict resolution: test/hil/tinyusb.json keeps this branch's
hydrausb3_v1 fixture entry and adds the usbtest branch's
ch32v307v_r1_1v0 entry.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE
</content>
</entry>
<entry>
<title>Add CH569 runtime USB2 fallback, HIL board entry and docs</title>
<updated>2026-07-07T04:35:06Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-07T04:35:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=1f48e279c0c8b56b21385870e218242058f86edb'/>
<id>urn:sha1:1f48e279c0c8b56b21385870e218242058f86edb</id>
<content type='text'>
- CFG_TUD_WCH_USB30_FALLBACK (on by default for SPEED=super): the USB3
  dcd owns both controllers on rhport 0. TMR0 times out SuperSpeed link
  training (2x 0.5 s: shut USB3 down, then bring USB2 up); an LTSSM
  disabled event (SS rejected by the port) switches immediately. The
  active controller is dispatched at each dcd entry point; IRQ pendings
  are cleared on switch and dcd_int_enable is mode-aware (a stale LINK
  pending otherwise refires on every usbd queue unlock)
- Bounded link busy-waits (LINK_STATUS busy can stick once the link is
  torn down)
- board_get_unique_id from the factory ID in read-only info flash
  (0x77FE4), so the USB serial identifies the chip (HIL requirement)
- HIL: replace ch582m_evt (probe moved) with hydrausb3_v1
- Regenerate boards.rst, dependencies.rst, BoardPresets.json

Verified on HydraUSB3 v1 (ci rig): SuperSpeed still trains at 5000M
with fallback armed (3x replug); with SS terminations disabled the
device falls back and enumerates fully at 480M. Full HIL run passes
10/10 device tests including cdc_msc at SuperSpeed and
cdc_msc_throughput (MSC 22.1/14.1 MBps read/write at NUMP=1);
non-SuperSpeed-aware examples recover onto USB2 via the fallback.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
</content>
</entry>
<entry>
<title>Add core SuperSpeed device support</title>
<updated>2026-07-07T02:46:25Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-07T02:46:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=67818cb975a7634646c314f9ab96ccb3413e565d'/>
<id>urn:sha1:67818cb975a7634646c314f9ab96ccb3413e565d</id>
<content type='text'>
Groundwork for TinyUSB's first SuperSpeed port (WCH CH569):
- TUSB_SPEED_SUPER, OPT_MODE_SUPER_SPEED, TUD_OPT_SUPER_SPEED and
  TUP_RHPORT_SUPERSPEED capability plumbing
- Allow CFG_TUD_ENDPOINT0_SIZE 512 on SS builds; EP0 control transfers
  chunk at the runtime link speed (512 at SS, 64 on USB2 fallback)
- Handle SET_SEL, SET_ISOCH_DELAY and U1/U2_ENABLE feature requests
- Tolerate SS endpoint companion descriptors in usbd_open_edpt_pair,
  cdcd_open and mscd_open interface parsing
- SS descriptor types/structs and template macros: endpoint companion,
  BOS USB2-extension + SuperSpeed capability, SS config and
  CDC/MSC/vendor SS variants (bulk fixed at 1024)
- cdc_msc example: SS device/config/BOS descriptors, speed-aware sizes
- Unit tests: SS endpoint validation, companion-tolerant endpoint pair
  open, SET_SEL, SET_ISOCH_DELAY

All SS paths compile out when disabled: verified 0-byte code-size delta
on stm32f407disco (MinSizeRel) vs master; 65/65 unit tests pass.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
</content>
</entry>
<entry>
<title>usbtest: negotiated-speed int/iso refill + harden HIL sudoers</title>
<updated>2026-07-07T02:43:50Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-07T02:43:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=1922a1c3afd018fde09e2c4f66142bc3dbe97d9f'/>
<id>urn:sha1:1922a1c3afd018fde09e2c4f66142bc3dbe97d9f</id>
<content type='text'>
Copilot review:
- tud_vendor_int_tx_cb/iso_tx_cb submitted sizeof(chunk) (the HS-capacity buffer)
  instead of the negotiated-speed mps, diverging from usbtest_pump() on an
  HS-capable build enumerated at full speed. Factor the length into shared
  usbtest_int_len()/usbtest_iso_len() helpers used by the pump and both callbacks.
- Reword the usb_descriptors.h comment that still called the plain mps macro
  'live operating speed' — it is the compile-time capability maximum.

Claude review (test/hil/tinyusb-sudoer): drop the two grants that bypassed the
file's root-owned-helper boundary and gave uid 1000 passwordless root:
- /sbin/debugfs (unused; permits '!/bin/sh' shell escape + raw root-disk write).
- /home/*/actions-runner/svc.sh (user-writable script). Replace with a root-owned,
  argument-restricted 'systemctl stop/start actions.runner.*' grant. Also tighten
  the dmesg/uhubctl runas from (ALL) to (root).

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
</content>
</entry>
<entry>
<title>address review round 3: bound the ZLP deselect spin, quote the HIL uid</title>
<updated>2026-07-06T18:33:48Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-06T18:33:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=c5ec54234f405bac231ec7e417db986f3beb4556'/>
<id>urn:sha1:c5ec54234f405bac231ec7e417db986f3beb4556</id>
<content type='text'>
- dcd(rusb2): pipe_zlp_in()'s CURPIPE deselect wait gets the same spin bound as
  the other FIFO waits — it runs with the USB IRQ masked, where any stuck spin
  freezes the stack.
- test/hil: quote the board uid interpolated into the shell=True usbtest
  invocation.

Verified: ra4m1_ek 30/30 through the HIL battery.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
</content>
</entry>
<entry>
<title>address review round 2 (4 fixed, 1 answered)</title>
<updated>2026-07-06T18:23:38Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-06T18:23:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=abd8769781e38bb14153dd6f9dedcc5b3c7b7be2'/>
<id>urn:sha1:abd8769781e38bb14153dd6f9dedcc5b3c7b7be2</id>
<content type='text'>
- dcd(nrf5x): dcd_edpt_iso_activate drops a stale armed transfer (started/
  data_received/iso_in_transfer_ready) — there is no dcd close on this port, so
  a transfer armed before SET_INTERFACE would trip TU_ASSERT(!xfer-&gt;started) on
  the class's next arm after usbd reset the endpoint's claim state.
- class(vendor): tud_vendor_n_mounted() counts the interrupt endpoints, so an
  interrupt-only vendor interface (bulk absent) reports mounted.
- example(usbtest): int/iso write lengths follow the negotiated speed
  (tud_speed_get), not the compile-time capability — a high-speed build
  enumerated at full speed serves the FS descriptor (mps 64/128) and must not
  submit HS-sized packets.
- test/hil: test_example() return annotation matches the (err, status, metric)
  3-tuple it returns.

Verified: feather_nrf52840_express and raspberry_pi_pico 30/30 through the HIL
battery; pico/feather/ch32v307-usbhs builds clean.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
</content>
</entry>
<entry>
<title>test/hil: move ch582m_evt to boards-skip (fixture unplugged)</title>
<updated>2026-07-06T17:35:54Z</updated>
<author>
<name>hathach</name>
<email>thach@tinyusb.org</email>
</author>
<published>2026-07-06T17:35:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/tinyusb.git/commit/?id=24a92e48315db1b54cafd2829cb9ec3f63730499'/>
<id>urn:sha1:24a92e48315db1b54cafd2829cb9ec3f63730499</id>
<content type='text'>
Its board and WCH-Link failed to re-enumerate after the rig reboot and need a
physical replug; skip so HIL runs stay green until then.

Co-Authored-By: Claude Fable 5 &lt;noreply@anthropic.com&gt;
Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
</content>
</entry>
</feed>
