tinyusb.git/tools, branch worktree-ch569-hydrausb3

Add WCH CH32H417 family + nanoCH32H417 board (BSP + USB2 HS dcd)

2026-07-11T21:50:23Z

First stage of the CH32H417/CH32H416 SuperSpeed port (the second WCH SuperSpeed device family after CH569). This lands the family scaffolding and the USB2.0 high-speed device driver; the USB3 dcd is a stub for now (SPEED=super does not link yet). - tools/get_deps.py, src/tusb_option.h (OPT_MCU_CH32H417 2260 + CH32H416 alias): openwch/ch32h417 SDK dependency. - src/common/tusb_mcu.h: OPT_MCU_CH32H417 block with distinct USB IP tokens (TUP_USBIP_WCH_USB30_H417 / _USBHS_H417) so neither the CH569 nor the CH32V307 drivers match; SPEED=super|high selectors mirror the CH569 port; EP0 = 512 on SS. - hw/bsp/ch32h417: family runs entirely on the V3F core (core 0, boot core), single image in the 512 KB shared SRAM (the only SRAM on the bus matrix, USB-DMA reachable). family.c aliases USBSS/USBSS_LINK/USBHS(/TIM12) to one forwarder (the CH569 LTO identical-code-folding hazard applies), SysTick0 tick, USART1 PA9 debug, ESIG unique id. Linker derived from the EVT V3F script. Board nanoCH32H417 (MuseLab): green LED PC2 active-low, WCH-LinkE VCP on USART1. - src/portable/wch/dcd_ch32h417_usbhs.c (+ ch32h417_usbhs_reg.h, dcd_ch32h417.h): USB2.0 HS dcd for the H417 USBHS IP (per-EP INT_ST EP_DIR+EP_ID, SETUP_IS flag, DONE flags, split UEP_TX/RX_EN, NAK/STALL/ACK encoding, manual toggle). Core exposed as ch32h417_usb2_* internals for the upcoming USB3 runtime fallback; no RAMX bounce (all shared SRAM is DMA-capable, unlike CH56x). Build-verified: board_test and cdc_msc SPEED=high link cleanly under the full -Werror set (riscv-none-elf-gcc 13.2). Hardware bring-up pending (see next). Co-Authored-By: Claude Opus 4.8 (1M context) Claude-Session: https://claude.ai/code/session_01QWhrtHjbSVMKcY68vxBwBm

Switch CH569 port to the official openwch/ch569 SDK

2026-07-07T16:08:19Z

Replace the hydrausb3/wch-ch56x-bsp dependency with WCH's official EVT (openwch/ch569 @0424d2968); rename the family hw/bsp/ch56x -> hw/bsp/ch569 to match. Adaptations for the EVT layout and API: - family.cmake/mk: EVT/EXAM/SRC paths (Peripheral/src|inc, RVMSIS, Startup) - CH56xSFR.H case-wrapper (EVT includes the uppercase name, which breaks case-sensitive filesystems) - debug_uart: official UART1_BaudRateCfg + explicit TXD1/RXD1 pin setup (the EVT has no pin-configuring UART init) - family.c: .dmadata (RAMX) zeroing moved into board_init (EVT startup only clears .bss) and a self-contained SPI-ROM reader for the factory unique ID (the EVT flash API is a binary blob, not linked) - dcd_ch56x_usbhs.c: plain volatile casts instead of hydrausb3-only pointer typedefs - -Wno-comment for the EVT's nested header comments Validated: full 19-example CMake sweep + Make build green, 65/65 unit tests, pre-commit clean; on HydraUSB3 hardware cdc_msc_throughput enumerates at SuperSpeed 5000M with MSC 124/110 MB/s read/write (direct-IO dd). Co-Authored-By: Claude Fable 5 Claude-Session: https://claude.ai/code/session_019MRGjBT2NBkCoWwyDT4LaE

Add CH569/CH565 family with HydraUSB3 v1 board and USB2 HS dcd

2026-07-07T03:49:55Z

- OPT_MCU_CH569 (2250) + tusb_mcu.h capability block: USB3 SuperSpeed (USBSS) or USB2 HighSpeed (USBHS) selected at compile time via CFG_TUD_WCH_USBIP_USB30/USBHS, both on rhport 0 - New dcd_ch56x_usbhs.c: CH56x USB2 HS device driver ported from dcd_ch32_usbhs.c (same bit encoding, CH56x-specific register layout: R8_UEPn_MOD enables, different DMA/MAX_LEN/control offsets, 8 EPs). Internals exposed as ch56x_usb2_* (dcd_ch56x.h) for the upcoming USB3 dcd's runtime fallback. USB DMA only reaches RAMX: buffers in the .dmadata section, non-RAMX transfer buffers bounce per-endpoint - hw/bsp/ch56x family (SDK dep hydrausb3/wch-ch56x-bsp, Apache-2.0, no binary blobs) + hydrausb3_v1 board: 120 MHz clock (required for USB3), UART1 PA8/PA7 logging, LED PB22, button PB23, linker script with 16-byte aligned NOLOAD .dmadata section in RAMX - SPEED=high|super build option (default high until the USB3 dcd lands) - CI: add ch56x to riscv-gcc matrix; skip FreeRTOS/audio/video examples (as CH583) and msc_dual_lun (16 KB RAMS, as SAMD11/MKL25) Verified: cdc_msc builds via CMake and Make; full example sweep green; .dmadata lands at 0x20020000 (RAMX) with 16-byte alignment. Co-Authored-By: Claude Fable 5

docs: convert changelog release notes from RST to Markdown (#3746)

2026-06-30T15:27:27Z

* docs: convert changelog release notes from RST to Markdown

docs: move changelog to docs/changelog, drop the docs/info folder

2026-06-30T07:39:57Z

Relocate docs/info/changelog/ -> docs/changelog/ (docs/info held only the changelog) and update all references: the toctree, README + MAINTAINERS links, make_release.py, and the make-release skill. Co-Authored-By: Claude Opus 4.8 (1M context)

build.py: keep only raspberry_pi_pico in rp2040 ci_preferred_boards

2026-06-30T06:37:29Z

The one-board selector uses preferred_list[0] anyway, so pico is the board built. Co-Authored-By: Claude Opus 4.8 (1M context)

build.py: prefer pico/pico2 for rp2040 CI; skill: drop one-time 0.20.0 backfill note

2026-06-30T06:35:35Z

- ci_preferred_boards: rp2040 -> raspberry_pi_pico, raspberry_pi_pico2 so the one-board CI/metrics build uses a Pico (the first-alphabetical board failed). - make-release skill: the metrics backfill was a one-time 0.20.0 task, not a recurring release step; keep only the CI auto-compare note. Co-Authored-By: Claude Opus 4.8 (1M context)

Fix code-review findings (changelog rendering, release skill, sidebar)

2026-06-30T03:57:26Z

- changelog: fix 3 silent RST mis-renders carried over from the old monolith — Markdown link in 0.7.0, mismatched/single backticks in 0.18.0 / 0.20.0 - make-release skill contributors one-liner: parallelize the gh fetch, anchor the bot filter (was a substring that dropped handles like "abbott"), and join with ", " (paste -sd cycles the delimiter -> "@a,@b @c"); finalize now stages only the reviewed set (git add -A -- ':!.idea'); drop the obsolete CRLF gotcha - make_release.py: emit LF not CRLF in the repository.yml insertion (fixes the gotcha at the source) - docs sidebar: drop the hardcoded furo component list; override brand.html to include furo's own template + the sponsor button (decoupled from furo internals, no upper-bound pin needed); move sponsor styles into custom.css - .pre-commit-config.yaml: drop stale end-of-file-fixer excludes for the deleted contributors/CoC include shims Co-Authored-By: Claude Opus 4.8 (1M context)

Bump version to 0.21.0; rework changelog, contributors, and docs

2026-06-29T16:38:01Z

Release: - Bump version to 0.21.0 and regenerate tusb_option.h, library.json, repository.yml, sonar-project.properties, boards.rst, dependencies.rst - Add 0.21.0 release notes and split the changelog into per-release files under docs/info/changelog/ (date out of title, driver/class groups as sub-headings, DCD & HCD section after Device/Host stacks) Contributors: - Credit each release's PR authors in a Contributors section - Drop the curated contributors page; add MAINTAINERS.rst Docs: - Update Code of Conduct to Contributor Covenant 3.0 (keep it in the repo, remove it from the built docs) - Sidebar: add a home entry, rename the group to "Documentation", move Changelog into it, add a GitHub Sponsor button, merge external links, rename FAQ; hide the inline toctree on the landing page - Add the make-release skill and update the AGENTS.md release process Co-Authored-By: Claude Opus 4.8 (1M context)

Merge pull request #3743 from hathach/claude/build-doc-skill

2026-06-29T05:56:16Z

docs: add build-doc tooling and a README for every example