remove bcm files

8 files changed, 0 insertions, 524 deletions

diff --git a/hw/mcu/broadcom/bcm2711/boot.s b/hw/mcu/broadcom/bcm2711/boot.s
deleted file mode 100644
index dcc588924..000000000
--- a/hw/mcu/broadcom/bcm2711/boot.s
+++ /dev/null
@@ -1,172 +0,0 @@
-.section ".text.boot"  // Make sure the linker puts this at the start of the kernel image
-
-.global _start  // Execution starts here
-
-_start:
-    // Check processor ID is zero (executing on main core), else hang
-    mrs     x1, mpidr_el1
-    and     x1, x1, #3
-    cbz     x1, 2f
-    // We're not on the main core, so hang in an infinite wait loop
-1:  wfe
-    b       1b
-2:  // We're on the main core!
-
-    // Set stack to start below our code
-    ldr     x1, =_start
-    mov     sp, x1
-
-    adr    x0, vectors        // load VBAR_EL1 with virtual
-    // msr    vbar_el3, x0        // vector table address
-    msr    vbar_el1, x0        // vector table address
-    msr    vbar_el2, x0        // vector table address
-    isb
-
-    // Clean the BSS section
-    ldr     x1, =__bss_start     // Start address
-    ldr     w2, =__bss_size      // Size of the section
-3:  cbz     w2, 4f               // Quit loop if zero
-    str     xzr, [x1], #8
-    sub     w2, w2, #1
-    cbnz    w2, 3b               // Loop if non-zero
-
-    // Jump to our main() routine in C (make sure it doesn't return)
-4:  bl      main
-    // In case it does return, halt the master core too
-    b       1b
-
-.macro  ventry  label
-.align  7
-b   \label
-.endm
-
-.macro handle_invalid_entry type
-irq_entry
-mov x0, #\type
-mrs x1, esr_el1
-mrs x2, elr_el1
-mrs x3, esr_el2
-mrs x4, elr_el2
-b   err_hang
-.endm
-
-.macro  irq_entry
-sub sp, sp, #272
-stp x0, x1, [sp, #16 * 0]
-stp x2, x3, [sp, #16 * 1]
-stp x4, x5, [sp, #16 * 2]
-stp x6, x7, [sp, #16 * 3]
-stp x8, x9, [sp, #16 * 4]
-stp x10, x11, [sp, #16 * 5]
-stp x12, x13, [sp, #16 * 6]
-stp x14, x15, [sp, #16 * 7]
-stp x16, x17, [sp, #16 * 8]
-stp x18, x19, [sp, #16 * 9]
-stp x20, x21, [sp, #16 * 10]
-stp x22, x23, [sp, #16 * 11]
-stp x24, x25, [sp, #16 * 12]
-stp x26, x27, [sp, #16 * 13]
-stp x28, x29, [sp, #16 * 14]
-str x30, [sp, #16 * 15] 
-.endm
-
-.macro  irq_exit
-ldp x0, x1, [sp, #16 * 0]
-ldp x2, x3, [sp, #16 * 1]
-ldp x4, x5, [sp, #16 * 2]
-ldp x6, x7, [sp, #16 * 3]
-ldp x8, x9, [sp, #16 * 4]
-ldp x10, x11, [sp, #16 * 5]
-ldp x12, x13, [sp, #16 * 6]
-ldp x14, x15, [sp, #16 * 7]
-ldp x16, x17, [sp, #16 * 8]
-ldp x18, x19, [sp, #16 * 9]
-ldp x20, x21, [sp, #16 * 10]
-ldp x22, x23, [sp, #16 * 11]
-ldp x24, x25, [sp, #16 * 12]
-ldp x26, x27, [sp, #16 * 13]
-ldp x28, x29, [sp, #16 * 14]
-ldr x30, [sp, #16 * 15] 
-add sp, sp, #272       
-eret
-.endm
-
-
-/*
- * Exception vectors.
- */
-.align  11
-.globl vectors 
-vectors:
-    ventry  sync_invalid_el1t           // Synchronous EL1t
-    ventry  irq_invalid_el1t            // IRQ EL1t
-    ventry  fiq_invalid_el1t            // FIQ EL1t
-    ventry  error_invalid_el1t          // Error EL1t
-
-    ventry  sync_invalid_el1h           // Synchronous EL1h
-    ventry  el1_irq                 // IRQ EL1h
-    ventry  fiq_invalid_el1h            // FIQ EL1h
-    ventry  error_invalid_el1h          // Error EL1h
-
-    ventry  sync_invalid_el0_64         // Synchronous 64-bit EL0
-    ventry  irq_invalid_el0_64          // IRQ 64-bit EL0
-    ventry  fiq_invalid_el0_64          // FIQ 64-bit EL0
-    ventry  error_invalid_el0_64            // Error 64-bit EL0
-
-    ventry  sync_invalid_el0_32         // Synchronous 32-bit EL0
-    ventry  irq_invalid_el0_32          // IRQ 32-bit EL0
-    ventry  fiq_invalid_el0_32          // FIQ 32-bit EL0
-    ventry  error_invalid_el0_32            // Error 32-bit EL0
-
-sync_invalid_el1t:
-    handle_invalid_entry  0
-
-irq_invalid_el1t:
-    handle_invalid_entry  1
-
-fiq_invalid_el1t:
-    handle_invalid_entry  2
-
-error_invalid_el1t:
-    handle_invalid_entry  3
-
-sync_invalid_el1h:
-    handle_invalid_entry  4
-
-fiq_invalid_el1h:
-    handle_invalid_entry  5
-
-error_invalid_el1h:
-    handle_invalid_entry  6
-
-sync_invalid_el0_64:
-    handle_invalid_entry  7
-
-irq_invalid_el0_64:
-    handle_invalid_entry  8
-
-fiq_invalid_el0_64:
-    handle_invalid_entry  9
-
-error_invalid_el0_64:
-    handle_invalid_entry  10
-
-sync_invalid_el0_32:
-    handle_invalid_entry  11
-
-irq_invalid_el0_32:
-    handle_invalid_entry  12
-
-fiq_invalid_el0_32:
-    handle_invalid_entry  13
-
-error_invalid_el0_32:
-    handle_invalid_entry  14
-
-el1_irq:
-    irq_entry 
-    bl  handle_irq
-    irq_exit 
-
-.globl err_hang
-err_hang: b err_hang
diff --git a/hw/mcu/broadcom/bcm2711/interrupts.c b/hw/mcu/broadcom/bcm2711/interrupts.c
deleted file mode 100644
index cb5607526..000000000
--- a/hw/mcu/broadcom/bcm2711/interrupts.c
+++ /dev/null
@@ -1,26 +0,0 @@
-#include <stdbool.h>
-#include <stdint.h>
-
-void disable_async_interrupts(void) {
-    
-}
-
-void enable_async_interrupts(void) {
-    
-}
-
-void Default_Handler(void) {
-    while (true) {}
-}
-
-__attribute__((weak)) void handle_irq(void) {
-    unsigned int irq = *((volatile uint32_t*) 0x3F00B204);
-    switch (irq) {
-        // case (SYSTEM_TIMER_IRQ_1):
-        //     handle_timer_irq();
-        //     break;
-        default:
-            // printf("Unknown pending irq: %x\r\n", irq);
-            Default_Handler();
-    }
-}
\ No newline at end of file
diff --git a/hw/mcu/broadcom/bcm2711/interrupts.h b/hw/mcu/broadcom/bcm2711/interrupts.h
deleted file mode 100644
index 5f36d6daa..000000000
--- a/hw/mcu/broadcom/bcm2711/interrupts.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#pragma once
-
-void disable_async_interrupts(void);
-void enable_async_interrupts(void);
-
-#define GIC_BASE 0x4c0040000
-#define NUM_CPUS 4
-#define NUM_SPIS 192
diff --git a/hw/mcu/broadcom/bcm2711/io.c b/hw/mcu/broadcom/bcm2711/io.c
deleted file mode 100644
index 8ccfdc692..000000000
--- a/hw/mcu/broadcom/bcm2711/io.c
+++ /dev/null
@@ -1,170 +0,0 @@
-// From: https://github.com/isometimes/rpi4-osdev/blob/master/part4-miniuart/io.c
-// CC-0 License
-
-// GPIO
-
-// Pi 4 base address: 0xFE000000
-// Pi 3 base address: 0x3F000000
-enum {
-    PERIPHERAL_BASE = 0xFE000000,
-    GPFSEL0         = PERIPHERAL_BASE + 0x200000,
-    GPSET0          = PERIPHERAL_BASE + 0x20001C,
-    GPCLR0          = PERIPHERAL_BASE + 0x200028,
-    GPPUPPDN0       = PERIPHERAL_BASE + 0x2000E4
-};
-
-enum {
-    GPIO_MAX_PIN       = 53,
-    GPIO_FUNCTION_OUT  = 1,
-    GPIO_FUNCTION_ALT5 = 2,
-    GPIO_FUNCTION_ALT3 = 7
-};
-
-enum {
-    Pull_None = 0,
-    Pull_Down = 1, // Are down and up the right way around?
-    Pull_Up = 2
-};
-
-void mmio_write(long reg, unsigned int val) { *(volatile unsigned int *)reg = val; }
-unsigned int mmio_read(long reg) { return *(volatile unsigned int *)reg; }
-
-unsigned int gpio_call(unsigned int pin_number, unsigned int value, unsigned int base, unsigned int field_size, unsigned int field_max) {
-    unsigned int field_mask = (1 << field_size) - 1;
-  
-    if (pin_number > field_max) return 0;
-    if (value > field_mask) return 0; 
-
-    unsigned int num_fields = 32 / field_size;
-    unsigned int reg = base + ((pin_number / num_fields) * 4);
-    unsigned int shift = (pin_number % num_fields) * field_size;
-
-    unsigned int curval = mmio_read(reg);
-    curval &= ~(field_mask << shift);
-    curval |= value << shift;
-    mmio_write(reg, curval);
-
-    return 1;
-}
-
-unsigned int gpio_set     (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPSET0, 1, GPIO_MAX_PIN); }
-unsigned int gpio_clear   (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPCLR0, 1, GPIO_MAX_PIN); }
-unsigned int gpio_pull    (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPPUPPDN0, 2, GPIO_MAX_PIN); }
-unsigned int gpio_function(unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPFSEL0, 3, GPIO_MAX_PIN); }
-
-void gpio_useAsAlt3(unsigned int pin_number) {
-    gpio_pull(pin_number, Pull_None);
-    gpio_function(pin_number, GPIO_FUNCTION_ALT3);
-}
-
-void gpio_useAsAlt5(unsigned int pin_number) {
-    gpio_pull(pin_number, Pull_None);
-    gpio_function(pin_number, GPIO_FUNCTION_ALT5);
-}
-
-void gpio_initOutputPinWithPullNone(unsigned int pin_number) {
-    gpio_pull(pin_number, Pull_None);
-    gpio_function(pin_number, GPIO_FUNCTION_OUT);
-}
-
-void gpio_setPinOutputBool(unsigned int pin_number, unsigned int onOrOff) {
-    if (onOrOff) {
-        gpio_set(pin_number, 1);
-    } else {
-        gpio_clear(pin_number, 1);
-    }
-}
-
-// UART
-
-enum {
-    AUX_BASE        = PERIPHERAL_BASE + 0x215000,
-    AUX_IRQ         = AUX_BASE,
-    AUX_ENABLES     = AUX_BASE + 4,
-    AUX_MU_IO_REG   = AUX_BASE + 64,
-    AUX_MU_IER_REG  = AUX_BASE + 68,
-    AUX_MU_IIR_REG  = AUX_BASE + 72,
-    AUX_MU_LCR_REG  = AUX_BASE + 76,
-    AUX_MU_MCR_REG  = AUX_BASE + 80,
-    AUX_MU_LSR_REG  = AUX_BASE + 84,
-    AUX_MU_MSR_REG  = AUX_BASE + 88,
-    AUX_MU_SCRATCH  = AUX_BASE + 92,
-    AUX_MU_CNTL_REG = AUX_BASE + 96,
-    AUX_MU_STAT_REG = AUX_BASE + 100,
-    AUX_MU_BAUD_REG = AUX_BASE + 104,
-    AUX_UART_CLOCK  = 500000000,
-    UART_MAX_QUEUE  = 16 * 1024
-};
-
-#define AUX_MU_BAUD(baud) ((AUX_UART_CLOCK/(baud*8))-1)
-
-unsigned char uart_output_queue[UART_MAX_QUEUE];
-unsigned int uart_output_queue_write = 0;
-unsigned int uart_output_queue_read = 0;
-
-void uart_init(void) {
-    mmio_write(AUX_ENABLES, 1); //enable UART1
-    mmio_write(AUX_MU_IER_REG, 0);
-    mmio_write(AUX_MU_CNTL_REG, 0);
-    mmio_write(AUX_MU_LCR_REG, 3); //8 bits
-    mmio_write(AUX_MU_MCR_REG, 0);
-    mmio_write(AUX_MU_IER_REG, 0);
-    mmio_write(AUX_MU_IIR_REG, 0xC6); //disable interrupts
-    mmio_write(AUX_MU_BAUD_REG, AUX_MU_BAUD(115200));
-    gpio_useAsAlt5(14);
-    gpio_useAsAlt5(15);
-    mmio_write(AUX_MU_CNTL_REG, 3); //enable RX/TX
-}
-
-unsigned int uart_isOutputQueueEmpty(void) {
-    return uart_output_queue_read == uart_output_queue_write;
-}
-
-unsigned int uart_isReadByteReady(void)  { return mmio_read(AUX_MU_LSR_REG) & 0x01; }
-unsigned int uart_isWriteByteReady(void) { return mmio_read(AUX_MU_LSR_REG) & 0x20; }
-
-unsigned char uart_readByte(void) {
-    while (!uart_isReadByteReady());
-    return (unsigned char)mmio_read(AUX_MU_IO_REG);
-}
-
-void uart_writeByteBlockingActual(unsigned char ch) {
-    while (!uart_isWriteByteReady()); 
-    mmio_write(AUX_MU_IO_REG, (unsigned int)ch);
-}
-
-void uart_loadOutputFifo(void) {
-    while (!uart_isOutputQueueEmpty() && uart_isWriteByteReady()) {
-        uart_writeByteBlockingActual(uart_output_queue[uart_output_queue_read]);
-        uart_output_queue_read = (uart_output_queue_read + 1) & (UART_MAX_QUEUE - 1); // Don't overrun
-    }
-}
-
-void uart_writeByteBlocking(unsigned char ch) {
-    unsigned int next = (uart_output_queue_write + 1) & (UART_MAX_QUEUE - 1); // Don't overrun
-
-    while (next == uart_output_queue_read) uart_loadOutputFifo();
-
-    uart_output_queue[uart_output_queue_write] = ch;
-    uart_output_queue_write = next;
-}
-
-void uart_writeText(const char *buffer) {
-    while (*buffer) {
-       if (*buffer == '\n') uart_writeByteBlocking('\r');
-       uart_writeByteBlocking(*buffer++);
-    }
-}
-
-void uart_drainOutputQueue(void) {
-    while (!uart_isOutputQueueEmpty()) uart_loadOutputFifo();
-}
-
-void uart_update(void) {
-    uart_loadOutputFifo();
-
-    if (uart_isReadByteReady()) {
-       unsigned char ch = uart_readByte();
-       if (ch == '\r') uart_writeText("\n"); else uart_writeByteBlocking(ch);
-    }
-}
diff --git a/hw/mcu/broadcom/bcm2711/io.h b/hw/mcu/broadcom/bcm2711/io.h
deleted file mode 100644
index 9f70ce504..000000000
--- a/hw/mcu/broadcom/bcm2711/io.h
+++ /dev/null
@@ -1,13 +0,0 @@
-// From: https://github.com/isometimes/rpi4-osdev/blob/master/part4-miniuart/io.h
-// CC-0 License
-
-void uart_init(void);
-void uart_writeText(const char *buffer);
-void uart_loadOutputFifo(void);
-unsigned char uart_readByte(void);
-unsigned int uart_isReadByteReady(void);
-void uart_writeByteBlocking(unsigned char ch);
-void uart_update(void);
-void gpio_setPinOutputBool(unsigned int pin_number, unsigned int onOrOff);
-void uart_writeByteBlockingActual(unsigned char ch);
-void gpio_initOutputPinWithPullNone(unsigned int pin_number);
diff --git a/hw/mcu/broadcom/bcm2711/link.ld b/hw/mcu/broadcom/bcm2711/link.ld
deleted file mode 100644
index 43c4e722f..000000000
--- a/hw/mcu/broadcom/bcm2711/link.ld
+++ /dev/null
@@ -1,28 +0,0 @@
-SECTIONS
-{
-    . = 0x80000;     /* Kernel load address for AArch64 */
-    .text : {
-        KEEP(*(.text.boot))
-        *(.text .text.* .gnu.linkonce.t*)
-    }
-    .rodata : {
-        . = ALIGN(4096);
-        *(.rodata .rodata.* .gnu.linkonce.r*)
-    }
-    PROVIDE(_data = .);
-    .data : {
-        . = ALIGN(4096);
-        *(.data .data.* .gnu.linkonce.d*)
-    }
-    .bss (NOLOAD) : {
-        __bss_start = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        __bss_end = .;
-    }
-    _end = .;
-    end = .;
-
-   /DISCARD/ : { *(.comment) *(.gnu*) *(.note*) *(.eh_frame*) }
-}
-__bss_size = (__bss_end - __bss_start)>>3;
diff --git a/hw/mcu/broadcom/bcm2711/mmu.c b/hw/mcu/broadcom/bcm2711/mmu.c
deleted file mode 100644
index e5ae236bd..000000000
--- a/hw/mcu/broadcom/bcm2711/mmu.c
+++ /dev/null
@@ -1,62 +0,0 @@
-#include <stdbool.h>
-#include <stdint.h>
-
-
-#include "mmu.h"
-
-// Each entry is a gig.
-volatile uint64_t level_1_table[512] __attribute__((aligned(4096)));
-
-// Third gig has peripherals
-uint64_t level_2_0x0_c000_0000_to_0x1_0000_0000[512] __attribute__((aligned(4096)));
-
-void setup_mmu_flat_map(void) {
-    // Set the first gig to regular access.
-    level_1_table[0] = 0x0000000000000000 | 
-                       MM_DESCRIPTOR_MAIR_INDEX(MT_NORMAL_NC) |
-                       MM_DESCRIPTOR_ACCESS_FLAG |
-                       MM_DESCRIPTOR_BLOCK |
-                       MM_DESCRIPTOR_VALID;
-    level_1_table[3] = ((uint64_t) level_2_0x0_c000_0000_to_0x1_0000_0000) |
-                       MM_DESCRIPTOR_TABLE |
-                       MM_DESCRIPTOR_VALID;
-    // Set peripherals to register access.
-    for (uint64_t i = 480; i < 512; i++) {
-        level_2_0x0_c000_0000_to_0x1_0000_0000[i] = (0x00000000c0000000 + (i << 21)) |
-                                                    MM_DESCRIPTOR_EXECUTE_NEVER |
-                                                    MM_DESCRIPTOR_MAIR_INDEX(MT_DEVICE_nGnRnE) |
-                                                    MM_DESCRIPTOR_ACCESS_FLAG |
-                                                    MM_DESCRIPTOR_BLOCK |
-                                                    MM_DESCRIPTOR_VALID;
-    }
-    uint64_t mair = MAIR_VALUE;
-    uint64_t tcr = TCR_VALUE;
-    uint64_t ttbr0 = ((uint64_t) level_1_table) | MM_TTBR_CNP;
-    uint64_t sctlr = 0;
-    __asm__ volatile (
-        // Set MAIR
-        "MSR MAIR_EL2, %[mair]\n\t"
-        // Set TTBR0
-        "MSR TTBR0_EL2, %[ttbr0]\n\t"
-        // Set TCR
-        "MSR TCR_EL2, %[tcr]\n\t"
-        // The ISB forces these changes to be seen before the MMU is enabled.
-        "ISB\n\t"
-        // Read System Control Register configuration data
-        "MRS %[sctlr], SCTLR_EL2\n\t"
-        // Write System Control Register configuration data
-        "ORR %[sctlr], %[sctlr], #1\n\t"
-        // Set [M] bit and enable the MMU.
-        "MSR SCTLR_EL2, %[sctlr]\n\t"
-        // The ISB forces these changes to be seen by the next instruction
-        "ISB\n\t"
-        // "AT S1EL2R %[ttbr0]"
-        : /* No outputs. */
-        : [mair] "r" (mair),
-          [tcr] "r" (tcr),
-          [ttbr0] "r" (ttbr0),
-          [sctlr] "r" (sctlr)
-    );
-    //__asm__ ("brk #123");
-    //while (true) {}
-}
diff --git a/hw/mcu/broadcom/bcm2711/mmu.h b/hw/mcu/broadcom/bcm2711/mmu.h
deleted file mode 100644
index 1fe081f34..000000000
--- a/hw/mcu/broadcom/bcm2711/mmu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#pragma once
-
-
-// From: https://github.com/s-matyukevich/raspberry-pi-os/blob/master/docs/lesson06/rpi-os.md
-/*
- * Memory region attributes:
- *
- *   n = AttrIndx[2:0]
- *            n    MAIR
- *   DEVICE_nGnRnE    000    00000000
- *   NORMAL_NC        001    01000100
- */
-#define MT_DEVICE_nGnRnE         0x0
-#define MT_NORMAL_NC            0x1
-#define MT_DEVICE_nGnRnE_FLAGS        0x00
-#define MT_NORMAL_NC_FLAGS          0xff
-#define MAIR_VALUE            (MT_DEVICE_nGnRnE_FLAGS << (8 * MT_DEVICE_nGnRnE)) | (MT_NORMAL_NC_FLAGS << (8 * MT_NORMAL_NC))
-
-
-#define TCR_T0SZ            (64 - 36) 
-#define TCR_PS              (0x01 << 16) // 36-bit physical address
-#define TCR_TG0_4K          (0 << 14)
-#define TCR_SH0_OUTER_SHAREABLE (0x2 << 12)
-#define TCR_VALUE           (TCR_T0SZ | TCR_PS | TCR_TG0_4K | TCR_SH0_OUTER_SHAREABLE)
-
-#define ENTRY_TYPE_TABLE_DESCRIPTOR 0x11
-#define ENTRY_TYPE_BLOCK_ENTRY 0x01
-#define ENTRY_TYPE_TABLE_ENTRY 0x11
-#define ENTRY_TYPE_INVALID 0x00
-
-#define MM_DESCRIPTOR_VALID (0x1)
-
-#define MM_DESCRIPTOR_BLOCK (0x0 << 1)
-#define MM_DESCRIPTOR_TABLE (0x1 << 1)
-
-// Block attributes
-#define MM_DESCRIPTOR_EXECUTE_NEVER (0x1ull << 54)
-#define MM_DESCRIPTOR_CONTIGUOUS    (0x1ull << 52)
-#define MM_DESCRIPTOR_ACCESS_FLAG   (0x1ull << 10)
-
-#define MM_DESCRIPTOR_MAIR_INDEX(index) (index << 2)
-
-#define MM_TTBR_CNP (0x1)
-
-void setup_mmu_flat_map(void);