diff options
| author | hathach <[email protected]> | 2018-11-20 12:44:29 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2018-11-20 12:44:29 +0700 |
| commit | 0b722a4766160b1738ac1c1bf03d5839c38b15c3 (patch) | |
| tree | 1e672cd331580ce30569eba732691d312f1971bf | |
| parent | 5e65886fdd2bc5bac4ee9335fff1726f9382c109 (diff) | |
use correct samd51 startup
able to carry some usb transfer
| -rw-r--r-- | examples/device/device_composite/ses/device_composite.emProject | 20 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml (renamed from examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml) | 3 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml (renamed from examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml) | 2827 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s | 1227 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s | 1223 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/SAMD51_Startup.s (renamed from examples/device/device_composite/ses/ses_samd51/SAME51_Startup.s) | 0 | ||||
| -rw-r--r-- | examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js (renamed from examples/device/device_composite/ses/ses_samd51/SAME51_Target.js) | 0 |
7 files changed, 1689 insertions, 3611 deletions
diff --git a/examples/device/device_composite/ses/device_composite.emProject b/examples/device/device_composite/ses/device_composite.emProject index 371ef8bb7..54395e5ad 100644 --- a/examples/device/device_composite/ses/device_composite.emProject +++ b/examples/device/device_composite/ses/device_composite.emProject @@ -118,20 +118,20 @@ arm_target_device_name="ATSAMD51J19" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__SAME51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;BOARD_METRO_M4_EXPRESS;CIRCUITPY_GCLK_INIT_1ST=0xffff;CFG_TUSB_MCU=OPT_MCU_SAMD51" + c_preprocessor_definitions="__SAMD51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CIRCUITPY_GCLK_INIT_1ST=0xffff;BOARD_METRO_M4_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD51" c_user_include_directories="../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk" - debug_register_definition_file="ses_samd51/ATSAME51J19A_Registers.xml" + debug_register_definition_file="ses_samd51/ATSAMD51J19A_Registers.xml" debug_target_connection="J-Link" gcc_entry_point="Reset_Handler" link_use_linker_script_file="No" - linker_memory_map_file="ses_samd51/ATSAME51J19A_MemoryMap.xml" + linker_memory_map_file="$(ProjectDir)/ses_samd51/ATSAMD51J19A_MemoryMap.xml" linker_section_placement_file="ses_samd51/flash_placement.xml" linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000" - macros="DeviceFamily=SAME51;Target=ATSAME51J19A;Placement=Flash;rootDir=../../../..;asf4Dir=../../../../hw/mcu/microchip/samd/asf4/samd51" + macros="DeviceFamily=SAMD51;Target=ATSAMD51J19A;Placement=Flash;rootDir=../../../..;asf4Dir=../../../../hw/mcu/microchip/samd/asf4/samd51" project_directory="" project_type="Executable" target_reset_script="Reset();" - target_script_file="$(ProjectDir)/ses_samd51/SAME51_Target.js" + target_script_file="$(ProjectDir)/ses_samd51/SAMD51_Target.js" target_trace_initialize_script="EnableTrace("$(TraceInterfaceType)")" /> <folder Name="tinyusb" @@ -181,13 +181,13 @@ </folder> <configuration Name="Debug" build_treat_warnings_as_errors="Yes" /> <folder Name="ses_samd51"> - <file file_name="ses_samd51/ATSAME51J19A_MemoryMap.xml" /> - <file file_name="ses_samd51/ATSAME51J19A_Registers.xml" /> - <file file_name="ses_samd51/ATSAME51J19A_Vectors.s" /> + <file file_name="ses_samd51/ATSAMD51J19A_MemoryMap.xml" /> + <file file_name="ses_samd51/ATSAMD51J19A_Registers.xml" /> + <file file_name="ses_samd51/ATSAMD51J19A_Vectors.s" /> <file file_name="ses_samd51/flash_placement.xml" /> + <file file_name="ses_samd51/SAMD51_Startup.s" /> + <file file_name="ses_samd51/SAMD51_Target.js" /> <file file_name="ses_samd51/thumb_crt0.s" /> - <file file_name="ses_samd51/SAME51_Startup.s" /> - <file file_name="ses_samd51/SAME51_Target.js" /> </folder> <folder Name="src" diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml index 85094431e..49d9a9cbd 100644 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml @@ -1,5 +1,6 @@ <!DOCTYPE Board_Memory_Definition_File> -<root name="ATSAME51J19A"> +<root name="ATSAMD51J19A"> <MemorySegment name="FLASH" start="0x00004000" size="0x0007C000" access="ReadOnly" /> <MemorySegment name="RAM" start="0x20000000" size="0x00030000" access="Read/Write" /> + <MemorySegment name="RAM2" start="0x47000000" size="0x00002000" access="Read/Write" /> </root> diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml index 3fdb53f84..83fe837fa 100644 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml @@ -1,5 +1,5 @@ <!DOCTYPE Register_Definition_File> -<Processor name="ATSAME51J19A" description="Atmel ATSAME51J19A device: Cortex-M4 Microcontroller with 512KB Flash, 192KB SRAM, 64-pin package (refer to http://www.atmel.com/devices/SAME51J19A.aspx for more)"> +<Processor name="ATSAMD51J19A" description="Atmel ATSAMD51J19A device: Cortex-M4 Microcontroller with 512KB Flash, 192KB SRAM, 64-pin package (refer to http://www.atmel.com/devices/SAMD51J19A.aspx for more)"> <RegisterGroup name="AC" start="0x42002000" description="Analog Comparators"> <Register start="+0x00" size="1" name="AC_CTRLA" access="Read/Write" description="Control A" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> <BitField start="0" size="1" name="SWRST" description="Software Reset" /> @@ -708,1376 +708,6 @@ <Register start="+0x80" size="4" name="AES_CIPLEN" access="Read/Write" description="Cipher Length" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x84" size="4" name="AES_RANDSEED" access="Read/Write" description="Random Seed" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> </RegisterGroup> - <RegisterGroup name="CAN0" start="0x42000000" description="Control Area Network 0"> - <Register start="+0x00" size="4" name="CAN_CREL" access="ReadOnly" description="Core Release" reset_value="0x32100000" reset_mask="0xFFFFFFFF"> - <BitField start="20" size="4" name="SUBSTEP" description="Sub-step of Core Release" /> - <BitField start="24" size="4" name="STEP" description="Step of Core Release" /> - <BitField start="28" size="4" name="REL" description="Core Release" /> - </Register> - <Register start="+0x04" size="4" name="CAN_ENDN" access="ReadOnly" description="Endian" reset_value="0x87654321" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="32" name="ETV" description="Endianness Test Value" /> - </Register> - <Register start="+0x08" size="4" name="CAN_MRCFG" access="Read/Write" description="Message RAM Configuration" reset_value="0x00000002" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="2" name="QOS" description="Quality of Service"> - <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" /> - <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" /> - <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" /> - <Enum name="HIGH" start="0x3" description="Critical Latency" /> - </BitField> - </Register> - <Register start="+0x0C" size="4" name="CAN_DBTP" access="Read/Write" description="Fast Bit Timing and Prescaler" reset_value="0x00000A33" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="4" name="DSJW" description="Data (Re)Synchronization Jump Width" /> - <BitField start="4" size="4" name="DTSEG2" description="Data time segment after sample point" /> - <BitField start="8" size="5" name="DTSEG1" description="Data time segment before sample point" /> - <BitField start="16" size="5" name="DBRP" description="Data Baud Rate Prescaler" /> - <BitField start="23" size="1" name="TDC" description="Tranceiver Delay Compensation" /> - </Register> - <Register start="+0x10" size="4" name="CAN_TEST" access="Read/Write" description="Test" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="4" size="1" name="LBCK" description="Loop Back Mode" /> - <BitField start="5" size="2" name="TX" description="Control of Transmit Pin"> - <Enum name="CORE" start="0x0" description="TX controlled by CAN core" /> - <Enum name="SAMPLE" start="0x1" description="TX monitoring sample point" /> - <Enum name="DOMINANT" start="0x2" description="Dominant (0) level at pin CAN_TX" /> - <Enum name="RECESSIVE" start="0x3" description="Recessive (1) level at pin CAN_TX" /> - </BitField> - <BitField start="7" size="1" name="RX" description="Receive Pin" /> - </Register> - <Register start="+0x14" size="4" name="CAN_RWD" access="Read/Write" description="RAM Watchdog" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="8" name="WDC" description="Watchdog Configuration" /> - <BitField start="8" size="8" name="WDV" description="Watchdog Value" /> - </Register> - <Register start="+0x18" size="4" name="CAN_CCCR" access="Read/Write" description="CC Control" reset_value="0x00000001" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="INIT" description="Initialization" /> - <BitField start="1" size="1" name="CCE" description="Configuration Change Enable" /> - <BitField start="2" size="1" name="ASM" description="ASM Restricted Operation Mode" /> - <BitField start="3" size="1" name="CSA" description="Clock Stop Acknowledge" /> - <BitField start="4" size="1" name="CSR" description="Clock Stop Request" /> - <BitField start="5" size="1" name="MON" description="Bus Monitoring Mode" /> - <BitField start="6" size="1" name="DAR" description="Disable Automatic Retransmission" /> - <BitField start="7" size="1" name="TEST" description="Test Mode Enable" /> - <BitField start="8" size="1" name="FDOE" description="FD Operation Enable" /> - <BitField start="9" size="1" name="BRSE" description="Bit Rate Switch Enable" /> - <BitField start="12" size="1" name="PXHD" description="Protocol Exception Handling Disable" /> - <BitField start="13" size="1" name="EFBI" description="Edge Filtering during Bus Integration" /> - <BitField start="14" size="1" name="TXP" description="Transmit Pause" /> - <BitField start="15" size="1" name="NISO" description="Non ISO Operation" /> - </Register> - <Register start="+0x1C" size="4" name="CAN_NBTP" access="Read/Write" description="Nominal Bit Timing and Prescaler" reset_value="0x06000A03" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="NTSEG2" description="Nominal Time segment after sample point" /> - <BitField start="8" size="8" name="NTSEG1" description="Nominal Time segment before sample point" /> - <BitField start="16" size="9" name="NBRP" description="Nominal Baud Rate Prescaler" /> - <BitField start="25" size="7" name="NSJW" description="Nominal (Re)Synchronization Jump Width" /> - </Register> - <Register start="+0x20" size="4" name="CAN_TSCC" access="Read/Write" description="Timestamp Counter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="2" name="TSS" description="Timestamp Select"> - <Enum name="ZERO" start="0x0" description="Timestamp counter value always 0x0000" /> - <Enum name="INC" start="0x1" description="Timestamp counter value incremented by TCP" /> - <Enum name="EXT" start="0x2" description="External timestamp counter value used" /> - </BitField> - <BitField start="16" size="4" name="TCP" description="Timestamp Counter Prescaler" /> - </Register> - <Register start="+0x24" size="4" name="CAN_TSCV" access="ReadOnly" description="Timestamp Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TSC" description="Timestamp Counter" /> - </Register> - <Register start="+0x28" size="4" name="CAN_TOCC" access="Read/Write" description="Timeout Counter Configuration" reset_value="0xFFFF0000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ETOC" description="Enable Timeout Counter" /> - <BitField start="1" size="2" name="TOS" description="Timeout Select"> - <Enum name="CONT" start="0x0" description="Continuout operation" /> - <Enum name="TXEF" start="0x1" description="Timeout controlled by TX Event FIFO" /> - <Enum name="RXF0" start="0x2" description="Timeout controlled by Rx FIFO 0" /> - <Enum name="RXF1" start="0x3" description="Timeout controlled by Rx FIFO 1" /> - </BitField> - <BitField start="16" size="16" name="TOP" description="Timeout Period" /> - </Register> - <Register start="+0x2C" size="4" name="CAN_TOCV" access="Read/Write" description="Timeout Counter Value" reset_value="0x0000FFFF" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TOC" description="Timeout Counter" /> - </Register> - <Register start="+0x40" size="4" name="CAN_ECR" access="ReadOnly" description="Error Counter" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="8" name="TEC" description="Transmit Error Counter" /> - <BitField start="8" size="7" name="REC" description="Receive Error Counter" /> - <BitField start="15" size="1" name="RP" description="Receive Error Passive" /> - <BitField start="16" size="8" name="CEL" description="CAN Error Logging" /> - </Register> - <Register start="+0x44" size="4" name="CAN_PSR" access="ReadOnly" description="Protocol Status" reset_value="0x00000707" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="LEC" description="Last Error Code"> - <Enum name="NONE" start="0x0" description="No Error" /> - <Enum name="STUFF" start="0x1" description="Stuff Error" /> - <Enum name="FORM" start="0x2" description="Form Error" /> - <Enum name="ACK" start="0x3" description="Ack Error" /> - <Enum name="BIT1" start="0x4" description="Bit1 Error" /> - <Enum name="BIT0" start="0x5" description="Bit0 Error" /> - <Enum name="CRC" start="0x6" description="CRC Error" /> - <Enum name="NC" start="0x7" description="No Change" /> - </BitField> - <BitField start="3" size="2" name="ACT" description="Activity"> - <Enum name="SYNC" start="0x0" description="Node is synchronizing on CAN communication" /> - <Enum name="IDLE" start="0x1" description="Node is neither receiver nor transmitter" /> - <Enum name="RX" start="0x2" description="Node is operating as receiver" /> - <Enum name="TX" start="0x3" description="Node is operating as transmitter" /> - </BitField> - <BitField start="5" size="1" name="EP" description="Error Passive" /> - <BitField start="6" size="1" name="EW" description="Warning Status" /> - <BitField start="7" size="1" name="BO" description="Bus_Off Status" /> - <BitField start="8" size="3" name="DLEC" description="Data Phase Last Error Code"> - <Enum name="NONE" start="0x0" description="No Error" /> - <Enum name="STUFF" start="0x1" description="Stuff Error" /> - <Enum name="FORM" start="0x2" description="Form Error" /> - <Enum name="ACK" start="0x3" description="Ack Error" /> - <Enum name="BIT1" start="0x4" description="Bit1 Error" /> - <Enum name="BIT0" start="0x5" description="Bit0 Error" /> - <Enum name="CRC" start="0x6" description="CRC Error" /> - <Enum name="NC" start="0x7" description="No Change" /> - </BitField> - <BitField start="11" size="1" name="RESI" description="ESI flag of last received CAN FD Message" /> - <BitField start="12" size="1" name="RBRS" description="BRS flag of last received CAN FD Message" /> - <BitField start="13" size="1" name="RFDF" description="Received a CAN FD Message" /> - <BitField start="14" size="1" name="PXE" description="Protocol Exception Event" /> - <BitField start="16" size="7" name="TDCV" description="Transmitter Delay Compensation Value" /> - </Register> - <Register start="+0x48" size="4" name="CAN_TDCR" access="Read/Write" description="Extended ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="TDCF" description="Transmitter Delay Compensation Filter Length" /> - <BitField start="8" size="7" name="TDCO" description="Transmitter Delay Compensation Offset" /> - </Register> - <Register start="+0x50" size="4" name="CAN_IR" access="Read/Write" description="Interrupt" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0N" description="Rx FIFO 0 New Message" /> - <BitField start="1" size="1" name="RF0W" description="Rx FIFO 0 Watermark Reached" /> - <BitField start="2" size="1" name="RF0F" description="Rx FIFO 0 Full" /> - <BitField start="3" size="1" name="RF0L" description="Rx FIFO 0 Message Lost" /> - <BitField start="4" size="1" name="RF1N" description="Rx FIFO 1 New Message" /> - <BitField start="5" size="1" name="RF1W" description="Rx FIFO 1 Watermark Reached" /> - <BitField start="6" size="1" name="RF1F" description="Rx FIFO 1 FIFO Full" /> - <BitField start="7" size="1" name="RF1L" description="Rx FIFO 1 Message Lost" /> - <BitField start="8" size="1" name="HPM" description="High Priority Message" /> - <BitField start="9" size="1" name="TC" description="Timestamp Completed" /> - <BitField start="10" size="1" name="TCF" description="Transmission Cancellation Finished" /> - <BitField start="11" size="1" name="TFE" description="Tx FIFO Empty" /> - <BitField start="12" size="1" name="TEFN" description="Tx Event FIFO New Entry" /> - <BitField start="13" size="1" name="TEFW" description="Tx Event FIFO Watermark Reached" /> - <BitField start="14" size="1" name="TEFF" description="Tx Event FIFO Full" /> - <BitField start="15" size="1" name="TEFL" description="Tx Event FIFO Element Lost" /> - <BitField start="16" size="1" name="TSW" description="Timestamp Wraparound" /> - <BitField start="17" size="1" name="MRAF" description="Message RAM Access Failure" /> - <BitField start="18" size="1" name="TOO" description="Timeout Occurred" /> - <BitField start="19" size="1" name="DRX" description="Message stored to Dedicated Rx Buffer" /> - <BitField start="20" size="1" name="BEC" description="Bit Error Corrected" /> - <BitField start="21" size="1" name="BEU" description="Bit Error Uncorrected" /> - <BitField start="22" size="1" name="ELO" description="Error Logging Overflow" /> - <BitField start="23" size="1" name="EP" description="Error Passive" /> - <BitField start="24" size="1" name="EW" description="Warning Status" /> - <BitField start="25" size="1" name="BO" description="Bus_Off Status" /> - <BitField start="26" size="1" name="WDI" description="Watchdog Interrupt" /> - <BitField start="27" size="1" name="PEA" description="Protocol Error in Arbitration Phase" /> - <BitField start="28" size="1" name="PED" description="Protocol Error in Data Phase" /> - <BitField start="29" size="1" name="ARA" description="Access to Reserved Address" /> - </Register> - <Register start="+0x54" size="4" name="CAN_IE" access="Read/Write" description="Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0NE" description="Rx FIFO 0 New Message Interrupt Enable" /> - <BitField start="1" size="1" name="RF0WE" description="Rx FIFO 0 Watermark Reached Interrupt Enable" /> - <BitField start="2" size="1" name="RF0FE" description="Rx FIFO 0 Full Interrupt Enable" /> - <BitField start="3" size="1" name="RF0LE" description="Rx FIFO 0 Message Lost Interrupt Enable" /> - <BitField start="4" size="1" name="RF1NE" description="Rx FIFO 1 New Message Interrupt Enable" /> - <BitField start="5" size="1" name="RF1WE" description="Rx FIFO 1 Watermark Reached Interrupt Enable" /> - <BitField start="6" size="1" name="RF1FE" description="Rx FIFO 1 FIFO Full Interrupt Enable" /> - <BitField start="7" size="1" name="RF1LE" description="Rx FIFO 1 Message Lost Interrupt Enable" /> - <BitField start="8" size="1" name="HPME" description="High Priority Message Interrupt Enable" /> - <BitField start="9" size="1" name="TCE" description="Timestamp Completed Interrupt Enable" /> - <BitField start="10" size="1" name="TCFE" description="Transmission Cancellation Finished Interrupt Enable" /> - <BitField start="11" size="1" name="TFEE" description="Tx FIFO Empty Interrupt Enable" /> - <BitField start="12" size="1" name="TEFNE" description="Tx Event FIFO New Entry Interrupt Enable" /> - <BitField start="13" size="1" name="TEFWE" description="Tx Event FIFO Watermark Reached Interrupt Enable" /> - <BitField start="14" size="1" name="TEFFE" description="Tx Event FIFO Full Interrupt Enable" /> - <BitField start="15" size="1" name="TEFLE" description="Tx Event FIFO Element Lost Interrupt Enable" /> - <BitField start="16" size="1" name="TSWE" description="Timestamp Wraparound Interrupt Enable" /> - <BitField start="17" size="1" name="MRAFE" description="Message RAM Access Failure Interrupt Enable" /> - <BitField start="18" size="1" name="TOOE" description="Timeout Occurred Interrupt Enable" /> - <BitField start="19" size="1" name="DRXE" description="Message stored to Dedicated Rx Buffer Interrupt Enable" /> - <BitField start="20" size="1" name="BECE" description="Bit Error Corrected Interrupt Enable" /> - <BitField start="21" size="1" name="BEUE" description="Bit Error Uncorrected Interrupt Enable" /> - <BitField start="22" size="1" name="ELOE" description="Error Logging Overflow Interrupt Enable" /> - <BitField start="23" size="1" name="EPE" description="Error Passive Interrupt Enable" /> - <BitField start="24" size="1" name="EWE" description="Warning Status Interrupt Enable" /> - <BitField start="25" size="1" name="BOE" description="Bus_Off Status Interrupt Enable" /> - <BitField start="26" size="1" name="WDIE" description="Watchdog Interrupt Interrupt Enable" /> - <BitField start="27" size="1" name="PEAE" description="Protocol Error in Arbitration Phase Enable" /> - <BitField start="28" size="1" name="PEDE" description="Protocol Error in Data Phase Enable" /> - <BitField start="29" size="1" name="ARAE" description="Access to Reserved Address Enable" /> - </Register> - <Register start="+0x58" size="4" name="CAN_ILS" access="Read/Write" description="Interrupt Line Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0NL" description="Rx FIFO 0 New Message Interrupt Line" /> - <BitField start="1" size="1" name="RF0WL" description="Rx FIFO 0 Watermark Reached Interrupt Line" /> - <BitField start="2" size="1" name="RF0FL" description="Rx FIFO 0 Full Interrupt Line" /> - <BitField start="3" size="1" name="RF0LL" description="Rx FIFO 0 Message Lost Interrupt Line" /> - <BitField start="4" size="1" name="RF1NL" description="Rx FIFO 1 New Message Interrupt Line" /> - <BitField start="5" size="1" name="RF1WL" description="Rx FIFO 1 Watermark Reached Interrupt Line" /> - <BitField start="6" size="1" name="RF1FL" description="Rx FIFO 1 FIFO Full Interrupt Line" /> - <BitField start="7" size="1" name="RF1LL" description="Rx FIFO 1 Message Lost Interrupt Line" /> - <BitField start="8" size="1" name="HPML" description="High Priority Message Interrupt Line" /> - <BitField start="9" size="1" name="TCL" description="Timestamp Completed Interrupt Line" /> - <BitField start="10" size="1" name="TCFL" description="Transmission Cancellation Finished Interrupt Line" /> - <BitField start="11" size="1" name="TFEL" description="Tx FIFO Empty Interrupt Line" /> - <BitField start="12" size="1" name="TEFNL" description="Tx Event FIFO New Entry Interrupt Line" /> - <BitField start="13" size="1" name="TEFWL" description="Tx Event FIFO Watermark Reached Interrupt Line" /> - <BitField start="14" size="1" name="TEFFL" description="Tx Event FIFO Full Interrupt Line" /> - <BitField start="15" size="1" name="TEFLL" description="Tx Event FIFO Element Lost Interrupt Line" /> - <BitField start="16" size="1" name="TSWL" description="Timestamp Wraparound Interrupt Line" /> - <BitField start="17" size="1" name="MRAFL" description="Message RAM Access Failure Interrupt Line" /> - <BitField start="18" size="1" name="TOOL" description="Timeout Occurred Interrupt Line" /> - <BitField start="19" size="1" name="DRXL" description="Message stored to Dedicated Rx Buffer Interrupt Line" /> - <BitField start="20" size="1" name="BECL" description="Bit Error Corrected Interrupt Line" /> - <BitField start="21" size="1" name="BEUL" description="Bit Error Uncorrected Interrupt Line" /> - <BitField start="22" size="1" name="ELOL" description="Error Logging Overflow Interrupt Line" /> - <BitField start="23" size="1" name="EPL" description="Error Passive Interrupt Line" /> - <BitField start="24" size="1" name="EWL" description="Warning Status Interrupt Line" /> - <BitField start="25" size="1" name="BOL" description="Bus_Off Status Interrupt Line" /> - <BitField start="26" size="1" name="WDIL" description="Watchdog Interrupt Interrupt Line" /> - <BitField start="27" size="1" name="PEAL" description="Protocol Error in Arbitration Phase Line" /> - <BitField start="28" size="1" name="PEDL" description="Protocol Error in Data Phase Line" /> - <BitField start="29" size="1" name="ARAL" description="Access to Reserved Address Line" /> - </Register> - <Register start="+0x5C" size="4" name="CAN_ILE" access="Read/Write" description="Interrupt Line Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="EINT0" description="Enable Interrupt Line 0" /> - <BitField start="1" size="1" name="EINT1" description="Enable Interrupt Line 1" /> - </Register> - <Register start="+0x80" size="4" name="CAN_GFC" access="Read/Write" description="Global Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RRFE" description="Reject Remote Frames Extended" /> - <BitField start="1" size="1" name="RRFS" description="Reject Remote Frames Standard" /> - <BitField start="2" size="2" name="ANFE" description="Accept Non-matching Frames Extended"> - <Enum name="RXF0" start="0x0" description="Accept in Rx FIFO 0" /> - <Enum name="RXF1" start="0x1" description="Accept in Rx FIFO 1" /> - <Enum name="REJECT" start="0x2" description="Reject" /> - </BitField> - <BitField start="4" size="2" name="ANFS" description="Accept Non-matching Frames Standard"> - <Enum name="RXF0" start="0x0" description="Accept in Rx FIFO 0" /> - <Enum name="RXF1" start="0x1" description="Accept in Rx FIFO 1" /> - <Enum name="REJECT" start="0x2" description="Reject" /> - </BitField> - </Register> - <Register start="+0x84" size="4" name="CAN_SIDFC" access="Read/Write" description="Standard ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="FLSSA" description="Filter List Standard Start Address" /> - <BitField start="16" size="8" name="LSS" description="List Size Standard" /> - </Register> - <Register start="+0x88" size="4" name="CAN_XIDFC" access="Read/Write" description="Extended ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="FLESA" description="Filter List Extended Start Address" /> - <BitField start="16" size="7" name="LSE" description="List Size Extended" /> - </Register> - <Register start="+0x90" size="4" name="CAN_XIDAM" access="Read/Write" description="Extended ID AND Mask" reset_value="0x1FFFFFFF" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="29" name="EIDM" description="Extended ID Mask" /> - </Register> - <Register start="+0x94" size="4" name="CAN_HPMS" access="ReadOnly" description="High Priority Message Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="BIDX" description="Buffer Index" /> - <BitField start="6" size="2" name="MSI" description="Message Storage Indicator"> - <Enum name="NONE" start="0x0" description="No FIFO selected" /> - <Enum name="LOST" start="0x1" description="FIFO message lost" /> - <Enum name="FIFO0" start="0x2" description="Message stored in FIFO 0" /> - <Enum name="FIFO1" start="0x3" description="Message stored in FIFO 1" /> - </BitField> - <BitField start="8" size="7" name="FIDX" description="Filter Index" /> - <BitField start="15" size="1" name="FLST" description="Filter List" /> - </Register> - <Register start="+0x98" size="4" name="CAN_NDAT1" access="Read/Write" description="New Data 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ND0" description="New Data 0" /> - <BitField start="1" size="1" name="ND1" description="New Data 1" /> - <BitField start="2" size="1" name="ND2" description="New Data 2" /> - <BitField start="3" size="1" name="ND3" description="New Data 3" /> - <BitField start="4" size="1" name="ND4" description="New Data 4" /> - <BitField start="5" size="1" name="ND5" description="New Data 5" /> - <BitField start="6" size="1" name="ND6" description="New Data 6" /> - <BitField start="7" size="1" name="ND7" description="New Data 7" /> - <BitField start="8" size="1" name="ND8" description="New Data 8" /> - <BitField start="9" size="1" name="ND9" description="New Data 9" /> - <BitField start="10" size="1" name="ND10" description="New Data 10" /> - <BitField start="11" size="1" name="ND11" description="New Data 11" /> - <BitField start="12" size="1" name="ND12" description="New Data 12" /> - <BitField start="13" size="1" name="ND13" description="New Data 13" /> - <BitField start="14" size="1" name="ND14" description="New Data 14" /> - <BitField start="15" size="1" name="ND15" description="New Data 15" /> - <BitField start="16" size="1" name="ND16" description="New Data 16" /> - <BitField start="17" size="1" name="ND17" description="New Data 17" /> - <BitField start="18" size="1" name="ND18" description="New Data 18" /> - <BitField start="19" size="1" name="ND19" description="New Data 19" /> - <BitField start="20" size="1" name="ND20" description="New Data 20" /> - <BitField start="21" size="1" name="ND21" description="New Data 21" /> - <BitField start="22" size="1" name="ND22" description="New Data 22" /> - <BitField start="23" size="1" name="ND23" description="New Data 23" /> - <BitField start="24" size="1" name="ND24" description="New Data 24" /> - <BitField start="25" size="1" name="ND25" description="New Data 25" /> - <BitField start="26" size="1" name="ND26" description="New Data 26" /> - <BitField start="27" size="1" name="ND27" description="New Data 27" /> - <BitField start="28" size="1" name="ND28" description="New Data 28" /> - <BitField start="29" size="1" name="ND29" description="New Data 29" /> - <BitField start="30" size="1" name="ND30" description="New Data 30" /> - <BitField start="31" size="1" name="ND31" description="New Data 31" /> - </Register> - <Register start="+0x9C" size="4" name="CAN_NDAT2" access="Read/Write" description="New Data 2" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ND32" description="New Data 32" /> - <BitField start="1" size="1" name="ND33" description="New Data 33" /> - <BitField start="2" size="1" name="ND34" description="New Data 34" /> - <BitField start="3" size="1" name="ND35" description="New Data 35" /> - <BitField start="4" size="1" name="ND36" description="New Data 36" /> - <BitField start="5" size="1" name="ND37" description="New Data 37" /> - <BitField start="6" size="1" name="ND38" description="New Data 38" /> - <BitField start="7" size="1" name="ND39" description="New Data 39" /> - <BitField start="8" size="1" name="ND40" description="New Data 40" /> - <BitField start="9" size="1" name="ND41" description="New Data 41" /> - <BitField start="10" size="1" name="ND42" description="New Data 42" /> - <BitField start="11" size="1" name="ND43" description="New Data 43" /> - <BitField start="12" size="1" name="ND44" description="New Data 44" /> - <BitField start="13" size="1" name="ND45" description="New Data 45" /> - <BitField start="14" size="1" name="ND46" description="New Data 46" /> - <BitField start="15" size="1" name="ND47" description="New Data 47" /> - <BitField start="16" size="1" name="ND48" description="New Data 48" /> - <BitField start="17" size="1" name="ND49" description="New Data 49" /> - <BitField start="18" size="1" name="ND50" description="New Data 50" /> - <BitField start="19" size="1" name="ND51" description="New Data 51" /> - <BitField start="20" size="1" name="ND52" description="New Data 52" /> - <BitField start="21" size="1" name="ND53" description="New Data 53" /> - <BitField start="22" size="1" name="ND54" description="New Data 54" /> - <BitField start="23" size="1" name="ND55" description="New Data 55" /> - <BitField start="24" size="1" name="ND56" description="New Data 56" /> - <BitField start="25" size="1" name="ND57" description="New Data 57" /> - <BitField start="26" size="1" name="ND58" description="New Data 58" /> - <BitField start="27" size="1" name="ND59" description="New Data 59" /> - <BitField start="28" size="1" name="ND60" description="New Data 60" /> - <BitField start="29" size="1" name="ND61" description="New Data 61" /> - <BitField start="30" size="1" name="ND62" description="New Data 62" /> - <BitField start="31" size="1" name="ND63" description="New Data 63" /> - </Register> - <Register start="+0xA0" size="4" name="CAN_RXF0C" access="Read/Write" description="Rx FIFO 0 Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="F0SA" description="Rx FIFO 0 Start Address" /> - <BitField start="16" size="7" name="F0S" description="Rx FIFO 0 Size" /> - <BitField start="24" size="7" name="F0WM" description="Rx FIFO 0 Watermark" /> - <BitField start="31" size="1" name="F0OM" description="FIFO 0 Operation Mode" /> - </Register> - <Register start="+0xA4" size="4" name="CAN_RXF0S" access="ReadOnly" description="Rx FIFO 0 Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="F0FL" description="Rx FIFO 0 Fill Level" /> - <BitField start="8" size="6" name="F0GI" description="Rx FIFO 0 Get Index" /> - <BitField start="16" size="6" name="F0PI" description="Rx FIFO 0 Put Index" /> - <BitField start="24" size="1" name="F0F" description="Rx FIFO 0 Full" /> - <BitField start="25" size="1" name="RF0L" description="Rx FIFO 0 Message Lost" /> - </Register> - <Register start="+0xA8" size="4" name="CAN_RXF0A" access="Read/Write" description="Rx FIFO 0 Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="F0AI" description="Rx FIFO 0 Acknowledge Index" /> - </Register> - <Register start="+0xAC" size="4" name="CAN_RXBC" access="Read/Write" description="Rx Buffer Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="RBSA" description="Rx Buffer Start Address" /> - </Register> - <Register start="+0xB0" size="4" name="CAN_RXF1C" access="Read/Write" description="Rx FIFO 1 Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="F1SA" description="Rx FIFO 1 Start Address" /> - <BitField start="16" size="7" name="F1S" description="Rx FIFO 1 Size" /> - <BitField start="24" size="7" name="F1WM" description="Rx FIFO 1 Watermark" /> - <BitField start="31" size="1" name="F1OM" description="FIFO 1 Operation Mode" /> - </Register> - <Register start="+0xB4" size="4" name="CAN_RXF1S" access="ReadOnly" description="Rx FIFO 1 Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="F1FL" description="Rx FIFO 1 Fill Level" /> - <BitField start="8" size="6" name="F1GI" description="Rx FIFO 1 Get Index" /> - <BitField start="16" size="6" name="F1PI" description="Rx FIFO 1 Put Index" /> - <BitField start="24" size="1" name="F1F" description="Rx FIFO 1 Full" /> - <BitField start="25" size="1" name="RF1L" description="Rx FIFO 1 Message Lost" /> - <BitField start="30" size="2" name="DMS" description="Debug Message Status"> - <Enum name="IDLE" start="0x0" description="Idle state" /> - <Enum name="DBGA" start="0x1" description="Debug message A received" /> - <Enum name="DBGB" start="0x2" description="Debug message A/B received" /> - <Enum name="DBGC" start="0x3" description="Debug message A/B/C received, DMA request set" /> - </BitField> - </Register> - <Register start="+0xB8" size="4" name="CAN_RXF1A" access="Read/Write" description="Rx FIFO 1 Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="F1AI" description="Rx FIFO 1 Acknowledge Index" /> - </Register> - <Register start="+0xBC" size="4" name="CAN_RXESC" access="Read/Write" description="Rx Buffer / FIFO Element Size Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="F0DS" description="Rx FIFO 0 Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - <BitField start="4" size="3" name="F1DS" description="Rx FIFO 1 Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - <BitField start="8" size="3" name="RBDS" description="Rx Buffer Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - </Register> - <Register start="+0xC0" size="4" name="CAN_TXBC" access="Read/Write" description="Tx Buffer Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TBSA" description="Tx Buffers Start Address" /> - <BitField start="16" size="6" name="NDTB" description="Number of Dedicated Transmit Buffers" /> - <BitField start="24" size="6" name="TFQS" description="Transmit FIFO/Queue Size" /> - <BitField start="30" size="1" name="TFQM" description="Tx FIFO/Queue Mode" /> - </Register> - <Register start="+0xC4" size="4" name="CAN_TXFQS" access="ReadOnly" description="Tx FIFO / Queue Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="TFFL" description="Tx FIFO Free Level" /> - <BitField start="8" size="5" name="TFGI" description="Tx FIFO Get Index" /> - <BitField start="16" size="5" name="TFQPI" description="Tx FIFO/Queue Put Index" /> - <BitField start="21" size="1" name="TFQF" description="Tx FIFO/Queue Full" /> - </Register> - <Register start="+0xC8" size="4" name="CAN_TXESC" access="Read/Write" description="Tx Buffer Element Size Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="TBDS" description="Tx Buffer Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - </Register> - <Register start="+0xCC" size="4" name="CAN_TXBRP" access="ReadOnly" description="Tx Buffer Request Pending" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TRP0" description="Transmission Request Pending 0" /> - <BitField start="1" size="1" name="TRP1" description="Transmission Request Pending 1" /> - <BitField start="2" size="1" name="TRP2" description="Transmission Request Pending 2" /> - <BitField start="3" size="1" name="TRP3" description="Transmission Request Pending 3" /> - <BitField start="4" size="1" name="TRP4" description="Transmission Request Pending 4" /> - <BitField start="5" size="1" name="TRP5" description="Transmission Request Pending 5" /> - <BitField start="6" size="1" name="TRP6" description="Transmission Request Pending 6" /> - <BitField start="7" size="1" name="TRP7" description="Transmission Request Pending 7" /> - <BitField start="8" size="1" name="TRP8" description="Transmission Request Pending 8" /> - <BitField start="9" size="1" name="TRP9" description="Transmission Request Pending 9" /> - <BitField start="10" size="1" name="TRP10" description="Transmission Request Pending 10" /> - <BitField start="11" size="1" name="TRP11" description="Transmission Request Pending 11" /> - <BitField start="12" size="1" name="TRP12" description="Transmission Request Pending 12" /> - <BitField start="13" size="1" name="TRP13" description="Transmission Request Pending 13" /> - <BitField start="14" size="1" name="TRP14" description="Transmission Request Pending 14" /> - <BitField start="15" size="1" name="TRP15" description="Transmission Request Pending 15" /> - <BitField start="16" size="1" name="TRP16" description="Transmission Request Pending 16" /> - <BitField start="17" size="1" name="TRP17" description="Transmission Request Pending 17" /> - <BitField start="18" size="1" name="TRP18" description="Transmission Request Pending 18" /> - <BitField start="19" size="1" name="TRP19" description="Transmission Request Pending 19" /> - <BitField start="20" size="1" name="TRP20" description="Transmission Request Pending 20" /> - <BitField start="21" size="1" name="TRP21" description="Transmission Request Pending 21" /> - <BitField start="22" size="1" name="TRP22" description="Transmission Request Pending 22" /> - <BitField start="23" size="1" name="TRP23" description="Transmission Request Pending 23" /> - <BitField start="24" size="1" name="TRP24" description="Transmission Request Pending 24" /> - <BitField start="25" size="1" name="TRP25" description="Transmission Request Pending 25" /> - <BitField start="26" size="1" name="TRP26" description="Transmission Request Pending 26" /> - <BitField start="27" size="1" name="TRP27" description="Transmission Request Pending 27" /> - <BitField start="28" size="1" name="TRP28" description="Transmission Request Pending 28" /> - <BitField start="29" size="1" name="TRP29" description="Transmission Request Pending 29" /> - <BitField start="30" size="1" name="TRP30" description="Transmission Request Pending 30" /> - <BitField start="31" size="1" name="TRP31" description="Transmission Request Pending 31" /> - </Register> - <Register start="+0xD0" size="4" name="CAN_TXBAR" access="Read/Write" description="Tx Buffer Add Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="AR0" description="Add Request 0" /> - <BitField start="1" size="1" name="AR1" description="Add Request 1" /> - <BitField start="2" size="1" name="AR2" description="Add Request 2" /> - <BitField start="3" size="1" name="AR3" description="Add Request 3" /> - <BitField start="4" size="1" name="AR4" description="Add Request 4" /> - <BitField start="5" size="1" name="AR5" description="Add Request 5" /> - <BitField start="6" size="1" name="AR6" description="Add Request 6" /> - <BitField start="7" size="1" name="AR7" description="Add Request 7" /> - <BitField start="8" size="1" name="AR8" description="Add Request 8" /> - <BitField start="9" size="1" name="AR9" description="Add Request 9" /> - <BitField start="10" size="1" name="AR10" description="Add Request 10" /> - <BitField start="11" size="1" name="AR11" description="Add Request 11" /> - <BitField start="12" size="1" name="AR12" description="Add Request 12" /> - <BitField start="13" size="1" name="AR13" description="Add Request 13" /> - <BitField start="14" size="1" name="AR14" description="Add Request 14" /> - <BitField start="15" size="1" name="AR15" description="Add Request 15" /> - <BitField start="16" size="1" name="AR16" description="Add Request 16" /> - <BitField start="17" size="1" name="AR17" description="Add Request 17" /> - <BitField start="18" size="1" name="AR18" description="Add Request 18" /> - <BitField start="19" size="1" name="AR19" description="Add Request 19" /> - <BitField start="20" size="1" name="AR20" description="Add Request 20" /> - <BitField start="21" size="1" name="AR21" description="Add Request 21" /> - <BitField start="22" size="1" name="AR22" description="Add Request 22" /> - <BitField start="23" size="1" name="AR23" description="Add Request 23" /> - <BitField start="24" size="1" name="AR24" description="Add Request 24" /> - <BitField start="25" size="1" name="AR25" description="Add Request 25" /> - <BitField start="26" size="1" name="AR26" description="Add Request 26" /> - <BitField start="27" size="1" name="AR27" description="Add Request 27" /> - <BitField start="28" size="1" name="AR28" description="Add Request 28" /> - <BitField start="29" size="1" name="AR29" description="Add Request 29" /> - <BitField start="30" size="1" name="AR30" description="Add Request 30" /> - <BitField start="31" size="1" name="AR31" description="Add Request 31" /> - </Register> - <Register start="+0xD4" size="4" name="CAN_TXBCR" access="Read/Write" description="Tx Buffer Cancellation Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CR0" description="Cancellation Request 0" /> - <BitField start="1" size="1" name="CR1" description="Cancellation Request 1" /> - <BitField start="2" size="1" name="CR2" description="Cancellation Request 2" /> - <BitField start="3" size="1" name="CR3" description="Cancellation Request 3" /> - <BitField start="4" size="1" name="CR4" description="Cancellation Request 4" /> - <BitField start="5" size="1" name="CR5" description="Cancellation Request 5" /> - <BitField start="6" size="1" name="CR6" description="Cancellation Request 6" /> - <BitField start="7" size="1" name="CR7" description="Cancellation Request 7" /> - <BitField start="8" size="1" name="CR8" description="Cancellation Request 8" /> - <BitField start="9" size="1" name="CR9" description="Cancellation Request 9" /> - <BitField start="10" size="1" name="CR10" description="Cancellation Request 10" /> - <BitField start="11" size="1" name="CR11" description="Cancellation Request 11" /> - <BitField start="12" size="1" name="CR12" description="Cancellation Request 12" /> - <BitField start="13" size="1" name="CR13" description="Cancellation Request 13" /> - <BitField start="14" size="1" name="CR14" description="Cancellation Request 14" /> - <BitField start="15" size="1" name="CR15" description="Cancellation Request 15" /> - <BitField start="16" size="1" name="CR16" description="Cancellation Request 16" /> - <BitField start="17" size="1" name="CR17" description="Cancellation Request 17" /> - <BitField start="18" size="1" name="CR18" description="Cancellation Request 18" /> - <BitField start="19" size="1" name="CR19" description="Cancellation Request 19" /> - <BitField start="20" size="1" name="CR20" description="Cancellation Request 20" /> - <BitField start="21" size="1" name="CR21" description="Cancellation Request 21" /> - <BitField start="22" size="1" name="CR22" description="Cancellation Request 22" /> - <BitField start="23" size="1" name="CR23" description="Cancellation Request 23" /> - <BitField start="24" size="1" name="CR24" description="Cancellation Request 24" /> - <BitField start="25" size="1" name="CR25" description="Cancellation Request 25" /> - <BitField start="26" size="1" name="CR26" description="Cancellation Request 26" /> - <BitField start="27" size="1" name="CR27" description="Cancellation Request 27" /> - <BitField start="28" size="1" name="CR28" description="Cancellation Request 28" /> - <BitField start="29" size="1" name="CR29" description="Cancellation Request 29" /> - <BitField start="30" size="1" name="CR30" description="Cancellation Request 30" /> - <BitField start="31" size="1" name="CR31" description="Cancellation Request 31" /> - </Register> - <Register start="+0xD8" size="4" name="CAN_TXBTO" access="ReadOnly" description="Tx Buffer Transmission Occurred" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TO0" description="Transmission Occurred 0" /> - <BitField start="1" size="1" name="TO1" description="Transmission Occurred 1" /> - <BitField start="2" size="1" name="TO2" description="Transmission Occurred 2" /> - <BitField start="3" size="1" name="TO3" description="Transmission Occurred 3" /> - <BitField start="4" size="1" name="TO4" description="Transmission Occurred 4" /> - <BitField start="5" size="1" name="TO5" description="Transmission Occurred 5" /> - <BitField start="6" size="1" name="TO6" description="Transmission Occurred 6" /> - <BitField start="7" size="1" name="TO7" description="Transmission Occurred 7" /> - <BitField start="8" size="1" name="TO8" description="Transmission Occurred 8" /> - <BitField start="9" size="1" name="TO9" description="Transmission Occurred 9" /> - <BitField start="10" size="1" name="TO10" description="Transmission Occurred 10" /> - <BitField start="11" size="1" name="TO11" description="Transmission Occurred 11" /> - <BitField start="12" size="1" name="TO12" description="Transmission Occurred 12" /> - <BitField start="13" size="1" name="TO13" description="Transmission Occurred 13" /> - <BitField start="14" size="1" name="TO14" description="Transmission Occurred 14" /> - <BitField start="15" size="1" name="TO15" description="Transmission Occurred 15" /> - <BitField start="16" size="1" name="TO16" description="Transmission Occurred 16" /> - <BitField start="17" size="1" name="TO17" description="Transmission Occurred 17" /> - <BitField start="18" size="1" name="TO18" description="Transmission Occurred 18" /> - <BitField start="19" size="1" name="TO19" description="Transmission Occurred 19" /> - <BitField start="20" size="1" name="TO20" description="Transmission Occurred 20" /> - <BitField start="21" size="1" name="TO21" description="Transmission Occurred 21" /> - <BitField start="22" size="1" name="TO22" description="Transmission Occurred 22" /> - <BitField start="23" size="1" name="TO23" description="Transmission Occurred 23" /> - <BitField start="24" size="1" name="TO24" description="Transmission Occurred 24" /> - <BitField start="25" size="1" name="TO25" description="Transmission Occurred 25" /> - <BitField start="26" size="1" name="TO26" description="Transmission Occurred 26" /> - <BitField start="27" size="1" name="TO27" description="Transmission Occurred 27" /> - <BitField start="28" size="1" name="TO28" description="Transmission Occurred 28" /> - <BitField start="29" size="1" name="TO29" description="Transmission Occurred 29" /> - <BitField start="30" size="1" name="TO30" description="Transmission Occurred 30" /> - <BitField start="31" size="1" name="TO31" description="Transmission Occurred 31" /> - </Register> - <Register start="+0xDC" size="4" name="CAN_TXBCF" access="ReadOnly" description="Tx Buffer Cancellation Finished" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CF0" description="Tx Buffer Cancellation Finished 0" /> - <BitField start="1" size="1" name="CF1" description="Tx Buffer Cancellation Finished 1" /> - <BitField start="2" size="1" name="CF2" description="Tx Buffer Cancellation Finished 2" /> - <BitField start="3" size="1" name="CF3" description="Tx Buffer Cancellation Finished 3" /> - <BitField start="4" size="1" name="CF4" description="Tx Buffer Cancellation Finished 4" /> - <BitField start="5" size="1" name="CF5" description="Tx Buffer Cancellation Finished 5" /> - <BitField start="6" size="1" name="CF6" description="Tx Buffer Cancellation Finished 6" /> - <BitField start="7" size="1" name="CF7" description="Tx Buffer Cancellation Finished 7" /> - <BitField start="8" size="1" name="CF8" description="Tx Buffer Cancellation Finished 8" /> - <BitField start="9" size="1" name="CF9" description="Tx Buffer Cancellation Finished 9" /> - <BitField start="10" size="1" name="CF10" description="Tx Buffer Cancellation Finished 10" /> - <BitField start="11" size="1" name="CF11" description="Tx Buffer Cancellation Finished 11" /> - <BitField start="12" size="1" name="CF12" description="Tx Buffer Cancellation Finished 12" /> - <BitField start="13" size="1" name="CF13" description="Tx Buffer Cancellation Finished 13" /> - <BitField start="14" size="1" name="CF14" description="Tx Buffer Cancellation Finished 14" /> - <BitField start="15" size="1" name="CF15" description="Tx Buffer Cancellation Finished 15" /> - <BitField start="16" size="1" name="CF16" description="Tx Buffer Cancellation Finished 16" /> - <BitField start="17" size="1" name="CF17" description="Tx Buffer Cancellation Finished 17" /> - <BitField start="18" size="1" name="CF18" description="Tx Buffer Cancellation Finished 18" /> - <BitField start="19" size="1" name="CF19" description="Tx Buffer Cancellation Finished 19" /> - <BitField start="20" size="1" name="CF20" description="Tx Buffer Cancellation Finished 20" /> - <BitField start="21" size="1" name="CF21" description="Tx Buffer Cancellation Finished 21" /> - <BitField start="22" size="1" name="CF22" description="Tx Buffer Cancellation Finished 22" /> - <BitField start="23" size="1" name="CF23" description="Tx Buffer Cancellation Finished 23" /> - <BitField start="24" size="1" name="CF24" description="Tx Buffer Cancellation Finished 24" /> - <BitField start="25" size="1" name="CF25" description="Tx Buffer Cancellation Finished 25" /> - <BitField start="26" size="1" name="CF26" description="Tx Buffer Cancellation Finished 26" /> - <BitField start="27" size="1" name="CF27" description="Tx Buffer Cancellation Finished 27" /> - <BitField start="28" size="1" name="CF28" description="Tx Buffer Cancellation Finished 28" /> - <BitField start="29" size="1" name="CF29" description="Tx Buffer Cancellation Finished 29" /> - <BitField start="30" size="1" name="CF30" description="Tx Buffer Cancellation Finished 30" /> - <BitField start="31" size="1" name="CF31" description="Tx Buffer Cancellation Finished 31" /> - </Register> - <Register start="+0xE0" size="4" name="CAN_TXBTIE" access="Read/Write" description="Tx Buffer Transmission Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TIE0" description="Transmission Interrupt Enable 0" /> - <BitField start="1" size="1" name="TIE1" description="Transmission Interrupt Enable 1" /> - <BitField start="2" size="1" name="TIE2" description="Transmission Interrupt Enable 2" /> - <BitField start="3" size="1" name="TIE3" description="Transmission Interrupt Enable 3" /> - <BitField start="4" size="1" name="TIE4" description="Transmission Interrupt Enable 4" /> - <BitField start="5" size="1" name="TIE5" description="Transmission Interrupt Enable 5" /> - <BitField start="6" size="1" name="TIE6" description="Transmission Interrupt Enable 6" /> - <BitField start="7" size="1" name="TIE7" description="Transmission Interrupt Enable 7" /> - <BitField start="8" size="1" name="TIE8" description="Transmission Interrupt Enable 8" /> - <BitField start="9" size="1" name="TIE9" description="Transmission Interrupt Enable 9" /> - <BitField start="10" size="1" name="TIE10" description="Transmission Interrupt Enable 10" /> - <BitField start="11" size="1" name="TIE11" description="Transmission Interrupt Enable 11" /> - <BitField start="12" size="1" name="TIE12" description="Transmission Interrupt Enable 12" /> - <BitField start="13" size="1" name="TIE13" description="Transmission Interrupt Enable 13" /> - <BitField start="14" size="1" name="TIE14" description="Transmission Interrupt Enable 14" /> - <BitField start="15" size="1" name="TIE15" description="Transmission Interrupt Enable 15" /> - <BitField start="16" size="1" name="TIE16" description="Transmission Interrupt Enable 16" /> - <BitField start="17" size="1" name="TIE17" description="Transmission Interrupt Enable 17" /> - <BitField start="18" size="1" name="TIE18" description="Transmission Interrupt Enable 18" /> - <BitField start="19" size="1" name="TIE19" description="Transmission Interrupt Enable 19" /> - <BitField start="20" size="1" name="TIE20" description="Transmission Interrupt Enable 20" /> - <BitField start="21" size="1" name="TIE21" description="Transmission Interrupt Enable 21" /> - <BitField start="22" size="1" name="TIE22" description="Transmission Interrupt Enable 22" /> - <BitField start="23" size="1" name="TIE23" description="Transmission Interrupt Enable 23" /> - <BitField start="24" size="1" name="TIE24" description="Transmission Interrupt Enable 24" /> - <BitField start="25" size="1" name="TIE25" description="Transmission Interrupt Enable 25" /> - <BitField start="26" size="1" name="TIE26" description="Transmission Interrupt Enable 26" /> - <BitField start="27" size="1" name="TIE27" description="Transmission Interrupt Enable 27" /> - <BitField start="28" size="1" name="TIE28" description="Transmission Interrupt Enable 28" /> - <BitField start="29" size="1" name="TIE29" description="Transmission Interrupt Enable 29" /> - <BitField start="30" size="1" name="TIE30" description="Transmission Interrupt Enable 30" /> - <BitField start="31" size="1" name="TIE31" description="Transmission Interrupt Enable 31" /> - </Register> - <Register start="+0xE4" size="4" name="CAN_TXBCIE" access="Read/Write" description="Tx Buffer Cancellation Finished Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CFIE0" description="Cancellation Finished Interrupt Enable 0" /> - <BitField start="1" size="1" name="CFIE1" description="Cancellation Finished Interrupt Enable 1" /> - <BitField start="2" size="1" name="CFIE2" description="Cancellation Finished Interrupt Enable 2" /> - <BitField start="3" size="1" name="CFIE3" description="Cancellation Finished Interrupt Enable 3" /> - <BitField start="4" size="1" name="CFIE4" description="Cancellation Finished Interrupt Enable 4" /> - <BitField start="5" size="1" name="CFIE5" description="Cancellation Finished Interrupt Enable 5" /> - <BitField start="6" size="1" name="CFIE6" description="Cancellation Finished Interrupt Enable 6" /> - <BitField start="7" size="1" name="CFIE7" description="Cancellation Finished Interrupt Enable 7" /> - <BitField start="8" size="1" name="CFIE8" description="Cancellation Finished Interrupt Enable 8" /> - <BitField start="9" size="1" name="CFIE9" description="Cancellation Finished Interrupt Enable 9" /> - <BitField start="10" size="1" name="CFIE10" description="Cancellation Finished Interrupt Enable 10" /> - <BitField start="11" size="1" name="CFIE11" description="Cancellation Finished Interrupt Enable 11" /> - <BitField start="12" size="1" name="CFIE12" description="Cancellation Finished Interrupt Enable 12" /> - <BitField start="13" size="1" name="CFIE13" description="Cancellation Finished Interrupt Enable 13" /> - <BitField start="14" size="1" name="CFIE14" description="Cancellation Finished Interrupt Enable 14" /> - <BitField start="15" size="1" name="CFIE15" description="Cancellation Finished Interrupt Enable 15" /> - <BitField start="16" size="1" name="CFIE16" description="Cancellation Finished Interrupt Enable 16" /> - <BitField start="17" size="1" name="CFIE17" description="Cancellation Finished Interrupt Enable 17" /> - <BitField start="18" size="1" name="CFIE18" description="Cancellation Finished Interrupt Enable 18" /> - <BitField start="19" size="1" name="CFIE19" description="Cancellation Finished Interrupt Enable 19" /> - <BitField start="20" size="1" name="CFIE20" description="Cancellation Finished Interrupt Enable 20" /> - <BitField start="21" size="1" name="CFIE21" description="Cancellation Finished Interrupt Enable 21" /> - <BitField start="22" size="1" name="CFIE22" description="Cancellation Finished Interrupt Enable 22" /> - <BitField start="23" size="1" name="CFIE23" description="Cancellation Finished Interrupt Enable 23" /> - <BitField start="24" size="1" name="CFIE24" description="Cancellation Finished Interrupt Enable 24" /> - <BitField start="25" size="1" name="CFIE25" description="Cancellation Finished Interrupt Enable 25" /> - <BitField start="26" size="1" name="CFIE26" description="Cancellation Finished Interrupt Enable 26" /> - <BitField start="27" size="1" name="CFIE27" description="Cancellation Finished Interrupt Enable 27" /> - <BitField start="28" size="1" name="CFIE28" description="Cancellation Finished Interrupt Enable 28" /> - <BitField start="29" size="1" name="CFIE29" description="Cancellation Finished Interrupt Enable 29" /> - <BitField start="30" size="1" name="CFIE30" description="Cancellation Finished Interrupt Enable 30" /> - <BitField start="31" size="1" name="CFIE31" description="Cancellation Finished Interrupt Enable 31" /> - </Register> - <Register start="+0xF0" size="4" name="CAN_TXEFC" access="Read/Write" description="Tx Event FIFO Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="EFSA" description="Event FIFO Start Address" /> - <BitField start="16" size="6" name="EFS" description="Event FIFO Size" /> - <BitField start="24" size="6" name="EFWM" description="Event FIFO Watermark" /> - </Register> - <Register start="+0xF4" size="4" name="CAN_TXEFS" access="ReadOnly" description="Tx Event FIFO Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="EFFL" description="Event FIFO Fill Level" /> - <BitField start="8" size="5" name="EFGI" description="Event FIFO Get Index" /> - <BitField start="16" size="5" name="EFPI" description="Event FIFO Put Index" /> - <BitField start="24" size="1" name="EFF" description="Event FIFO Full" /> - <BitField start="25" size="1" name="TEFL" description="Tx Event FIFO Element Lost" /> - </Register> - <Register start="+0xF8" size="4" name="CAN_TXEFA" access="Read/Write" description="Tx Event FIFO Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="5" name="EFAI" description="Event FIFO Acknowledge Index" /> - </Register> - </RegisterGroup> - <RegisterGroup name="CAN1" start="0x42000400" description="Control Area Network 1"> - <Register start="+0x00" size="4" name="CAN_CREL" access="ReadOnly" description="Core Release" reset_value="0x32100000" reset_mask="0xFFFFFFFF"> - <BitField start="20" size="4" name="SUBSTEP" description="Sub-step of Core Release" /> - <BitField start="24" size="4" name="STEP" description="Step of Core Release" /> - <BitField start="28" size="4" name="REL" description="Core Release" /> - </Register> - <Register start="+0x04" size="4" name="CAN_ENDN" access="ReadOnly" description="Endian" reset_value="0x87654321" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="32" name="ETV" description="Endianness Test Value" /> - </Register> - <Register start="+0x08" size="4" name="CAN_MRCFG" access="Read/Write" description="Message RAM Configuration" reset_value="0x00000002" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="2" name="QOS" description="Quality of Service"> - <Enum name="DISABLE" start="0x0" description="Background (no sensitive operation)" /> - <Enum name="LOW" start="0x1" description="Sensitive Bandwidth" /> - <Enum name="MEDIUM" start="0x2" description="Sensitive Latency" /> - <Enum name="HIGH" start="0x3" description="Critical Latency" /> - </BitField> - </Register> - <Register start="+0x0C" size="4" name="CAN_DBTP" access="Read/Write" description="Fast Bit Timing and Prescaler" reset_value="0x00000A33" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="4" name="DSJW" description="Data (Re)Synchronization Jump Width" /> - <BitField start="4" size="4" name="DTSEG2" description="Data time segment after sample point" /> - <BitField start="8" size="5" name="DTSEG1" description="Data time segment before sample point" /> - <BitField start="16" size="5" name="DBRP" description="Data Baud Rate Prescaler" /> - <BitField start="23" size="1" name="TDC" description="Tranceiver Delay Compensation" /> - </Register> - <Register start="+0x10" size="4" name="CAN_TEST" access="Read/Write" description="Test" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="4" size="1" name="LBCK" description="Loop Back Mode" /> - <BitField start="5" size="2" name="TX" description="Control of Transmit Pin"> - <Enum name="CORE" start="0x0" description="TX controlled by CAN core" /> - <Enum name="SAMPLE" start="0x1" description="TX monitoring sample point" /> - <Enum name="DOMINANT" start="0x2" description="Dominant (0) level at pin CAN_TX" /> - <Enum name="RECESSIVE" start="0x3" description="Recessive (1) level at pin CAN_TX" /> - </BitField> - <BitField start="7" size="1" name="RX" description="Receive Pin" /> - </Register> - <Register start="+0x14" size="4" name="CAN_RWD" access="Read/Write" description="RAM Watchdog" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="8" name="WDC" description="Watchdog Configuration" /> - <BitField start="8" size="8" name="WDV" description="Watchdog Value" /> - </Register> - <Register start="+0x18" size="4" name="CAN_CCCR" access="Read/Write" description="CC Control" reset_value="0x00000001" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="INIT" description="Initialization" /> - <BitField start="1" size="1" name="CCE" description="Configuration Change Enable" /> - <BitField start="2" size="1" name="ASM" description="ASM Restricted Operation Mode" /> - <BitField start="3" size="1" name="CSA" description="Clock Stop Acknowledge" /> - <BitField start="4" size="1" name="CSR" description="Clock Stop Request" /> - <BitField start="5" size="1" name="MON" description="Bus Monitoring Mode" /> - <BitField start="6" size="1" name="DAR" description="Disable Automatic Retransmission" /> - <BitField start="7" size="1" name="TEST" description="Test Mode Enable" /> - <BitField start="8" size="1" name="FDOE" description="FD Operation Enable" /> - <BitField start="9" size="1" name="BRSE" description="Bit Rate Switch Enable" /> - <BitField start="12" size="1" name="PXHD" description="Protocol Exception Handling Disable" /> - <BitField start="13" size="1" name="EFBI" description="Edge Filtering during Bus Integration" /> - <BitField start="14" size="1" name="TXP" description="Transmit Pause" /> - <BitField start="15" size="1" name="NISO" description="Non ISO Operation" /> - </Register> - <Register start="+0x1C" size="4" name="CAN_NBTP" access="Read/Write" description="Nominal Bit Timing and Prescaler" reset_value="0x06000A03" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="NTSEG2" description="Nominal Time segment after sample point" /> - <BitField start="8" size="8" name="NTSEG1" description="Nominal Time segment before sample point" /> - <BitField start="16" size="9" name="NBRP" description="Nominal Baud Rate Prescaler" /> - <BitField start="25" size="7" name="NSJW" description="Nominal (Re)Synchronization Jump Width" /> - </Register> - <Register start="+0x20" size="4" name="CAN_TSCC" access="Read/Write" description="Timestamp Counter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="2" name="TSS" description="Timestamp Select"> - <Enum name="ZERO" start="0x0" description="Timestamp counter value always 0x0000" /> - <Enum name="INC" start="0x1" description="Timestamp counter value incremented by TCP" /> - <Enum name="EXT" start="0x2" description="External timestamp counter value used" /> - </BitField> - <BitField start="16" size="4" name="TCP" description="Timestamp Counter Prescaler" /> - </Register> - <Register start="+0x24" size="4" name="CAN_TSCV" access="ReadOnly" description="Timestamp Counter Value" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TSC" description="Timestamp Counter" /> - </Register> - <Register start="+0x28" size="4" name="CAN_TOCC" access="Read/Write" description="Timeout Counter Configuration" reset_value="0xFFFF0000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ETOC" description="Enable Timeout Counter" /> - <BitField start="1" size="2" name="TOS" description="Timeout Select"> - <Enum name="CONT" start="0x0" description="Continuout operation" /> - <Enum name="TXEF" start="0x1" description="Timeout controlled by TX Event FIFO" /> - <Enum name="RXF0" start="0x2" description="Timeout controlled by Rx FIFO 0" /> - <Enum name="RXF1" start="0x3" description="Timeout controlled by Rx FIFO 1" /> - </BitField> - <BitField start="16" size="16" name="TOP" description="Timeout Period" /> - </Register> - <Register start="+0x2C" size="4" name="CAN_TOCV" access="Read/Write" description="Timeout Counter Value" reset_value="0x0000FFFF" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TOC" description="Timeout Counter" /> - </Register> - <Register start="+0x40" size="4" name="CAN_ECR" access="ReadOnly" description="Error Counter" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="8" name="TEC" description="Transmit Error Counter" /> - <BitField start="8" size="7" name="REC" description="Receive Error Counter" /> - <BitField start="15" size="1" name="RP" description="Receive Error Passive" /> - <BitField start="16" size="8" name="CEL" description="CAN Error Logging" /> - </Register> - <Register start="+0x44" size="4" name="CAN_PSR" access="ReadOnly" description="Protocol Status" reset_value="0x00000707" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="LEC" description="Last Error Code"> - <Enum name="NONE" start="0x0" description="No Error" /> - <Enum name="STUFF" start="0x1" description="Stuff Error" /> - <Enum name="FORM" start="0x2" description="Form Error" /> - <Enum name="ACK" start="0x3" description="Ack Error" /> - <Enum name="BIT1" start="0x4" description="Bit1 Error" /> - <Enum name="BIT0" start="0x5" description="Bit0 Error" /> - <Enum name="CRC" start="0x6" description="CRC Error" /> - <Enum name="NC" start="0x7" description="No Change" /> - </BitField> - <BitField start="3" size="2" name="ACT" description="Activity"> - <Enum name="SYNC" start="0x0" description="Node is synchronizing on CAN communication" /> - <Enum name="IDLE" start="0x1" description="Node is neither receiver nor transmitter" /> - <Enum name="RX" start="0x2" description="Node is operating as receiver" /> - <Enum name="TX" start="0x3" description="Node is operating as transmitter" /> - </BitField> - <BitField start="5" size="1" name="EP" description="Error Passive" /> - <BitField start="6" size="1" name="EW" description="Warning Status" /> - <BitField start="7" size="1" name="BO" description="Bus_Off Status" /> - <BitField start="8" size="3" name="DLEC" description="Data Phase Last Error Code"> - <Enum name="NONE" start="0x0" description="No Error" /> - <Enum name="STUFF" start="0x1" description="Stuff Error" /> - <Enum name="FORM" start="0x2" description="Form Error" /> - <Enum name="ACK" start="0x3" description="Ack Error" /> - <Enum name="BIT1" start="0x4" description="Bit1 Error" /> - <Enum name="BIT0" start="0x5" description="Bit0 Error" /> - <Enum name="CRC" start="0x6" description="CRC Error" /> - <Enum name="NC" start="0x7" description="No Change" /> - </BitField> - <BitField start="11" size="1" name="RESI" description="ESI flag of last received CAN FD Message" /> - <BitField start="12" size="1" name="RBRS" description="BRS flag of last received CAN FD Message" /> - <BitField start="13" size="1" name="RFDF" description="Received a CAN FD Message" /> - <BitField start="14" size="1" name="PXE" description="Protocol Exception Event" /> - <BitField start="16" size="7" name="TDCV" description="Transmitter Delay Compensation Value" /> - </Register> - <Register start="+0x48" size="4" name="CAN_TDCR" access="Read/Write" description="Extended ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="TDCF" description="Transmitter Delay Compensation Filter Length" /> - <BitField start="8" size="7" name="TDCO" description="Transmitter Delay Compensation Offset" /> - </Register> - <Register start="+0x50" size="4" name="CAN_IR" access="Read/Write" description="Interrupt" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0N" description="Rx FIFO 0 New Message" /> - <BitField start="1" size="1" name="RF0W" description="Rx FIFO 0 Watermark Reached" /> - <BitField start="2" size="1" name="RF0F" description="Rx FIFO 0 Full" /> - <BitField start="3" size="1" name="RF0L" description="Rx FIFO 0 Message Lost" /> - <BitField start="4" size="1" name="RF1N" description="Rx FIFO 1 New Message" /> - <BitField start="5" size="1" name="RF1W" description="Rx FIFO 1 Watermark Reached" /> - <BitField start="6" size="1" name="RF1F" description="Rx FIFO 1 FIFO Full" /> - <BitField start="7" size="1" name="RF1L" description="Rx FIFO 1 Message Lost" /> - <BitField start="8" size="1" name="HPM" description="High Priority Message" /> - <BitField start="9" size="1" name="TC" description="Timestamp Completed" /> - <BitField start="10" size="1" name="TCF" description="Transmission Cancellation Finished" /> - <BitField start="11" size="1" name="TFE" description="Tx FIFO Empty" /> - <BitField start="12" size="1" name="TEFN" description="Tx Event FIFO New Entry" /> - <BitField start="13" size="1" name="TEFW" description="Tx Event FIFO Watermark Reached" /> - <BitField start="14" size="1" name="TEFF" description="Tx Event FIFO Full" /> - <BitField start="15" size="1" name="TEFL" description="Tx Event FIFO Element Lost" /> - <BitField start="16" size="1" name="TSW" description="Timestamp Wraparound" /> - <BitField start="17" size="1" name="MRAF" description="Message RAM Access Failure" /> - <BitField start="18" size="1" name="TOO" description="Timeout Occurred" /> - <BitField start="19" size="1" name="DRX" description="Message stored to Dedicated Rx Buffer" /> - <BitField start="20" size="1" name="BEC" description="Bit Error Corrected" /> - <BitField start="21" size="1" name="BEU" description="Bit Error Uncorrected" /> - <BitField start="22" size="1" name="ELO" description="Error Logging Overflow" /> - <BitField start="23" size="1" name="EP" description="Error Passive" /> - <BitField start="24" size="1" name="EW" description="Warning Status" /> - <BitField start="25" size="1" name="BO" description="Bus_Off Status" /> - <BitField start="26" size="1" name="WDI" description="Watchdog Interrupt" /> - <BitField start="27" size="1" name="PEA" description="Protocol Error in Arbitration Phase" /> - <BitField start="28" size="1" name="PED" description="Protocol Error in Data Phase" /> - <BitField start="29" size="1" name="ARA" description="Access to Reserved Address" /> - </Register> - <Register start="+0x54" size="4" name="CAN_IE" access="Read/Write" description="Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0NE" description="Rx FIFO 0 New Message Interrupt Enable" /> - <BitField start="1" size="1" name="RF0WE" description="Rx FIFO 0 Watermark Reached Interrupt Enable" /> - <BitField start="2" size="1" name="RF0FE" description="Rx FIFO 0 Full Interrupt Enable" /> - <BitField start="3" size="1" name="RF0LE" description="Rx FIFO 0 Message Lost Interrupt Enable" /> - <BitField start="4" size="1" name="RF1NE" description="Rx FIFO 1 New Message Interrupt Enable" /> - <BitField start="5" size="1" name="RF1WE" description="Rx FIFO 1 Watermark Reached Interrupt Enable" /> - <BitField start="6" size="1" name="RF1FE" description="Rx FIFO 1 FIFO Full Interrupt Enable" /> - <BitField start="7" size="1" name="RF1LE" description="Rx FIFO 1 Message Lost Interrupt Enable" /> - <BitField start="8" size="1" name="HPME" description="High Priority Message Interrupt Enable" /> - <BitField start="9" size="1" name="TCE" description="Timestamp Completed Interrupt Enable" /> - <BitField start="10" size="1" name="TCFE" description="Transmission Cancellation Finished Interrupt Enable" /> - <BitField start="11" size="1" name="TFEE" description="Tx FIFO Empty Interrupt Enable" /> - <BitField start="12" size="1" name="TEFNE" description="Tx Event FIFO New Entry Interrupt Enable" /> - <BitField start="13" size="1" name="TEFWE" description="Tx Event FIFO Watermark Reached Interrupt Enable" /> - <BitField start="14" size="1" name="TEFFE" description="Tx Event FIFO Full Interrupt Enable" /> - <BitField start="15" size="1" name="TEFLE" description="Tx Event FIFO Element Lost Interrupt Enable" /> - <BitField start="16" size="1" name="TSWE" description="Timestamp Wraparound Interrupt Enable" /> - <BitField start="17" size="1" name="MRAFE" description="Message RAM Access Failure Interrupt Enable" /> - <BitField start="18" size="1" name="TOOE" description="Timeout Occurred Interrupt Enable" /> - <BitField start="19" size="1" name="DRXE" description="Message stored to Dedicated Rx Buffer Interrupt Enable" /> - <BitField start="20" size="1" name="BECE" description="Bit Error Corrected Interrupt Enable" /> - <BitField start="21" size="1" name="BEUE" description="Bit Error Uncorrected Interrupt Enable" /> - <BitField start="22" size="1" name="ELOE" description="Error Logging Overflow Interrupt Enable" /> - <BitField start="23" size="1" name="EPE" description="Error Passive Interrupt Enable" /> - <BitField start="24" size="1" name="EWE" description="Warning Status Interrupt Enable" /> - <BitField start="25" size="1" name="BOE" description="Bus_Off Status Interrupt Enable" /> - <BitField start="26" size="1" name="WDIE" description="Watchdog Interrupt Interrupt Enable" /> - <BitField start="27" size="1" name="PEAE" description="Protocol Error in Arbitration Phase Enable" /> - <BitField start="28" size="1" name="PEDE" description="Protocol Error in Data Phase Enable" /> - <BitField start="29" size="1" name="ARAE" description="Access to Reserved Address Enable" /> - </Register> - <Register start="+0x58" size="4" name="CAN_ILS" access="Read/Write" description="Interrupt Line Select" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RF0NL" description="Rx FIFO 0 New Message Interrupt Line" /> - <BitField start="1" size="1" name="RF0WL" description="Rx FIFO 0 Watermark Reached Interrupt Line" /> - <BitField start="2" size="1" name="RF0FL" description="Rx FIFO 0 Full Interrupt Line" /> - <BitField start="3" size="1" name="RF0LL" description="Rx FIFO 0 Message Lost Interrupt Line" /> - <BitField start="4" size="1" name="RF1NL" description="Rx FIFO 1 New Message Interrupt Line" /> - <BitField start="5" size="1" name="RF1WL" description="Rx FIFO 1 Watermark Reached Interrupt Line" /> - <BitField start="6" size="1" name="RF1FL" description="Rx FIFO 1 FIFO Full Interrupt Line" /> - <BitField start="7" size="1" name="RF1LL" description="Rx FIFO 1 Message Lost Interrupt Line" /> - <BitField start="8" size="1" name="HPML" description="High Priority Message Interrupt Line" /> - <BitField start="9" size="1" name="TCL" description="Timestamp Completed Interrupt Line" /> - <BitField start="10" size="1" name="TCFL" description="Transmission Cancellation Finished Interrupt Line" /> - <BitField start="11" size="1" name="TFEL" description="Tx FIFO Empty Interrupt Line" /> - <BitField start="12" size="1" name="TEFNL" description="Tx Event FIFO New Entry Interrupt Line" /> - <BitField start="13" size="1" name="TEFWL" description="Tx Event FIFO Watermark Reached Interrupt Line" /> - <BitField start="14" size="1" name="TEFFL" description="Tx Event FIFO Full Interrupt Line" /> - <BitField start="15" size="1" name="TEFLL" description="Tx Event FIFO Element Lost Interrupt Line" /> - <BitField start="16" size="1" name="TSWL" description="Timestamp Wraparound Interrupt Line" /> - <BitField start="17" size="1" name="MRAFL" description="Message RAM Access Failure Interrupt Line" /> - <BitField start="18" size="1" name="TOOL" description="Timeout Occurred Interrupt Line" /> - <BitField start="19" size="1" name="DRXL" description="Message stored to Dedicated Rx Buffer Interrupt Line" /> - <BitField start="20" size="1" name="BECL" description="Bit Error Corrected Interrupt Line" /> - <BitField start="21" size="1" name="BEUL" description="Bit Error Uncorrected Interrupt Line" /> - <BitField start="22" size="1" name="ELOL" description="Error Logging Overflow Interrupt Line" /> - <BitField start="23" size="1" name="EPL" description="Error Passive Interrupt Line" /> - <BitField start="24" size="1" name="EWL" description="Warning Status Interrupt Line" /> - <BitField start="25" size="1" name="BOL" description="Bus_Off Status Interrupt Line" /> - <BitField start="26" size="1" name="WDIL" description="Watchdog Interrupt Interrupt Line" /> - <BitField start="27" size="1" name="PEAL" description="Protocol Error in Arbitration Phase Line" /> - <BitField start="28" size="1" name="PEDL" description="Protocol Error in Data Phase Line" /> - <BitField start="29" size="1" name="ARAL" description="Access to Reserved Address Line" /> - </Register> - <Register start="+0x5C" size="4" name="CAN_ILE" access="Read/Write" description="Interrupt Line Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="EINT0" description="Enable Interrupt Line 0" /> - <BitField start="1" size="1" name="EINT1" description="Enable Interrupt Line 1" /> - </Register> - <Register start="+0x80" size="4" name="CAN_GFC" access="Read/Write" description="Global Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="RRFE" description="Reject Remote Frames Extended" /> - <BitField start="1" size="1" name="RRFS" description="Reject Remote Frames Standard" /> - <BitField start="2" size="2" name="ANFE" description="Accept Non-matching Frames Extended"> - <Enum name="RXF0" start="0x0" description="Accept in Rx FIFO 0" /> - <Enum name="RXF1" start="0x1" description="Accept in Rx FIFO 1" /> - <Enum name="REJECT" start="0x2" description="Reject" /> - </BitField> - <BitField start="4" size="2" name="ANFS" description="Accept Non-matching Frames Standard"> - <Enum name="RXF0" start="0x0" description="Accept in Rx FIFO 0" /> - <Enum name="RXF1" start="0x1" description="Accept in Rx FIFO 1" /> - <Enum name="REJECT" start="0x2" description="Reject" /> - </BitField> - </Register> - <Register start="+0x84" size="4" name="CAN_SIDFC" access="Read/Write" description="Standard ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="FLSSA" description="Filter List Standard Start Address" /> - <BitField start="16" size="8" name="LSS" description="List Size Standard" /> - </Register> - <Register start="+0x88" size="4" name="CAN_XIDFC" access="Read/Write" description="Extended ID Filter Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="FLESA" description="Filter List Extended Start Address" /> - <BitField start="16" size="7" name="LSE" description="List Size Extended" /> - </Register> - <Register start="+0x90" size="4" name="CAN_XIDAM" access="Read/Write" description="Extended ID AND Mask" reset_value="0x1FFFFFFF" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="29" name="EIDM" description="Extended ID Mask" /> - </Register> - <Register start="+0x94" size="4" name="CAN_HPMS" access="ReadOnly" description="High Priority Message Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="BIDX" description="Buffer Index" /> - <BitField start="6" size="2" name="MSI" description="Message Storage Indicator"> - <Enum name="NONE" start="0x0" description="No FIFO selected" /> - <Enum name="LOST" start="0x1" description="FIFO message lost" /> - <Enum name="FIFO0" start="0x2" description="Message stored in FIFO 0" /> - <Enum name="FIFO1" start="0x3" description="Message stored in FIFO 1" /> - </BitField> - <BitField start="8" size="7" name="FIDX" description="Filter Index" /> - <BitField start="15" size="1" name="FLST" description="Filter List" /> - </Register> - <Register start="+0x98" size="4" name="CAN_NDAT1" access="Read/Write" description="New Data 1" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ND0" description="New Data 0" /> - <BitField start="1" size="1" name="ND1" description="New Data 1" /> - <BitField start="2" size="1" name="ND2" description="New Data 2" /> - <BitField start="3" size="1" name="ND3" description="New Data 3" /> - <BitField start="4" size="1" name="ND4" description="New Data 4" /> - <BitField start="5" size="1" name="ND5" description="New Data 5" /> - <BitField start="6" size="1" name="ND6" description="New Data 6" /> - <BitField start="7" size="1" name="ND7" description="New Data 7" /> - <BitField start="8" size="1" name="ND8" description="New Data 8" /> - <BitField start="9" size="1" name="ND9" description="New Data 9" /> - <BitField start="10" size="1" name="ND10" description="New Data 10" /> - <BitField start="11" size="1" name="ND11" description="New Data 11" /> - <BitField start="12" size="1" name="ND12" description="New Data 12" /> - <BitField start="13" size="1" name="ND13" description="New Data 13" /> - <BitField start="14" size="1" name="ND14" description="New Data 14" /> - <BitField start="15" size="1" name="ND15" description="New Data 15" /> - <BitField start="16" size="1" name="ND16" description="New Data 16" /> - <BitField start="17" size="1" name="ND17" description="New Data 17" /> - <BitField start="18" size="1" name="ND18" description="New Data 18" /> - <BitField start="19" size="1" name="ND19" description="New Data 19" /> - <BitField start="20" size="1" name="ND20" description="New Data 20" /> - <BitField start="21" size="1" name="ND21" description="New Data 21" /> - <BitField start="22" size="1" name="ND22" description="New Data 22" /> - <BitField start="23" size="1" name="ND23" description="New Data 23" /> - <BitField start="24" size="1" name="ND24" description="New Data 24" /> - <BitField start="25" size="1" name="ND25" description="New Data 25" /> - <BitField start="26" size="1" name="ND26" description="New Data 26" /> - <BitField start="27" size="1" name="ND27" description="New Data 27" /> - <BitField start="28" size="1" name="ND28" description="New Data 28" /> - <BitField start="29" size="1" name="ND29" description="New Data 29" /> - <BitField start="30" size="1" name="ND30" description="New Data 30" /> - <BitField start="31" size="1" name="ND31" description="New Data 31" /> - </Register> - <Register start="+0x9C" size="4" name="CAN_NDAT2" access="Read/Write" description="New Data 2" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="ND32" description="New Data 32" /> - <BitField start="1" size="1" name="ND33" description="New Data 33" /> - <BitField start="2" size="1" name="ND34" description="New Data 34" /> - <BitField start="3" size="1" name="ND35" description="New Data 35" /> - <BitField start="4" size="1" name="ND36" description="New Data 36" /> - <BitField start="5" size="1" name="ND37" description="New Data 37" /> - <BitField start="6" size="1" name="ND38" description="New Data 38" /> - <BitField start="7" size="1" name="ND39" description="New Data 39" /> - <BitField start="8" size="1" name="ND40" description="New Data 40" /> - <BitField start="9" size="1" name="ND41" description="New Data 41" /> - <BitField start="10" size="1" name="ND42" description="New Data 42" /> - <BitField start="11" size="1" name="ND43" description="New Data 43" /> - <BitField start="12" size="1" name="ND44" description="New Data 44" /> - <BitField start="13" size="1" name="ND45" description="New Data 45" /> - <BitField start="14" size="1" name="ND46" description="New Data 46" /> - <BitField start="15" size="1" name="ND47" description="New Data 47" /> - <BitField start="16" size="1" name="ND48" description="New Data 48" /> - <BitField start="17" size="1" name="ND49" description="New Data 49" /> - <BitField start="18" size="1" name="ND50" description="New Data 50" /> - <BitField start="19" size="1" name="ND51" description="New Data 51" /> - <BitField start="20" size="1" name="ND52" description="New Data 52" /> - <BitField start="21" size="1" name="ND53" description="New Data 53" /> - <BitField start="22" size="1" name="ND54" description="New Data 54" /> - <BitField start="23" size="1" name="ND55" description="New Data 55" /> - <BitField start="24" size="1" name="ND56" description="New Data 56" /> - <BitField start="25" size="1" name="ND57" description="New Data 57" /> - <BitField start="26" size="1" name="ND58" description="New Data 58" /> - <BitField start="27" size="1" name="ND59" description="New Data 59" /> - <BitField start="28" size="1" name="ND60" description="New Data 60" /> - <BitField start="29" size="1" name="ND61" description="New Data 61" /> - <BitField start="30" size="1" name="ND62" description="New Data 62" /> - <BitField start="31" size="1" name="ND63" description="New Data 63" /> - </Register> - <Register start="+0xA0" size="4" name="CAN_RXF0C" access="Read/Write" description="Rx FIFO 0 Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="F0SA" description="Rx FIFO 0 Start Address" /> - <BitField start="16" size="7" name="F0S" description="Rx FIFO 0 Size" /> - <BitField start="24" size="7" name="F0WM" description="Rx FIFO 0 Watermark" /> - <BitField start="31" size="1" name="F0OM" description="FIFO 0 Operation Mode" /> - </Register> - <Register start="+0xA4" size="4" name="CAN_RXF0S" access="ReadOnly" description="Rx FIFO 0 Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="F0FL" description="Rx FIFO 0 Fill Level" /> - <BitField start="8" size="6" name="F0GI" description="Rx FIFO 0 Get Index" /> - <BitField start="16" size="6" name="F0PI" description="Rx FIFO 0 Put Index" /> - <BitField start="24" size="1" name="F0F" description="Rx FIFO 0 Full" /> - <BitField start="25" size="1" name="RF0L" description="Rx FIFO 0 Message Lost" /> - </Register> - <Register start="+0xA8" size="4" name="CAN_RXF0A" access="Read/Write" description="Rx FIFO 0 Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="F0AI" description="Rx FIFO 0 Acknowledge Index" /> - </Register> - <Register start="+0xAC" size="4" name="CAN_RXBC" access="Read/Write" description="Rx Buffer Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="RBSA" description="Rx Buffer Start Address" /> - </Register> - <Register start="+0xB0" size="4" name="CAN_RXF1C" access="Read/Write" description="Rx FIFO 1 Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="F1SA" description="Rx FIFO 1 Start Address" /> - <BitField start="16" size="7" name="F1S" description="Rx FIFO 1 Size" /> - <BitField start="24" size="7" name="F1WM" description="Rx FIFO 1 Watermark" /> - <BitField start="31" size="1" name="F1OM" description="FIFO 1 Operation Mode" /> - </Register> - <Register start="+0xB4" size="4" name="CAN_RXF1S" access="ReadOnly" description="Rx FIFO 1 Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="7" name="F1FL" description="Rx FIFO 1 Fill Level" /> - <BitField start="8" size="6" name="F1GI" description="Rx FIFO 1 Get Index" /> - <BitField start="16" size="6" name="F1PI" description="Rx FIFO 1 Put Index" /> - <BitField start="24" size="1" name="F1F" description="Rx FIFO 1 Full" /> - <BitField start="25" size="1" name="RF1L" description="Rx FIFO 1 Message Lost" /> - <BitField start="30" size="2" name="DMS" description="Debug Message Status"> - <Enum name="IDLE" start="0x0" description="Idle state" /> - <Enum name="DBGA" start="0x1" description="Debug message A received" /> - <Enum name="DBGB" start="0x2" description="Debug message A/B received" /> - <Enum name="DBGC" start="0x3" description="Debug message A/B/C received, DMA request set" /> - </BitField> - </Register> - <Register start="+0xB8" size="4" name="CAN_RXF1A" access="Read/Write" description="Rx FIFO 1 Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="F1AI" description="Rx FIFO 1 Acknowledge Index" /> - </Register> - <Register start="+0xBC" size="4" name="CAN_RXESC" access="Read/Write" description="Rx Buffer / FIFO Element Size Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="F0DS" description="Rx FIFO 0 Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - <BitField start="4" size="3" name="F1DS" description="Rx FIFO 1 Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - <BitField start="8" size="3" name="RBDS" description="Rx Buffer Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - </Register> - <Register start="+0xC0" size="4" name="CAN_TXBC" access="Read/Write" description="Tx Buffer Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="TBSA" description="Tx Buffers Start Address" /> - <BitField start="16" size="6" name="NDTB" description="Number of Dedicated Transmit Buffers" /> - <BitField start="24" size="6" name="TFQS" description="Transmit FIFO/Queue Size" /> - <BitField start="30" size="1" name="TFQM" description="Tx FIFO/Queue Mode" /> - </Register> - <Register start="+0xC4" size="4" name="CAN_TXFQS" access="ReadOnly" description="Tx FIFO / Queue Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="TFFL" description="Tx FIFO Free Level" /> - <BitField start="8" size="5" name="TFGI" description="Tx FIFO Get Index" /> - <BitField start="16" size="5" name="TFQPI" description="Tx FIFO/Queue Put Index" /> - <BitField start="21" size="1" name="TFQF" description="Tx FIFO/Queue Full" /> - </Register> - <Register start="+0xC8" size="4" name="CAN_TXESC" access="Read/Write" description="Tx Buffer Element Size Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="3" name="TBDS" description="Tx Buffer Data Field Size"> - <Enum name="DATA8" start="0x0" description="8 byte data field" /> - <Enum name="DATA12" start="0x1" description="12 byte data field" /> - <Enum name="DATA16" start="0x2" description="16 byte data field" /> - <Enum name="DATA20" start="0x3" description="20 byte data field" /> - <Enum name="DATA24" start="0x4" description="24 byte data field" /> - <Enum name="DATA32" start="0x5" description="32 byte data field" /> - <Enum name="DATA48" start="0x6" description="48 byte data field" /> - <Enum name="DATA64" start="0x7" description="64 byte data field" /> - </BitField> - </Register> - <Register start="+0xCC" size="4" name="CAN_TXBRP" access="ReadOnly" description="Tx Buffer Request Pending" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TRP0" description="Transmission Request Pending 0" /> - <BitField start="1" size="1" name="TRP1" description="Transmission Request Pending 1" /> - <BitField start="2" size="1" name="TRP2" description="Transmission Request Pending 2" /> - <BitField start="3" size="1" name="TRP3" description="Transmission Request Pending 3" /> - <BitField start="4" size="1" name="TRP4" description="Transmission Request Pending 4" /> - <BitField start="5" size="1" name="TRP5" description="Transmission Request Pending 5" /> - <BitField start="6" size="1" name="TRP6" description="Transmission Request Pending 6" /> - <BitField start="7" size="1" name="TRP7" description="Transmission Request Pending 7" /> - <BitField start="8" size="1" name="TRP8" description="Transmission Request Pending 8" /> - <BitField start="9" size="1" name="TRP9" description="Transmission Request Pending 9" /> - <BitField start="10" size="1" name="TRP10" description="Transmission Request Pending 10" /> - <BitField start="11" size="1" name="TRP11" description="Transmission Request Pending 11" /> - <BitField start="12" size="1" name="TRP12" description="Transmission Request Pending 12" /> - <BitField start="13" size="1" name="TRP13" description="Transmission Request Pending 13" /> - <BitField start="14" size="1" name="TRP14" description="Transmission Request Pending 14" /> - <BitField start="15" size="1" name="TRP15" description="Transmission Request Pending 15" /> - <BitField start="16" size="1" name="TRP16" description="Transmission Request Pending 16" /> - <BitField start="17" size="1" name="TRP17" description="Transmission Request Pending 17" /> - <BitField start="18" size="1" name="TRP18" description="Transmission Request Pending 18" /> - <BitField start="19" size="1" name="TRP19" description="Transmission Request Pending 19" /> - <BitField start="20" size="1" name="TRP20" description="Transmission Request Pending 20" /> - <BitField start="21" size="1" name="TRP21" description="Transmission Request Pending 21" /> - <BitField start="22" size="1" name="TRP22" description="Transmission Request Pending 22" /> - <BitField start="23" size="1" name="TRP23" description="Transmission Request Pending 23" /> - <BitField start="24" size="1" name="TRP24" description="Transmission Request Pending 24" /> - <BitField start="25" size="1" name="TRP25" description="Transmission Request Pending 25" /> - <BitField start="26" size="1" name="TRP26" description="Transmission Request Pending 26" /> - <BitField start="27" size="1" name="TRP27" description="Transmission Request Pending 27" /> - <BitField start="28" size="1" name="TRP28" description="Transmission Request Pending 28" /> - <BitField start="29" size="1" name="TRP29" description="Transmission Request Pending 29" /> - <BitField start="30" size="1" name="TRP30" description="Transmission Request Pending 30" /> - <BitField start="31" size="1" name="TRP31" description="Transmission Request Pending 31" /> - </Register> - <Register start="+0xD0" size="4" name="CAN_TXBAR" access="Read/Write" description="Tx Buffer Add Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="AR0" description="Add Request 0" /> - <BitField start="1" size="1" name="AR1" description="Add Request 1" /> - <BitField start="2" size="1" name="AR2" description="Add Request 2" /> - <BitField start="3" size="1" name="AR3" description="Add Request 3" /> - <BitField start="4" size="1" name="AR4" description="Add Request 4" /> - <BitField start="5" size="1" name="AR5" description="Add Request 5" /> - <BitField start="6" size="1" name="AR6" description="Add Request 6" /> - <BitField start="7" size="1" name="AR7" description="Add Request 7" /> - <BitField start="8" size="1" name="AR8" description="Add Request 8" /> - <BitField start="9" size="1" name="AR9" description="Add Request 9" /> - <BitField start="10" size="1" name="AR10" description="Add Request 10" /> - <BitField start="11" size="1" name="AR11" description="Add Request 11" /> - <BitField start="12" size="1" name="AR12" description="Add Request 12" /> - <BitField start="13" size="1" name="AR13" description="Add Request 13" /> - <BitField start="14" size="1" name="AR14" description="Add Request 14" /> - <BitField start="15" size="1" name="AR15" description="Add Request 15" /> - <BitField start="16" size="1" name="AR16" description="Add Request 16" /> - <BitField start="17" size="1" name="AR17" description="Add Request 17" /> - <BitField start="18" size="1" name="AR18" description="Add Request 18" /> - <BitField start="19" size="1" name="AR19" description="Add Request 19" /> - <BitField start="20" size="1" name="AR20" description="Add Request 20" /> - <BitField start="21" size="1" name="AR21" description="Add Request 21" /> - <BitField start="22" size="1" name="AR22" description="Add Request 22" /> - <BitField start="23" size="1" name="AR23" description="Add Request 23" /> - <BitField start="24" size="1" name="AR24" description="Add Request 24" /> - <BitField start="25" size="1" name="AR25" description="Add Request 25" /> - <BitField start="26" size="1" name="AR26" description="Add Request 26" /> - <BitField start="27" size="1" name="AR27" description="Add Request 27" /> - <BitField start="28" size="1" name="AR28" description="Add Request 28" /> - <BitField start="29" size="1" name="AR29" description="Add Request 29" /> - <BitField start="30" size="1" name="AR30" description="Add Request 30" /> - <BitField start="31" size="1" name="AR31" description="Add Request 31" /> - </Register> - <Register start="+0xD4" size="4" name="CAN_TXBCR" access="Read/Write" description="Tx Buffer Cancellation Request" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CR0" description="Cancellation Request 0" /> - <BitField start="1" size="1" name="CR1" description="Cancellation Request 1" /> - <BitField start="2" size="1" name="CR2" description="Cancellation Request 2" /> - <BitField start="3" size="1" name="CR3" description="Cancellation Request 3" /> - <BitField start="4" size="1" name="CR4" description="Cancellation Request 4" /> - <BitField start="5" size="1" name="CR5" description="Cancellation Request 5" /> - <BitField start="6" size="1" name="CR6" description="Cancellation Request 6" /> - <BitField start="7" size="1" name="CR7" description="Cancellation Request 7" /> - <BitField start="8" size="1" name="CR8" description="Cancellation Request 8" /> - <BitField start="9" size="1" name="CR9" description="Cancellation Request 9" /> - <BitField start="10" size="1" name="CR10" description="Cancellation Request 10" /> - <BitField start="11" size="1" name="CR11" description="Cancellation Request 11" /> - <BitField start="12" size="1" name="CR12" description="Cancellation Request 12" /> - <BitField start="13" size="1" name="CR13" description="Cancellation Request 13" /> - <BitField start="14" size="1" name="CR14" description="Cancellation Request 14" /> - <BitField start="15" size="1" name="CR15" description="Cancellation Request 15" /> - <BitField start="16" size="1" name="CR16" description="Cancellation Request 16" /> - <BitField start="17" size="1" name="CR17" description="Cancellation Request 17" /> - <BitField start="18" size="1" name="CR18" description="Cancellation Request 18" /> - <BitField start="19" size="1" name="CR19" description="Cancellation Request 19" /> - <BitField start="20" size="1" name="CR20" description="Cancellation Request 20" /> - <BitField start="21" size="1" name="CR21" description="Cancellation Request 21" /> - <BitField start="22" size="1" name="CR22" description="Cancellation Request 22" /> - <BitField start="23" size="1" name="CR23" description="Cancellation Request 23" /> - <BitField start="24" size="1" name="CR24" description="Cancellation Request 24" /> - <BitField start="25" size="1" name="CR25" description="Cancellation Request 25" /> - <BitField start="26" size="1" name="CR26" description="Cancellation Request 26" /> - <BitField start="27" size="1" name="CR27" description="Cancellation Request 27" /> - <BitField start="28" size="1" name="CR28" description="Cancellation Request 28" /> - <BitField start="29" size="1" name="CR29" description="Cancellation Request 29" /> - <BitField start="30" size="1" name="CR30" description="Cancellation Request 30" /> - <BitField start="31" size="1" name="CR31" description="Cancellation Request 31" /> - </Register> - <Register start="+0xD8" size="4" name="CAN_TXBTO" access="ReadOnly" description="Tx Buffer Transmission Occurred" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TO0" description="Transmission Occurred 0" /> - <BitField start="1" size="1" name="TO1" description="Transmission Occurred 1" /> - <BitField start="2" size="1" name="TO2" description="Transmission Occurred 2" /> - <BitField start="3" size="1" name="TO3" description="Transmission Occurred 3" /> - <BitField start="4" size="1" name="TO4" description="Transmission Occurred 4" /> - <BitField start="5" size="1" name="TO5" description="Transmission Occurred 5" /> - <BitField start="6" size="1" name="TO6" description="Transmission Occurred 6" /> - <BitField start="7" size="1" name="TO7" description="Transmission Occurred 7" /> - <BitField start="8" size="1" name="TO8" description="Transmission Occurred 8" /> - <BitField start="9" size="1" name="TO9" description="Transmission Occurred 9" /> - <BitField start="10" size="1" name="TO10" description="Transmission Occurred 10" /> - <BitField start="11" size="1" name="TO11" description="Transmission Occurred 11" /> - <BitField start="12" size="1" name="TO12" description="Transmission Occurred 12" /> - <BitField start="13" size="1" name="TO13" description="Transmission Occurred 13" /> - <BitField start="14" size="1" name="TO14" description="Transmission Occurred 14" /> - <BitField start="15" size="1" name="TO15" description="Transmission Occurred 15" /> - <BitField start="16" size="1" name="TO16" description="Transmission Occurred 16" /> - <BitField start="17" size="1" name="TO17" description="Transmission Occurred 17" /> - <BitField start="18" size="1" name="TO18" description="Transmission Occurred 18" /> - <BitField start="19" size="1" name="TO19" description="Transmission Occurred 19" /> - <BitField start="20" size="1" name="TO20" description="Transmission Occurred 20" /> - <BitField start="21" size="1" name="TO21" description="Transmission Occurred 21" /> - <BitField start="22" size="1" name="TO22" description="Transmission Occurred 22" /> - <BitField start="23" size="1" name="TO23" description="Transmission Occurred 23" /> - <BitField start="24" size="1" name="TO24" description="Transmission Occurred 24" /> - <BitField start="25" size="1" name="TO25" description="Transmission Occurred 25" /> - <BitField start="26" size="1" name="TO26" description="Transmission Occurred 26" /> - <BitField start="27" size="1" name="TO27" description="Transmission Occurred 27" /> - <BitField start="28" size="1" name="TO28" description="Transmission Occurred 28" /> - <BitField start="29" size="1" name="TO29" description="Transmission Occurred 29" /> - <BitField start="30" size="1" name="TO30" description="Transmission Occurred 30" /> - <BitField start="31" size="1" name="TO31" description="Transmission Occurred 31" /> - </Register> - <Register start="+0xDC" size="4" name="CAN_TXBCF" access="ReadOnly" description="Tx Buffer Cancellation Finished" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CF0" description="Tx Buffer Cancellation Finished 0" /> - <BitField start="1" size="1" name="CF1" description="Tx Buffer Cancellation Finished 1" /> - <BitField start="2" size="1" name="CF2" description="Tx Buffer Cancellation Finished 2" /> - <BitField start="3" size="1" name="CF3" description="Tx Buffer Cancellation Finished 3" /> - <BitField start="4" size="1" name="CF4" description="Tx Buffer Cancellation Finished 4" /> - <BitField start="5" size="1" name="CF5" description="Tx Buffer Cancellation Finished 5" /> - <BitField start="6" size="1" name="CF6" description="Tx Buffer Cancellation Finished 6" /> - <BitField start="7" size="1" name="CF7" description="Tx Buffer Cancellation Finished 7" /> - <BitField start="8" size="1" name="CF8" description="Tx Buffer Cancellation Finished 8" /> - <BitField start="9" size="1" name="CF9" description="Tx Buffer Cancellation Finished 9" /> - <BitField start="10" size="1" name="CF10" description="Tx Buffer Cancellation Finished 10" /> - <BitField start="11" size="1" name="CF11" description="Tx Buffer Cancellation Finished 11" /> - <BitField start="12" size="1" name="CF12" description="Tx Buffer Cancellation Finished 12" /> - <BitField start="13" size="1" name="CF13" description="Tx Buffer Cancellation Finished 13" /> - <BitField start="14" size="1" name="CF14" description="Tx Buffer Cancellation Finished 14" /> - <BitField start="15" size="1" name="CF15" description="Tx Buffer Cancellation Finished 15" /> - <BitField start="16" size="1" name="CF16" description="Tx Buffer Cancellation Finished 16" /> - <BitField start="17" size="1" name="CF17" description="Tx Buffer Cancellation Finished 17" /> - <BitField start="18" size="1" name="CF18" description="Tx Buffer Cancellation Finished 18" /> - <BitField start="19" size="1" name="CF19" description="Tx Buffer Cancellation Finished 19" /> - <BitField start="20" size="1" name="CF20" description="Tx Buffer Cancellation Finished 20" /> - <BitField start="21" size="1" name="CF21" description="Tx Buffer Cancellation Finished 21" /> - <BitField start="22" size="1" name="CF22" description="Tx Buffer Cancellation Finished 22" /> - <BitField start="23" size="1" name="CF23" description="Tx Buffer Cancellation Finished 23" /> - <BitField start="24" size="1" name="CF24" description="Tx Buffer Cancellation Finished 24" /> - <BitField start="25" size="1" name="CF25" description="Tx Buffer Cancellation Finished 25" /> - <BitField start="26" size="1" name="CF26" description="Tx Buffer Cancellation Finished 26" /> - <BitField start="27" size="1" name="CF27" description="Tx Buffer Cancellation Finished 27" /> - <BitField start="28" size="1" name="CF28" description="Tx Buffer Cancellation Finished 28" /> - <BitField start="29" size="1" name="CF29" description="Tx Buffer Cancellation Finished 29" /> - <BitField start="30" size="1" name="CF30" description="Tx Buffer Cancellation Finished 30" /> - <BitField start="31" size="1" name="CF31" description="Tx Buffer Cancellation Finished 31" /> - </Register> - <Register start="+0xE0" size="4" name="CAN_TXBTIE" access="Read/Write" description="Tx Buffer Transmission Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="TIE0" description="Transmission Interrupt Enable 0" /> - <BitField start="1" size="1" name="TIE1" description="Transmission Interrupt Enable 1" /> - <BitField start="2" size="1" name="TIE2" description="Transmission Interrupt Enable 2" /> - <BitField start="3" size="1" name="TIE3" description="Transmission Interrupt Enable 3" /> - <BitField start="4" size="1" name="TIE4" description="Transmission Interrupt Enable 4" /> - <BitField start="5" size="1" name="TIE5" description="Transmission Interrupt Enable 5" /> - <BitField start="6" size="1" name="TIE6" description="Transmission Interrupt Enable 6" /> - <BitField start="7" size="1" name="TIE7" description="Transmission Interrupt Enable 7" /> - <BitField start="8" size="1" name="TIE8" description="Transmission Interrupt Enable 8" /> - <BitField start="9" size="1" name="TIE9" description="Transmission Interrupt Enable 9" /> - <BitField start="10" size="1" name="TIE10" description="Transmission Interrupt Enable 10" /> - <BitField start="11" size="1" name="TIE11" description="Transmission Interrupt Enable 11" /> - <BitField start="12" size="1" name="TIE12" description="Transmission Interrupt Enable 12" /> - <BitField start="13" size="1" name="TIE13" description="Transmission Interrupt Enable 13" /> - <BitField start="14" size="1" name="TIE14" description="Transmission Interrupt Enable 14" /> - <BitField start="15" size="1" name="TIE15" description="Transmission Interrupt Enable 15" /> - <BitField start="16" size="1" name="TIE16" description="Transmission Interrupt Enable 16" /> - <BitField start="17" size="1" name="TIE17" description="Transmission Interrupt Enable 17" /> - <BitField start="18" size="1" name="TIE18" description="Transmission Interrupt Enable 18" /> - <BitField start="19" size="1" name="TIE19" description="Transmission Interrupt Enable 19" /> - <BitField start="20" size="1" name="TIE20" description="Transmission Interrupt Enable 20" /> - <BitField start="21" size="1" name="TIE21" description="Transmission Interrupt Enable 21" /> - <BitField start="22" size="1" name="TIE22" description="Transmission Interrupt Enable 22" /> - <BitField start="23" size="1" name="TIE23" description="Transmission Interrupt Enable 23" /> - <BitField start="24" size="1" name="TIE24" description="Transmission Interrupt Enable 24" /> - <BitField start="25" size="1" name="TIE25" description="Transmission Interrupt Enable 25" /> - <BitField start="26" size="1" name="TIE26" description="Transmission Interrupt Enable 26" /> - <BitField start="27" size="1" name="TIE27" description="Transmission Interrupt Enable 27" /> - <BitField start="28" size="1" name="TIE28" description="Transmission Interrupt Enable 28" /> - <BitField start="29" size="1" name="TIE29" description="Transmission Interrupt Enable 29" /> - <BitField start="30" size="1" name="TIE30" description="Transmission Interrupt Enable 30" /> - <BitField start="31" size="1" name="TIE31" description="Transmission Interrupt Enable 31" /> - </Register> - <Register start="+0xE4" size="4" name="CAN_TXBCIE" access="Read/Write" description="Tx Buffer Cancellation Finished Interrupt Enable" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CFIE0" description="Cancellation Finished Interrupt Enable 0" /> - <BitField start="1" size="1" name="CFIE1" description="Cancellation Finished Interrupt Enable 1" /> - <BitField start="2" size="1" name="CFIE2" description="Cancellation Finished Interrupt Enable 2" /> - <BitField start="3" size="1" name="CFIE3" description="Cancellation Finished Interrupt Enable 3" /> - <BitField start="4" size="1" name="CFIE4" description="Cancellation Finished Interrupt Enable 4" /> - <BitField start="5" size="1" name="CFIE5" description="Cancellation Finished Interrupt Enable 5" /> - <BitField start="6" size="1" name="CFIE6" description="Cancellation Finished Interrupt Enable 6" /> - <BitField start="7" size="1" name="CFIE7" description="Cancellation Finished Interrupt Enable 7" /> - <BitField start="8" size="1" name="CFIE8" description="Cancellation Finished Interrupt Enable 8" /> - <BitField start="9" size="1" name="CFIE9" description="Cancellation Finished Interrupt Enable 9" /> - <BitField start="10" size="1" name="CFIE10" description="Cancellation Finished Interrupt Enable 10" /> - <BitField start="11" size="1" name="CFIE11" description="Cancellation Finished Interrupt Enable 11" /> - <BitField start="12" size="1" name="CFIE12" description="Cancellation Finished Interrupt Enable 12" /> - <BitField start="13" size="1" name="CFIE13" description="Cancellation Finished Interrupt Enable 13" /> - <BitField start="14" size="1" name="CFIE14" description="Cancellation Finished Interrupt Enable 14" /> - <BitField start="15" size="1" name="CFIE15" description="Cancellation Finished Interrupt Enable 15" /> - <BitField start="16" size="1" name="CFIE16" description="Cancellation Finished Interrupt Enable 16" /> - <BitField start="17" size="1" name="CFIE17" description="Cancellation Finished Interrupt Enable 17" /> - <BitField start="18" size="1" name="CFIE18" description="Cancellation Finished Interrupt Enable 18" /> - <BitField start="19" size="1" name="CFIE19" description="Cancellation Finished Interrupt Enable 19" /> - <BitField start="20" size="1" name="CFIE20" description="Cancellation Finished Interrupt Enable 20" /> - <BitField start="21" size="1" name="CFIE21" description="Cancellation Finished Interrupt Enable 21" /> - <BitField start="22" size="1" name="CFIE22" description="Cancellation Finished Interrupt Enable 22" /> - <BitField start="23" size="1" name="CFIE23" description="Cancellation Finished Interrupt Enable 23" /> - <BitField start="24" size="1" name="CFIE24" description="Cancellation Finished Interrupt Enable 24" /> - <BitField start="25" size="1" name="CFIE25" description="Cancellation Finished Interrupt Enable 25" /> - <BitField start="26" size="1" name="CFIE26" description="Cancellation Finished Interrupt Enable 26" /> - <BitField start="27" size="1" name="CFIE27" description="Cancellation Finished Interrupt Enable 27" /> - <BitField start="28" size="1" name="CFIE28" description="Cancellation Finished Interrupt Enable 28" /> - <BitField start="29" size="1" name="CFIE29" description="Cancellation Finished Interrupt Enable 29" /> - <BitField start="30" size="1" name="CFIE30" description="Cancellation Finished Interrupt Enable 30" /> - <BitField start="31" size="1" name="CFIE31" description="Cancellation Finished Interrupt Enable 31" /> - </Register> - <Register start="+0xF0" size="4" name="CAN_TXEFC" access="Read/Write" description="Tx Event FIFO Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="16" name="EFSA" description="Event FIFO Start Address" /> - <BitField start="16" size="6" name="EFS" description="Event FIFO Size" /> - <BitField start="24" size="6" name="EFWM" description="Event FIFO Watermark" /> - </Register> - <Register start="+0xF4" size="4" name="CAN_TXEFS" access="ReadOnly" description="Tx Event FIFO Status" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="6" name="EFFL" description="Event FIFO Fill Level" /> - <BitField start="8" size="5" name="EFGI" description="Event FIFO Get Index" /> - <BitField start="16" size="5" name="EFPI" description="Event FIFO Put Index" /> - <BitField start="24" size="1" name="EFF" description="Event FIFO Full" /> - <BitField start="25" size="1" name="TEFL" description="Tx Event FIFO Element Lost" /> - </Register> - <Register start="+0xF8" size="4" name="CAN_TXEFA" access="Read/Write" description="Tx Event FIFO Acknowledge" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="5" name="EFAI" description="Event FIFO Acknowledge Index" /> - </Register> - </RegisterGroup> <RegisterGroup name="CCL" start="0x42003800" description="Configurable Custom Logic"> <Register start="+0x0" size="1" name="CCL_CTRL" access="Read/Write" description="Control" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> <BitField start="0" size="1" name="SWRST" description="Software Reset" /> @@ -5817,7 +4447,7 @@ <Register start="+0x0010+4" size="4" name="DSU_DCC1" access="Read/Write" description="Debug Communication Channel n" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> <BitField start="0" size="32" name="DATA" description="Data" /> </Register> - <Register start="+0x0018" size="4" name="DSU_DID" access="ReadOnly" description="Device Identification" reset_value="0x61810002" reset_mask="0xFFFFFFFF"> + <Register start="+0x0018" size="4" name="DSU_DID" access="ReadOnly" description="Device Identification" reset_value="0x60060005" reset_mask="0xFFFFFFFF"> <BitField start="0" size="8" name="DEVSEL" description="Device Select" /> <BitField start="8" size="4" name="REVISION" description="Revision Number" /> <BitField start="12" size="4" name="DIE" description="Die Number" /> @@ -8893,11 +7523,33 @@ <Register start="+0x080+16" size="4" name="HMATRIXB_PRAS2" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x080+24" size="4" name="HMATRIXB_PRAS3" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x080+32" size="4" name="HMATRIXB_PRAS4" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+40" size="4" name="HMATRIXB_PRAS5" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+48" size="4" name="HMATRIXB_PRAS6" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+56" size="4" name="HMATRIXB_PRAS7" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+64" size="4" name="HMATRIXB_PRAS8" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+72" size="4" name="HMATRIXB_PRAS9" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+80" size="4" name="HMATRIXB_PRAS10" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+88" size="4" name="HMATRIXB_PRAS11" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+96" size="4" name="HMATRIXB_PRAS12" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+104" size="4" name="HMATRIXB_PRAS13" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+112" size="4" name="HMATRIXB_PRAS14" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x080+120" size="4" name="HMATRIXB_PRAS15" access="Read/Write" description="Priority A for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x084+0" size="4" name="HMATRIXB_PRBS0" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x084+8" size="4" name="HMATRIXB_PRBS1" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x084+16" size="4" name="HMATRIXB_PRBS2" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x084+24" size="4" name="HMATRIXB_PRBS3" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> <Register start="+0x084+32" size="4" name="HMATRIXB_PRBS4" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+40" size="4" name="HMATRIXB_PRBS5" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+48" size="4" name="HMATRIXB_PRBS6" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+56" size="4" name="HMATRIXB_PRBS7" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+64" size="4" name="HMATRIXB_PRBS8" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+72" size="4" name="HMATRIXB_PRBS9" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+80" size="4" name="HMATRIXB_PRBS10" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+88" size="4" name="HMATRIXB_PRBS11" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+96" size="4" name="HMATRIXB_PRBS12" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+104" size="4" name="HMATRIXB_PRBS13" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+112" size="4" name="HMATRIXB_PRBS14" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> + <Register start="+0x084+120" size="4" name="HMATRIXB_PRBS15" access="Read/Write" description="Priority B for Slave" reset_value="0x00000000" reset_mask="0xFFFFFFFF" /> </RegisterGroup> <RegisterGroup name="ICM" start="0x42002C00" description="Integrity Check Monitor"> <Register start="+0x00" size="4" name="ICM_CFG" access="Read/Write" description="Configuration" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> @@ -9290,8 +7942,6 @@ <BitField start="12" size="1" name="PAC_" description="PAC AHB Clock Mask" /> <BitField start="13" size="1" name="QSPI_" description="QSPI AHB Clock Mask" /> <BitField start="15" size="1" name="SDHC0_" description="SDHC0 AHB Clock Mask" /> - <BitField start="17" size="1" name="CAN0_" description="CAN0 AHB Clock Mask" /> - <BitField start="18" size="1" name="CAN1_" description="CAN1 AHB Clock Mask" /> <BitField start="19" size="1" name="ICM_" description="ICM AHB Clock Mask" /> <BitField start="20" size="1" name="PUKCC_" description="PUKCC AHB Clock Mask" /> <BitField start="21" size="1" name="QSPI_2X_" description="QSPI_2X AHB Clock Mask" /> @@ -9863,8 +8513,6 @@ <BitField start="16" size="1" name="RAMECC_" description="RAMECC" /> </Register> <Register start="+0x1C" size="4" name="PAC_INTFLAGC" access="Read/Write" description="Peripheral interrupt flag status - Bridge C" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CAN0_" description="CAN0" /> - <BitField start="1" size="1" name="CAN1_" description="CAN1" /> <BitField start="3" size="1" name="TCC2_" description="TCC2" /> <BitField start="4" size="1" name="TCC3_" description="TCC3" /> <BitField start="5" size="1" name="TC4_" description="TC4" /> @@ -9925,8 +8573,6 @@ <BitField start="16" size="1" name="RAMECC_" description="RAMECC APB Protect Enable" /> </Register> <Register start="+0x3C" size="4" name="PAC_STATUSC" access="ReadOnly" description="Peripheral write protection status - Bridge C" reset_value="0x00000000" reset_mask="0xFFFFFFFF"> - <BitField start="0" size="1" name="CAN0_" description="CAN0 APB Protect Enable" /> - <BitField start="1" size="1" name="CAN1_" description="CAN1 APB Protect Enable" /> <BitField start="3" size="1" name="TCC2_" description="TCC2 APB Protect Enable" /> <BitField start="4" size="1" name="TCC3_" description="TCC3 APB Protect Enable" /> <BitField start="5" size="1" name="TC4_" description="TC4 APB Protect Enable" /> @@ -24499,1072 +23145,499 @@ </BitField> </Register> </RegisterGroup> - <RegisterGroup name="NVIC" start="0xE000E100" description="Nested Vectored Interrupt Controller"> - <Register name="NVIC_ISER0" description="Interrupt Set-Enable Register 0" start="0xE000E100"> - <BitField name="PM_INTREQ" start="0" size="1" /> - <BitField name="MCLK_INTREQ" start="1" size="1" /> - <BitField name="OSCCTRL_INTREQ_0" start="2" size="1" /> - <BitField name="OSCCTRL_INTREQ_1" start="3" size="1" /> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="1" /> - <BitField name="OSCCTRL_INTREQ_3" start="5" size="1" /> - <BitField name="OSCCTRL_INTREQ_4" start="6" size="1" /> - <BitField name="OSC32KCTRL_INTREQ" start="7" size="1" /> - <BitField name="SUPC_INTREQ_0" start="8" size="1" /> - <BitField name="SUPC_INTREQ_1" start="9" size="1" /> - <BitField name="WDT_INTREQ" start="10" size="1" /> - <BitField name="RTC_INTREQ" start="11" size="1" /> - <BitField name="EIC_INTREQ_0" start="12" size="1" /> - <BitField name="EIC_INTREQ_1" start="13" size="1" /> - <BitField name="EIC_INTREQ_2" start="14" size="1" /> - <BitField name="EIC_INTREQ_3" start="15" size="1" /> - <BitField name="EIC_INTREQ_4" start="16" size="1" /> - <BitField name="EIC_INTREQ_5" start="17" size="1" /> - <BitField name="EIC_INTREQ_6" start="18" size="1" /> - <BitField name="EIC_INTREQ_7" start="19" size="1" /> - <BitField name="EIC_INTREQ_8" start="20" size="1" /> - <BitField name="EIC_INTREQ_9" start="21" size="1" /> - <BitField name="EIC_INTREQ_10" start="22" size="1" /> - <BitField name="EIC_INTREQ_11" start="23" size="1" /> - <BitField name="EIC_INTREQ_12" start="24" size="1" /> - <BitField name="EIC_INTREQ_13" start="25" size="1" /> - <BitField name="EIC_INTREQ_14" start="26" size="1" /> - <BitField name="EIC_INTREQ_15" start="27" size="1" /> - <BitField name="FREQM_INTREQ" start="28" size="1" /> - <BitField name="NVMCTRL_INTREQ_0" start="29" size="1" /> - <BitField name="NVMCTRL_INTREQ_1" start="30" size="1" /> - <BitField name="DMAC_INTREQ_0" start="31" size="1" /> - </Register> - <Register name="NVIC_ISER1" description="Interrupt Set-Enable Register 1" start="0xE000E104"> - <BitField name="DMAC_INTREQ_1" start="0" size="1" /> - <BitField name="DMAC_INTREQ_2" start="1" size="1" /> - <BitField name="DMAC_INTREQ_3" start="2" size="1" /> - <BitField name="DMAC_INTREQ_4" start="3" size="1" /> - <BitField name="EVSYS_INTREQ_0" start="4" size="1" /> - <BitField name="EVSYS_INTREQ_1" start="5" size="1" /> - <BitField name="EVSYS_INTREQ_2" start="6" size="1" /> - <BitField name="EVSYS_INTREQ_3" start="7" size="1" /> - <BitField name="EVSYS_INTREQ_4" start="8" size="1" /> - <BitField name="PAC_INTREQ" start="9" size="1" /> - <BitField name="TAL_INTREQ_0" start="10" size="1" /> - <BitField name="TAL_INTREQ_1" start="11" size="1" /> - <BitField name="RAMECC_INTREQ" start="13" size="1" /> - <BitField name="SERCOM0_INTREQ_0" start="14" size="1" /> - <BitField name="SERCOM0_INTREQ_1" start="15" size="1" /> - <BitField name="SERCOM0_INTREQ_2" start="16" size="1" /> - <BitField name="SERCOM0_INTREQ_3" start="17" size="1" /> - <BitField name="SERCOM1_INTREQ_0" start="18" size="1" /> - <BitField name="SERCOM1_INTREQ_1" start="19" size="1" /> - <BitField name="SERCOM1_INTREQ_2" start="20" size="1" /> - <BitField name="SERCOM1_INTREQ_3" start="21" size="1" /> - <BitField name="SERCOM2_INTREQ_0" start="22" size="1" /> - <BitField name="SERCOM2_INTREQ_1" start="23" size="1" /> - <BitField name="SERCOM2_INTREQ_2" start="24" size="1" /> - <BitField name="SERCOM2_INTREQ_3" start="25" size="1" /> - <BitField name="SERCOM3_INTREQ_0" start="26" size="1" /> - <BitField name="SERCOM3_INTREQ_1" start="27" size="1" /> - <BitField name="SERCOM3_INTREQ_2" start="28" size="1" /> - <BitField name="SERCOM3_INTREQ_3" start="29" size="1" /> - <BitField name="SERCOM4_INTREQ_0" start="30" size="1" /> - <BitField name="SERCOM4_INTREQ_1" start="31" size="1" /> - </Register> - <Register name="NVIC_ISER2" description="Interrupt Set-Enable Register 2" start="0xE000E108"> - <BitField name="SERCOM4_INTREQ_2" start="0" size="1" /> - <BitField name="SERCOM4_INTREQ_3" start="1" size="1" /> - <BitField name="SERCOM5_INTREQ_0" start="2" size="1" /> - <BitField name="SERCOM5_INTREQ_1" start="3" size="1" /> - <BitField name="SERCOM5_INTREQ_2" start="4" size="1" /> - <BitField name="SERCOM5_INTREQ_3" start="5" size="1" /> - <BitField name="CAN0_INTREQ" start="14" size="1" /> - <BitField name="CAN1_INTREQ" start="15" size="1" /> - <BitField name="USB_INTREQ_0" start="16" size="1" /> - <BitField name="USB_INTREQ_1" start="17" size="1" /> - <BitField name="USB_INTREQ_2" start="18" size="1" /> - <BitField name="USB_INTREQ_3" start="19" size="1" /> - <BitField name="TCC0_INTREQ_0" start="21" size="1" /> - <BitField name="TCC0_INTREQ_1" start="22" size="1" /> - <BitField name="TCC0_INTREQ_2" start="23" size="1" /> - <BitField name="TCC0_INTREQ_3" start="24" size="1" /> - <BitField name="TCC0_INTREQ_4" start="25" size="1" /> - <BitField name="TCC0_INTREQ_5" start="26" size="1" /> - <BitField name="TCC0_INTREQ_6" start="27" size="1" /> - <BitField name="TCC1_INTREQ_0" start="28" size="1" /> - <BitField name="TCC1_INTREQ_1" start="29" size="1" /> - <BitField name="TCC1_INTREQ_2" start="30" size="1" /> - <BitField name="TCC1_INTREQ_3" start="31" size="1" /> - </Register> - <Register name="NVIC_ISER3" description="Interrupt Set-Enable Register 3" start="0xE000E10C"> - <BitField name="TCC1_INTREQ_4" start="0" size="1" /> - <BitField name="TCC2_INTREQ_0" start="1" size="1" /> - <BitField name="TCC2_INTREQ_1" start="2" size="1" /> - <BitField name="TCC2_INTREQ_2" start="3" size="1" /> - <BitField name="TCC2_INTREQ_3" start="4" size="1" /> - <BitField name="TCC3_INTREQ_0" start="5" size="1" /> - <BitField name="TCC3_INTREQ_1" start="6" size="1" /> - <BitField name="TCC3_INTREQ_2" start="7" size="1" /> - <BitField name="TCC4_INTREQ_0" start="8" size="1" /> - <BitField name="TCC4_INTREQ_1" start="9" size="1" /> - <BitField name="TCC4_INTREQ_2" start="10" size="1" /> - <BitField name="TC0_INTREQ" start="11" size="1" /> - <BitField name="TC1_INTREQ" start="12" size="1" /> - <BitField name="TC2_INTREQ" start="13" size="1" /> - <BitField name="TC3_INTREQ" start="14" size="1" /> - <BitField name="TC4_INTREQ" start="15" size="1" /> - <BitField name="TC5_INTREQ" start="16" size="1" /> - <BitField name="PDEC_INTREQ_0" start="19" size="1" /> - <BitField name="PDEC_INTREQ_1" start="20" size="1" /> - <BitField name="PDEC_INTREQ_2" start="21" size="1" /> - <BitField name="ADC0_INTREQ_0" start="22" size="1" /> - <BitField name="ADC0_INTREQ_1" start="23" size="1" /> - <BitField name="ADC1_INTREQ_0" start="24" size="1" /> - <BitField name="ADC1_INTREQ_1" start="25" size="1" /> - <BitField name="AC_INTREQ" start="26" size="1" /> - <BitField name="DAC_INTREQ_0" start="27" size="1" /> - <BitField name="DAC_INTREQ_1" start="28" size="1" /> - <BitField name="DAC_INTREQ_2" start="29" size="1" /> - <BitField name="DAC_INTREQ_3" start="30" size="1" /> - <BitField name="DAC_INTREQ_4" start="31" size="1" /> + <RegisterGroup start="0xE000E000" name="SCB"> + <Register start="0xE000E004" name="ICTR" aka="Interrupt_Control_Type" access="ReadOnly" description="Interrupt Controller Type Register"> + <BitField size="5" start="0" name="INTLINESNUM" description="Total number of interrupt lines in groups"> + <Enum name="0...32" start="0x0" /> + <Enum name="33...64" start="0x1" /> + <Enum name="65...96" start="0x2" /> + <Enum name="97...128" start="0x3" /> + <Enum name="129...160" start="0x4" /> + <Enum name="161...192" start="0x5" /> + <Enum name="193...224" start="0x6" /> + <Enum name="225...256" start="0x7" /> + </BitField> </Register> - <Register name="NVIC_ISER4" description="Interrupt Set-Enable Register 4" start="0xE000E110"> - <BitField name="I2S_INTREQ" start="0" size="1" /> - <BitField name="PCC_INTREQ" start="1" size="1" /> - <BitField name="AES_INTREQ" start="2" size="1" /> - <BitField name="TRNG_INTREQ" start="3" size="1" /> - <BitField name="ICM_INTREQ" start="4" size="1" /> - <BitField name="QSPI_INTREQ" start="6" size="1" /> - <BitField name="SDHC0_INTREQ" start="7" size="1" /> + <Register start="0xE000E008" name="ACTLR" description="Auxiliary Control Register"> + <BitField size="1" start="0" name="DISMCYCINT" description="Disable load/store multiple" /> + <BitField size="1" start="1" name="DISDEFWBUF" description="Disable write buffer" /> + <BitField size="1" start="2" name="DISFOLD" description="Disable IT folding" /> + <BitField size="1" start="8" name="DISFPCA" description="Disable FPCA update" /> + <BitField size="1" start="9" name="DISOOFP" description="Disable out of order FP execution" /> </Register> - <Register name="NVIC_ICER0" description="Interrupt Clear-Enable Register 0" start="0xE000E180"> - <BitField name="PM_INTREQ" start="0" size="1" /> - <BitField name="MCLK_INTREQ" start="1" size="1" /> - <BitField name="OSCCTRL_INTREQ_0" start="2" size="1" /> - <BitField name="OSCCTRL_INTREQ_1" start="3" size="1" /> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="1" /> - <BitField name="OSCCTRL_INTREQ_3" start="5" size="1" /> - <BitField name="OSCCTRL_INTREQ_4" start="6" size="1" /> - <BitField name="OSC32KCTRL_INTREQ" start="7" size="1" /> - <BitField name="SUPC_INTREQ_0" start="8" size="1" /> - <BitField name="SUPC_INTREQ_1" start="9" size="1" /> - <BitField name="WDT_INTREQ" start="10" size="1" /> - <BitField name="RTC_INTREQ" start="11" size="1" /> - <BitField name="EIC_INTREQ_0" start="12" size="1" /> - <BitField name="EIC_INTREQ_1" start="13" size="1" /> - <BitField name="EIC_INTREQ_2" start="14" size="1" /> - <BitField name="EIC_INTREQ_3" start="15" size="1" /> - <BitField name="EIC_INTREQ_4" start="16" size="1" /> - <BitField name="EIC_INTREQ_5" start="17" size="1" /> - <BitField name="EIC_INTREQ_6" start="18" size="1" /> - <BitField name="EIC_INTREQ_7" start="19" size="1" /> - <BitField name="EIC_INTREQ_8" start="20" size="1" /> - <BitField name="EIC_INTREQ_9" start="21" size="1" /> - <BitField name="EIC_INTREQ_10" start="22" size="1" /> - <BitField name="EIC_INTREQ_11" start="23" size="1" /> - <BitField name="EIC_INTREQ_12" start="24" size="1" /> - <BitField name="EIC_INTREQ_13" start="25" size="1" /> - <BitField name="EIC_INTREQ_14" start="26" size="1" /> - <BitField name="EIC_INTREQ_15" start="27" size="1" /> - <BitField name="FREQM_INTREQ" start="28" size="1" /> - <BitField name="NVMCTRL_INTREQ_0" start="29" size="1" /> - <BitField name="NVMCTRL_INTREQ_1" start="30" size="1" /> - <BitField name="DMAC_INTREQ_0" start="31" size="1" /> + </RegisterGroup> + <RegisterGroup start="0xE000E010" name="SysTick" description="24Bit System Tick Timer for use in RTOS"> + <Register start="0xE000E010" name="SYST_CSR" aka="SysTick_Control_And_Status" description="SysTick Control and Status Register"> + <BitField size="1" name="COUNTFLAG" start="16" description="Counter Flag" /> + <BitField size="1" name="CLKSOURCE" start="2" description="Timer Clock Source" /> + <BitField size="1" name="TICKINT" start="1" description="Tick Interrupt Enable" /> + <BitField size="1" name="ENABLE" start="0" description="Enable SysTick Timer" /> </Register> - <Register name="NVIC_ICER1" description="Interrupt Clear-Enable Register 1" start="0xE000E184"> - <BitField name="DMAC_INTREQ_1" start="0" size="1" /> - <BitField name="DMAC_INTREQ_2" start="1" size="1" /> - <BitField name="DMAC_INTREQ_3" start="2" size="1" /> - <BitField name="DMAC_INTREQ_4" start="3" size="1" /> - <BitField name="EVSYS_INTREQ_0" start="4" size="1" /> - <BitField name="EVSYS_INTREQ_1" start="5" size="1" /> - <BitField name="EVSYS_INTREQ_2" start="6" size="1" /> - <BitField name="EVSYS_INTREQ_3" start="7" size="1" /> - <BitField name="EVSYS_INTREQ_4" start="8" size="1" /> - <BitField name="PAC_INTREQ" start="9" size="1" /> - <BitField name="TAL_INTREQ_0" start="10" size="1" /> - <BitField name="TAL_INTREQ_1" start="11" size="1" /> - <BitField name="RAMECC_INTREQ" start="13" size="1" /> - <BitField name="SERCOM0_INTREQ_0" start="14" size="1" /> - <BitField name="SERCOM0_INTREQ_1" start="15" size="1" /> - <BitField name="SERCOM0_INTREQ_2" start="16" size="1" /> - <BitField name="SERCOM0_INTREQ_3" start="17" size="1" /> - <BitField name="SERCOM1_INTREQ_0" start="18" size="1" /> - <BitField name="SERCOM1_INTREQ_1" start="19" size="1" /> - <BitField name="SERCOM1_INTREQ_2" start="20" size="1" /> - <BitField name="SERCOM1_INTREQ_3" start="21" size="1" /> - <BitField name="SERCOM2_INTREQ_0" start="22" size="1" /> - <BitField name="SERCOM2_INTREQ_1" start="23" size="1" /> - <BitField name="SERCOM2_INTREQ_2" start="24" size="1" /> - <BitField name="SERCOM2_INTREQ_3" start="25" size="1" /> - <BitField name="SERCOM3_INTREQ_0" start="26" size="1" /> - <BitField name="SERCOM3_INTREQ_1" start="27" size="1" /> - <BitField name="SERCOM3_INTREQ_2" start="28" size="1" /> - <BitField name="SERCOM3_INTREQ_3" start="29" size="1" /> - <BitField name="SERCOM4_INTREQ_0" start="30" size="1" /> - <BitField name="SERCOM4_INTREQ_1" start="31" size="1" /> + <Register start="0xE000E014" name="SYST_RVR" aka="SysTick_Reload_Value" description="SysTick Reload Value Register"> + <BitField size="24" name="RELOAD" start="0" description="Value to auto reload SysTick after reaching zero" /> </Register> - <Register name="NVIC_ICER2" description="Interrupt Clear-Enable Register 2" start="0xE000E188"> - <BitField name="SERCOM4_INTREQ_2" start="0" size="1" /> - <BitField name="SERCOM4_INTREQ_3" start="1" size="1" /> - <BitField name="SERCOM5_INTREQ_0" start="2" size="1" /> - <BitField name="SERCOM5_INTREQ_1" start="3" size="1" /> - <BitField name="SERCOM5_INTREQ_2" start="4" size="1" /> - <BitField name="SERCOM5_INTREQ_3" start="5" size="1" /> - <BitField name="CAN0_INTREQ" start="14" size="1" /> - <BitField name="CAN1_INTREQ" start="15" size="1" /> - <BitField name="USB_INTREQ_0" start="16" size="1" /> - <BitField name="USB_INTREQ_1" start="17" size="1" /> - <BitField name="USB_INTREQ_2" start="18" size="1" /> - <BitField name="USB_INTREQ_3" start="19" size="1" /> - <BitField name="TCC0_INTREQ_0" start="21" size="1" /> - <BitField name="TCC0_INTREQ_1" start="22" size="1" /> - <BitField name="TCC0_INTREQ_2" start="23" size="1" /> - <BitField name="TCC0_INTREQ_3" start="24" size="1" /> - <BitField name="TCC0_INTREQ_4" start="25" size="1" /> - <BitField name="TCC0_INTREQ_5" start="26" size="1" /> - <BitField name="TCC0_INTREQ_6" start="27" size="1" /> - <BitField name="TCC1_INTREQ_0" start="28" size="1" /> - <BitField name="TCC1_INTREQ_1" start="29" size="1" /> - <BitField name="TCC1_INTREQ_2" start="30" size="1" /> - <BitField name="TCC1_INTREQ_3" start="31" size="1" /> + <Register start="0xE000E018" name="SYST_CVR" aka="SysTick_Current_Value" description="SysTick Current Value Register"> + <BitField size="24" name="CURRENT" start="0" description="Current value" /> </Register> - <Register name="NVIC_ICER3" description="Interrupt Clear-Enable Register 3" start="0xE000E18C"> - <BitField name="TCC1_INTREQ_4" start="0" size="1" /> - <BitField name="TCC2_INTREQ_0" start="1" size="1" /> - <BitField name="TCC2_INTREQ_1" start="2" size="1" /> - <BitField name="TCC2_INTREQ_2" start="3" size="1" /> - <BitField name="TCC2_INTREQ_3" start="4" size="1" /> - <BitField name="TCC3_INTREQ_0" start="5" size="1" /> - <BitField name="TCC3_INTREQ_1" start="6" size="1" /> - <BitField name="TCC3_INTREQ_2" start="7" size="1" /> - <BitField name="TCC4_INTREQ_0" start="8" size="1" /> - <BitField name="TCC4_INTREQ_1" start="9" size="1" /> - <BitField name="TCC4_INTREQ_2" start="10" size="1" /> - <BitField name="TC0_INTREQ" start="11" size="1" /> - <BitField name="TC1_INTREQ" start="12" size="1" /> - <BitField name="TC2_INTREQ" start="13" size="1" /> - <BitField name="TC3_INTREQ" start="14" size="1" /> - <BitField name="TC4_INTREQ" start="15" size="1" /> - <BitField name="TC5_INTREQ" start="16" size="1" /> - <BitField name="PDEC_INTREQ_0" start="19" size="1" /> - <BitField name="PDEC_INTREQ_1" start="20" size="1" /> - <BitField name="PDEC_INTREQ_2" start="21" size="1" /> - <BitField name="ADC0_INTREQ_0" start="22" size="1" /> - <BitField name="ADC0_INTREQ_1" start="23" size="1" /> - <BitField name="ADC1_INTREQ_0" start="24" size="1" /> - <BitField name="ADC1_INTREQ_1" start="25" size="1" /> - <BitField name="AC_INTREQ" start="26" size="1" /> - <BitField name="DAC_INTREQ_0" start="27" size="1" /> - <BitField name="DAC_INTREQ_1" start="28" size="1" /> - <BitField name="DAC_INTREQ_2" start="29" size="1" /> - <BitField name="DAC_INTREQ_3" start="30" size="1" /> - <BitField name="DAC_INTREQ_4" start="31" size="1" /> + <Register start="0xE000E01C" name="SYST_CALIB" aka="SysTick_Calibration_Value" access="ReadOnly" description="SysTick Calibration Value Register"> + <BitField size="1" name="NOREF" start="31" description="No Ref" /> + <BitField size="1" name="SKEW" start="30" description="Clock Skew" /> + <BitField size="24" name="TENMS" start="0" description="Reload value to use for 10ms timing" /> </Register> - <Register name="NVIC_ICER4" description="Interrupt Clear-Enable Register 4" start="0xE000E190"> - <BitField name="I2S_INTREQ" start="0" size="1" /> - <BitField name="PCC_INTREQ" start="1" size="1" /> - <BitField name="AES_INTREQ" start="2" size="1" /> - <BitField name="TRNG_INTREQ" start="3" size="1" /> - <BitField name="ICM_INTREQ" start="4" size="1" /> - <BitField name="QSPI_INTREQ" start="6" size="1" /> - <BitField name="SDHC0_INTREQ" start="7" size="1" /> + </RegisterGroup> + <RegisterGroup start="0xE000E100" name="NVIC" description="Nested Vectored Interrupt Controller"> + <Register start="0xE000E100" name="NVIC_ISER0" aka="Irq_0_to_31_Set_Enable" description="Interrupt Set-Enable Register 0" /> + <Register start="0xE000E104" name="NVIC_ISER1" aka="Irq_32_to_63_Set_Enable" description="Interrupt Set-Enable Register 1" /> + <Register start="0xE000E108" name="NVIC_ISER2" aka="Irq_64_to_95_Set_Enable" description="Interrupt Set-Enable Register 2" /> + <Register start="0xE000E10C" name="NVIC_ISER3" aka="Irq_96_to_127_Set_Enable" description="Interrupt Set-Enable Register 3" /> + <Register start="0xE000E110" name="NVIC_ISER4" aka="Irq_128_to_159_Set_Enable" description="Interrupt Set-Enable Register 4" /> + <Register start="0xE000E180" name="NVIC_ICER0" aka="Irq_0_to_31_Clear_Enable" description="Interrupt Clear-Enable Register 0" /> + <Register start="0xE000E184" name="NVIC_ICER1" aka="Irq_32_to_63_Clear_Enable" description="Interrupt Clear-Enable Register 1" /> + <Register start="0xE000E188" name="NVIC_ICER2" aka="Irq_64_to_95_Clear_Enable" description="Interrupt Clear-Enable Register 2" /> + <Register start="0xE000E18C" name="NVIC_ICER3" aka="Irq_96_to_127_Clear_Enable" description="Interrupt Clear-Enable Register 3" /> + <Register start="0xE000E190" name="NVIC_ICER4" aka="Irq_128_to_159_Clear_Enable" description="Interrupt Clear-Enable Register 4" /> + <Register start="0xE000E200" name="NVIC_ISPR0" aka="Irq_0_to_31_Set_Pending" description="Interrupt Set-Pending Register 0" /> + <Register start="0xE000E204" name="NVIC_ISPR1" aka="Irq_32_to_63_Set_Pending" description="Interrupt Set-Pending Register 1" /> + <Register start="0xE000E208" name="NVIC_ISPR2" aka="Irq_64_to_95_Set_Pending" description="Interrupt Set-Pending Register 2" /> + <Register start="0xE000E20C" name="NVIC_ISPR3" aka="Irq_96_to_127_Set_Pending" description="Interrupt Set-Pending Register 3" /> + <Register start="0xE000E210" name="NVIC_ISPR4" aka="Irq_128_to_159_Set_Pending" description="Interrupt Set-Pending Register 4" /> + <Register start="0xE000E280" name="NVIC_ICPR0" aka="Irq_0_to_31_Clear_Pending" description="Interrupt Clear-Pending Register 0" /> + <Register start="0xE000E284" name="NVIC_ICPR1" aka="Irq_32_to_63_Clear_Pending" description="Interrupt Clear-Pending Register 1" /> + <Register start="0xE000E288" name="NVIC_ICPR2" aka="Irq_64_to_95_Clear_Pending" description="Interrupt Clear-Pending Register 2" /> + <Register start="0xE000E28C" name="NVIC_ICPR3" aka="Irq_96_to_127_Clear_Pending" description="Interrupt Clear-Pending Register 3" /> + <Register start="0xE000E290" name="NVIC_ICPR4" aka="Irq_128_to_159_Clear_Pending" description="Interrupt Clear-Pending Register 4" /> + <Register start="0xE000E300" name="NVIC_IABR0" aka="Irq_0_to_31_Active_Bit" access="ReadOnly" description="Interrupt Active Bit Register 0" /> + <Register start="0xE000E304" name="NVIC_IABR1" aka="Irq_32_to_63_Active_Bit" access="ReadOnly" description="Interrupt Active Bit Register 1" /> + <Register start="0xE000E308" name="NVIC_IABR2" aka="Irq_64_to_95_Active_Bit" access="ReadOnly" description="Interrupt Active Bit Register 2" /> + <Register start="0xE000E30C" name="NVIC_IABR3" aka="Irq_96_to_127_Active_Bit" access="ReadOnly" description="Interrupt Active Bit Register 3" /> + <Register start="0xE000E310" name="NVIC_IABR4" aka="Irq_128_to_159_Active_Bit" access="ReadOnly" description="Interrupt Active Bit Register 4" /> + <Register start="0xE000E400" name="NVIC_IPR0" aka="Irq_0_to_3_Priority" description="Interrupt Priority Register 0"> + <BitField size="3" name="PRI_0" start="5" /> + <BitField size="3" name="PRI_1" start="13" /> + <BitField size="3" name="PRI_2" start="21" /> + <BitField size="3" name="PRI_3" start="29" /> </Register> - <Register name="NVIC_ISPR0" description="Interrupt Set-Pending Register 0" start="0xE000E200"> - <BitField name="PM_INTREQ" start="0" size="1" /> - <BitField name="MCLK_INTREQ" start="1" size="1" /> - <BitField name="OSCCTRL_INTREQ_0" start="2" size="1" /> - <BitField name="OSCCTRL_INTREQ_1" start="3" size="1" /> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="1" /> - <BitField name="OSCCTRL_INTREQ_3" start="5" size="1" /> - <BitField name="OSCCTRL_INTREQ_4" start="6" size="1" /> - <BitField name="OSC32KCTRL_INTREQ" start="7" size="1" /> - <BitField name="SUPC_INTREQ_0" start="8" size="1" /> - <BitField name="SUPC_INTREQ_1" start="9" size="1" /> - <BitField name="WDT_INTREQ" start="10" size="1" /> - <BitField name="RTC_INTREQ" start="11" size="1" /> - <BitField name="EIC_INTREQ_0" start="12" size="1" /> - <BitField name="EIC_INTREQ_1" start="13" size="1" /> - <BitField name="EIC_INTREQ_2" start="14" size="1" /> - <BitField name="EIC_INTREQ_3" start="15" size="1" /> - <BitField name="EIC_INTREQ_4" start="16" size="1" /> - <BitField name="EIC_INTREQ_5" start="17" size="1" /> - <BitField name="EIC_INTREQ_6" start="18" size="1" /> - <BitField name="EIC_INTREQ_7" start="19" size="1" /> - <BitField name="EIC_INTREQ_8" start="20" size="1" /> - <BitField name="EIC_INTREQ_9" start="21" size="1" /> - <BitField name="EIC_INTREQ_10" start="22" size="1" /> - <BitField name="EIC_INTREQ_11" start="23" size="1" /> - <BitField name="EIC_INTREQ_12" start="24" size="1" /> - <BitField name="EIC_INTREQ_13" start="25" size="1" /> - <BitField name="EIC_INTREQ_14" start="26" size="1" /> - <BitField name="EIC_INTREQ_15" start="27" size="1" /> - <BitField name="FREQM_INTREQ" start="28" size="1" /> - <BitField name="NVMCTRL_INTREQ_0" start="29" size="1" /> - <BitField name="NVMCTRL_INTREQ_1" start="30" size="1" /> - <BitField name="DMAC_INTREQ_0" start="31" size="1" /> + <Register start="0xE000E404" name="NVIC_IPR1" aka="Irq_4_to_7_Priority" description="Interrupt Priority Register 1"> + <BitField size="3" name="PRI_4" start="5" /> + <BitField size="3" name="PRI_5" start="13" /> + <BitField size="3" name="PRI_6" start="21" /> + <BitField size="3" name="PRI_7" start="29" /> </Register> - <Register name="NVIC_ISPR1" description="Interrupt Set-Pending Register 1" start="0xE000E204"> - <BitField name="DMAC_INTREQ_1" start="0" size="1" /> - <BitField name="DMAC_INTREQ_2" start="1" size="1" /> - <BitField name="DMAC_INTREQ_3" start="2" size="1" /> - <BitField name="DMAC_INTREQ_4" start="3" size="1" /> - <BitField name="EVSYS_INTREQ_0" start="4" size="1" /> - <BitField name="EVSYS_INTREQ_1" start="5" size="1" /> - <BitField name="EVSYS_INTREQ_2" start="6" size="1" /> - <BitField name="EVSYS_INTREQ_3" start="7" size="1" /> - <BitField name="EVSYS_INTREQ_4" start="8" size="1" /> - <BitField name="PAC_INTREQ" start="9" size="1" /> - <BitField name="TAL_INTREQ_0" start="10" size="1" /> - <BitField name="TAL_INTREQ_1" start="11" size="1" /> - <BitField name="RAMECC_INTREQ" start="13" size="1" /> - <BitField name="SERCOM0_INTREQ_0" start="14" size="1" /> - <BitField name="SERCOM0_INTREQ_1" start="15" size="1" /> - <BitField name="SERCOM0_INTREQ_2" start="16" size="1" /> - <BitField name="SERCOM0_INTREQ_3" start="17" size="1" /> - <BitField name="SERCOM1_INTREQ_0" start="18" size="1" /> - <BitField name="SERCOM1_INTREQ_1" start="19" size="1" /> - <BitField name="SERCOM1_INTREQ_2" start="20" size="1" /> - <BitField name="SERCOM1_INTREQ_3" start="21" size="1" /> - <BitField name="SERCOM2_INTREQ_0" start="22" size="1" /> - <BitField name="SERCOM2_INTREQ_1" start="23" size="1" /> - <BitField name="SERCOM2_INTREQ_2" start="24" size="1" /> - <BitField name="SERCOM2_INTREQ_3" start="25" size="1" /> - <BitField name="SERCOM3_INTREQ_0" start="26" size="1" /> - <BitField name="SERCOM3_INTREQ_1" start="27" size="1" /> - <BitField name="SERCOM3_INTREQ_2" start="28" size="1" /> - <BitField name="SERCOM3_INTREQ_3" start="29" size="1" /> - <BitField name="SERCOM4_INTREQ_0" start="30" size="1" /> - <BitField name="SERCOM4_INTREQ_1" start="31" size="1" /> + <Register start="0xE000E408" name="NVIC_IPR2" aka="Irq_8_to_11_Priority" description="Interrupt Priority Register 2"> + <BitField size="3" name="PRI_8" start="5" /> + <BitField size="3" name="PRI_9" start="13" /> + <BitField size="3" name="PRI_10" start="21" /> + <BitField size="3" name="PRI_11" start="29" /> </Register> - <Register name="NVIC_ISPR2" description="Interrupt Set-Pending Register 2" start="0xE000E208"> - <BitField name="SERCOM4_INTREQ_2" start="0" size="1" /> - <BitField name="SERCOM4_INTREQ_3" start="1" size="1" /> - <BitField name="SERCOM5_INTREQ_0" start="2" size="1" /> - <BitField name="SERCOM5_INTREQ_1" start="3" size="1" /> - <BitField name="SERCOM5_INTREQ_2" start="4" size="1" /> - <BitField name="SERCOM5_INTREQ_3" start="5" size="1" /> - <BitField name="CAN0_INTREQ" start="14" size="1" /> - <BitField name="CAN1_INTREQ" start="15" size="1" /> - <BitField name="USB_INTREQ_0" start="16" size="1" /> - <BitField name="USB_INTREQ_1" start="17" size="1" /> - <BitField name="USB_INTREQ_2" start="18" size="1" /> - <BitField name="USB_INTREQ_3" start="19" size="1" /> - <BitField name="TCC0_INTREQ_0" start="21" size="1" /> - <BitField name="TCC0_INTREQ_1" start="22" size="1" /> - <BitField name="TCC0_INTREQ_2" start="23" size="1" /> - <BitField name="TCC0_INTREQ_3" start="24" size="1" /> - <BitField name="TCC0_INTREQ_4" start="25" size="1" /> - <BitField name="TCC0_INTREQ_5" start="26" size="1" /> - <BitField name="TCC0_INTREQ_6" start="27" size="1" /> - <BitField name="TCC1_INTREQ_0" start="28" size="1" /> - <BitField name="TCC1_INTREQ_1" start="29" size="1" /> - <BitField name="TCC1_INTREQ_2" start="30" size="1" /> - <BitField name="TCC1_INTREQ_3" start="31" size="1" /> + <Register start="0xE000E40C" name="NVIC_IPR3" aka="Irq_12_to_15_Priority" description="Interrupt Priority Register 3"> + <BitField size="3" name="PRI_12" start="5" /> + <BitField size="3" name="PRI_13" start="13" /> + <BitField size="3" name="PRI_14" start="21" /> + <BitField size="3" name="PRI_15" start="29" /> </Register> - <Register name="NVIC_ISPR3" description="Interrupt Set-Pending Register 3" start="0xE000E20C"> - <BitField name="TCC1_INTREQ_4" start="0" size="1" /> - <BitField name="TCC2_INTREQ_0" start="1" size="1" /> - <BitField name="TCC2_INTREQ_1" start="2" size="1" /> - <BitField name="TCC2_INTREQ_2" start="3" size="1" /> - <BitField name="TCC2_INTREQ_3" start="4" size="1" /> - <BitField name="TCC3_INTREQ_0" start="5" size="1" /> - <BitField name="TCC3_INTREQ_1" start="6" size="1" /> - <BitField name="TCC3_INTREQ_2" start="7" size="1" /> - <BitField name="TCC4_INTREQ_0" start="8" size="1" /> - <BitField name="TCC4_INTREQ_1" start="9" size="1" /> - <BitField name="TCC4_INTREQ_2" start="10" size="1" /> - <BitField name="TC0_INTREQ" start="11" size="1" /> - <BitField name="TC1_INTREQ" start="12" size="1" /> - <BitField name="TC2_INTREQ" start="13" size="1" /> - <BitField name="TC3_INTREQ" start="14" size="1" /> - <BitField name="TC4_INTREQ" start="15" size="1" /> - <BitField name="TC5_INTREQ" start="16" size="1" /> - <BitField name="PDEC_INTREQ_0" start="19" size="1" /> - <BitField name="PDEC_INTREQ_1" start="20" size="1" /> - <BitField name="PDEC_INTREQ_2" start="21" size="1" /> - <BitField name="ADC0_INTREQ_0" start="22" size="1" /> - <BitField name="ADC0_INTREQ_1" start="23" size="1" /> - <BitField name="ADC1_INTREQ_0" start="24" size="1" /> - <BitField name="ADC1_INTREQ_1" start="25" size="1" /> - <BitField name="AC_INTREQ" start="26" size="1" /> - <BitField name="DAC_INTREQ_0" start="27" size="1" /> - <BitField name="DAC_INTREQ_1" start="28" size="1" /> - <BitField name="DAC_INTREQ_2" start="29" size="1" /> - <BitField name="DAC_INTREQ_3" start="30" size="1" /> - <BitField name="DAC_INTREQ_4" start="31" size="1" /> + <Register start="0xE000E410" name="NVIC_IPR4" aka="Irq_16_to_19_Priority" description="Interrupt Priority Register 4"> + <BitField size="3" name="PRI_16" start="5" /> + <BitField size="3" name="PRI_17" start="13" /> + <BitField size="3" name="PRI_18" start="21" /> + <BitField size="3" name="PRI_19" start="29" /> </Register> - <Register name="NVIC_ISPR4" description="Interrupt Set-Pending Register 4" start="0xE000E210"> - <BitField name="I2S_INTREQ" start="0" size="1" /> - <BitField name="PCC_INTREQ" start="1" size="1" /> - <BitField name="AES_INTREQ" start="2" size="1" /> - <BitField name="TRNG_INTREQ" start="3" size="1" /> - <BitField name="ICM_INTREQ" start="4" size="1" /> - <BitField name="QSPI_INTREQ" start="6" size="1" /> - <BitField name="SDHC0_INTREQ" start="7" size="1" /> + <Register start="0xE000E414" name="NVIC_IPR5" aka="Irq_20_to_23_Priority" description="Interrupt Priority Register 5"> + <BitField size="3" name="PRI_20" start="5" /> + <BitField size="3" name="PRI_21" start="13" /> + <BitField size="3" name="PRI_22" start="21" /> + <BitField size="3" name="PRI_23" start="29" /> </Register> - <Register name="NVIC_ICPR0" description="Interrupt Clear-Pending Register 0" start="0xE000E280"> - <BitField name="PM_INTREQ" start="0" size="1" /> - <BitField name="MCLK_INTREQ" start="1" size="1" /> - <BitField name="OSCCTRL_INTREQ_0" start="2" size="1" /> - <BitField name="OSCCTRL_INTREQ_1" start="3" size="1" /> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="1" /> - <BitField name="OSCCTRL_INTREQ_3" start="5" size="1" /> - <BitField name="OSCCTRL_INTREQ_4" start="6" size="1" /> - <BitField name="OSC32KCTRL_INTREQ" start="7" size="1" /> - <BitField name="SUPC_INTREQ_0" start="8" size="1" /> - <BitField name="SUPC_INTREQ_1" start="9" size="1" /> - <BitField name="WDT_INTREQ" start="10" size="1" /> - <BitField name="RTC_INTREQ" start="11" size="1" /> - <BitField name="EIC_INTREQ_0" start="12" size="1" /> - <BitField name="EIC_INTREQ_1" start="13" size="1" /> - <BitField name="EIC_INTREQ_2" start="14" size="1" /> - <BitField name="EIC_INTREQ_3" start="15" size="1" /> - <BitField name="EIC_INTREQ_4" start="16" size="1" /> - <BitField name="EIC_INTREQ_5" start="17" size="1" /> - <BitField name="EIC_INTREQ_6" start="18" size="1" /> - <BitField name="EIC_INTREQ_7" start="19" size="1" /> - <BitField name="EIC_INTREQ_8" start="20" size="1" /> - <BitField name="EIC_INTREQ_9" start="21" size="1" /> - <BitField name="EIC_INTREQ_10" start="22" size="1" /> - <BitField name="EIC_INTREQ_11" start="23" size="1" /> - <BitField name="EIC_INTREQ_12" start="24" size="1" /> - <BitField name="EIC_INTREQ_13" start="25" size="1" /> - <BitField name="EIC_INTREQ_14" start="26" size="1" /> - <BitField name="EIC_INTREQ_15" start="27" size="1" /> - <BitField name="FREQM_INTREQ" start="28" size="1" /> - <BitField name="NVMCTRL_INTREQ_0" start="29" size="1" /> - <BitField name="NVMCTRL_INTREQ_1" start="30" size="1" /> - <BitField name="DMAC_INTREQ_0" start="31" size="1" /> + <Register start="0xE000E418" name="NVIC_IPR6" aka="Irq_24_to_27_Priority" description="Interrupt Priority Register 6"> + <BitField size="3" name="PRI_24" start="5" /> + <BitField size="3" name="PRI_25" start="13" /> + <BitField size="3" name="PRI_26" start="21" /> + <BitField size="3" name="PRI_27" start="29" /> </Register> - <Register name="NVIC_ICPR1" description="Interrupt Clear-Pending Register 1" start="0xE000E284"> - <BitField name="DMAC_INTREQ_1" start="0" size="1" /> - <BitField name="DMAC_INTREQ_2" start="1" size="1" /> - <BitField name="DMAC_INTREQ_3" start="2" size="1" /> - <BitField name="DMAC_INTREQ_4" start="3" size="1" /> - <BitField name="EVSYS_INTREQ_0" start="4" size="1" /> - <BitField name="EVSYS_INTREQ_1" start="5" size="1" /> - <BitField name="EVSYS_INTREQ_2" start="6" size="1" /> - <BitField name="EVSYS_INTREQ_3" start="7" size="1" /> - <BitField name="EVSYS_INTREQ_4" start="8" size="1" /> - <BitField name="PAC_INTREQ" start="9" size="1" /> - <BitField name="TAL_INTREQ_0" start="10" size="1" /> - <BitField name="TAL_INTREQ_1" start="11" size="1" /> - <BitField name="RAMECC_INTREQ" start="13" size="1" /> - <BitField name="SERCOM0_INTREQ_0" start="14" size="1" /> - <BitField name="SERCOM0_INTREQ_1" start="15" size="1" /> - <BitField name="SERCOM0_INTREQ_2" start="16" size="1" /> - <BitField name="SERCOM0_INTREQ_3" start="17" size="1" /> - <BitField name="SERCOM1_INTREQ_0" start="18" size="1" /> - <BitField name="SERCOM1_INTREQ_1" start="19" size="1" /> - <BitField name="SERCOM1_INTREQ_2" start="20" size="1" /> - <BitField name="SERCOM1_INTREQ_3" start="21" size="1" /> - <BitField name="SERCOM2_INTREQ_0" start="22" size="1" /> - <BitField name="SERCOM2_INTREQ_1" start="23" size="1" /> - <BitField name="SERCOM2_INTREQ_2" start="24" size="1" /> - <BitField name="SERCOM2_INTREQ_3" start="25" size="1" /> - <BitField name="SERCOM3_INTREQ_0" start="26" size="1" /> - <BitField name="SERCOM3_INTREQ_1" start="27" size="1" /> - <BitField name="SERCOM3_INTREQ_2" start="28" size="1" /> - <BitField name="SERCOM3_INTREQ_3" start="29" size="1" /> - <BitField name="SERCOM4_INTREQ_0" start="30" size="1" /> - <BitField name="SERCOM4_INTREQ_1" start="31" size="1" /> + <Register start="0xE000E41C" name="NVIC_IPR7" aka="Irq_28_to_31_Priority" description="Interrupt Priority Register 7"> + <BitField size="3" name="PRI_28" start="5" /> + <BitField size="3" name="PRI_29" start="13" /> + <BitField size="3" name="PRI_30" start="21" /> + <BitField size="3" name="PRI_31" start="29" /> </Register> - <Register name="NVIC_ICPR2" description="Interrupt Clear-Pending Register 2" start="0xE000E288"> - <BitField name="SERCOM4_INTREQ_2" start="0" size="1" /> - <BitField name="SERCOM4_INTREQ_3" start="1" size="1" /> - <BitField name="SERCOM5_INTREQ_0" start="2" size="1" /> - <BitField name="SERCOM5_INTREQ_1" start="3" size="1" /> - <BitField name="SERCOM5_INTREQ_2" start="4" size="1" /> - <BitField name="SERCOM5_INTREQ_3" start="5" size="1" /> - <BitField name="CAN0_INTREQ" start="14" size="1" /> - <BitField name="CAN1_INTREQ" start="15" size="1" /> - <BitField name="USB_INTREQ_0" start="16" size="1" /> - <BitField name="USB_INTREQ_1" start="17" size="1" /> - <BitField name="USB_INTREQ_2" start="18" size="1" /> - <BitField name="USB_INTREQ_3" start="19" size="1" /> - <BitField name="TCC0_INTREQ_0" start="21" size="1" /> - <BitField name="TCC0_INTREQ_1" start="22" size="1" /> - <BitField name="TCC0_INTREQ_2" start="23" size="1" /> - <BitField name="TCC0_INTREQ_3" start="24" size="1" /> - <BitField name="TCC0_INTREQ_4" start="25" size="1" /> - <BitField name="TCC0_INTREQ_5" start="26" size="1" /> - <BitField name="TCC0_INTREQ_6" start="27" size="1" /> - <BitField name="TCC1_INTREQ_0" start="28" size="1" /> - <BitField name="TCC1_INTREQ_1" start="29" size="1" /> - <BitField name="TCC1_INTREQ_2" start="30" size="1" /> - <BitField name="TCC1_INTREQ_3" start="31" size="1" /> + <Register start="0xE000E420" name="NVIC_IPR8" aka="Irq_32_to_35_Priority" description="Interrupt Priority Register 8"> + <BitField size="3" name="PRI_32" start="5" /> + <BitField size="3" name="PRI_33" start="13" /> + <BitField size="3" name="PRI_34" start="21" /> + <BitField size="3" name="PRI_35" start="29" /> </Register> - <Register name="NVIC_ICPR3" description="Interrupt Clear-Pending Register 3" start="0xE000E28C"> - <BitField name="TCC1_INTREQ_4" start="0" size="1" /> - <BitField name="TCC2_INTREQ_0" start="1" size="1" /> - <BitField name="TCC2_INTREQ_1" start="2" size="1" /> - <BitField name="TCC2_INTREQ_2" start="3" size="1" /> - <BitField name="TCC2_INTREQ_3" start="4" size="1" /> - <BitField name="TCC3_INTREQ_0" start="5" size="1" /> - <BitField name="TCC3_INTREQ_1" start="6" size="1" /> - <BitField name="TCC3_INTREQ_2" start="7" size="1" /> - <BitField name="TCC4_INTREQ_0" start="8" size="1" /> - <BitField name="TCC4_INTREQ_1" start="9" size="1" /> - <BitField name="TCC4_INTREQ_2" start="10" size="1" /> - <BitField name="TC0_INTREQ" start="11" size="1" /> - <BitField name="TC1_INTREQ" start="12" size="1" /> - <BitField name="TC2_INTREQ" start="13" size="1" /> - <BitField name="TC3_INTREQ" start="14" size="1" /> - <BitField name="TC4_INTREQ" start="15" size="1" /> - <BitField name="TC5_INTREQ" start="16" size="1" /> - <BitField name="PDEC_INTREQ_0" start="19" size="1" /> - <BitField name="PDEC_INTREQ_1" start="20" size="1" /> - <BitField name="PDEC_INTREQ_2" start="21" size="1" /> - <BitField name="ADC0_INTREQ_0" start="22" size="1" /> - <BitField name="ADC0_INTREQ_1" start="23" size="1" /> - <BitField name="ADC1_INTREQ_0" start="24" size="1" /> - <BitField name="ADC1_INTREQ_1" start="25" size="1" /> - <BitField name="AC_INTREQ" start="26" size="1" /> - <BitField name="DAC_INTREQ_0" start="27" size="1" /> - <BitField name="DAC_INTREQ_1" start="28" size="1" /> - <BitField name="DAC_INTREQ_2" start="29" size="1" /> - <BitField name="DAC_INTREQ_3" start="30" size="1" /> - <BitField name="DAC_INTREQ_4" start="31" size="1" /> + <Register start="0xE000E424" name="NVIC_IPR9" aka="Irq_36_to_39_Priority" description="Interrupt Priority Register 9"> + <BitField size="3" name="PRI_36" start="5" /> + <BitField size="3" name="PRI_37" start="13" /> + <BitField size="3" name="PRI_38" start="21" /> + <BitField size="3" name="PRI_39" start="29" /> </Register> - <Register name="NVIC_ICPR4" description="Interrupt Clear-Pending Register 4" start="0xE000E290"> - <BitField name="I2S_INTREQ" start="0" size="1" /> - <BitField name="PCC_INTREQ" start="1" size="1" /> - <BitField name="AES_INTREQ" start="2" size="1" /> - <BitField name="TRNG_INTREQ" start="3" size="1" /> - <BitField name="ICM_INTREQ" start="4" size="1" /> - <BitField name="QSPI_INTREQ" start="6" size="1" /> - <BitField name="SDHC0_INTREQ" start="7" size="1" /> + <Register start="0xE000E428" name="NVIC_IPR10" aka="Irq_40_to_43_Priority" description="Interrupt Priority Register 10"> + <BitField size="3" name="PRI_40" start="5" /> + <BitField size="3" name="PRI_41" start="13" /> + <BitField size="3" name="PRI_42" start="21" /> + <BitField size="3" name="PRI_43" start="29" /> </Register> - <Register name="NVIC_IABR0" description="Interrupt Active Bit Register 0" start="0xE000E300" access="ReadOnly"> - <BitField name="PM_INTREQ" start="0" size="1" /> - <BitField name="MCLK_INTREQ" start="1" size="1" /> - <BitField name="OSCCTRL_INTREQ_0" start="2" size="1" /> - <BitField name="OSCCTRL_INTREQ_1" start="3" size="1" /> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="1" /> - <BitField name="OSCCTRL_INTREQ_3" start="5" size="1" /> - <BitField name="OSCCTRL_INTREQ_4" start="6" size="1" /> - <BitField name="OSC32KCTRL_INTREQ" start="7" size="1" /> - <BitField name="SUPC_INTREQ_0" start="8" size="1" /> - <BitField name="SUPC_INTREQ_1" start="9" size="1" /> - <BitField name="WDT_INTREQ" start="10" size="1" /> - <BitField name="RTC_INTREQ" start="11" size="1" /> - <BitField name="EIC_INTREQ_0" start="12" size="1" /> - <BitField name="EIC_INTREQ_1" start="13" size="1" /> - <BitField name="EIC_INTREQ_2" start="14" size="1" /> - <BitField name="EIC_INTREQ_3" start="15" size="1" /> - <BitField name="EIC_INTREQ_4" start="16" size="1" /> - <BitField name="EIC_INTREQ_5" start="17" size="1" /> - <BitField name="EIC_INTREQ_6" start="18" size="1" /> - <BitField name="EIC_INTREQ_7" start="19" size="1" /> - <BitField name="EIC_INTREQ_8" start="20" size="1" /> - <BitField name="EIC_INTREQ_9" start="21" size="1" /> - <BitField name="EIC_INTREQ_10" start="22" size="1" /> - <BitField name="EIC_INTREQ_11" start="23" size="1" /> - <BitField name="EIC_INTREQ_12" start="24" size="1" /> - <BitField name="EIC_INTREQ_13" start="25" size="1" /> - <BitField name="EIC_INTREQ_14" start="26" size="1" /> - <BitField name="EIC_INTREQ_15" start="27" size="1" /> - <BitField name="FREQM_INTREQ" start="28" size="1" /> - <BitField name="NVMCTRL_INTREQ_0" start="29" size="1" /> - <BitField name="NVMCTRL_INTREQ_1" start="30" size="1" /> - <BitField name="DMAC_INTREQ_0" start="31" size="1" /> + <Register start="0xE000E42C" name="NVIC_IPR11" aka="Irq_44_to_47_Priority" description="Interrupt Priority Register 11"> + <BitField size="3" name="PRI_44" start="5" /> + <BitField size="3" name="PRI_45" start="13" /> + <BitField size="3" name="PRI_46" start="21" /> + <BitField size="3" name="PRI_47" start="29" /> </Register> - <Register name="NVIC_IABR1" description="Interrupt Active Bit Register 1" start="0xE000E304" access="ReadOnly"> - <BitField name="DMAC_INTREQ_1" start="0" size="1" /> - <BitField name="DMAC_INTREQ_2" start="1" size="1" /> - <BitField name="DMAC_INTREQ_3" start="2" size="1" /> - <BitField name="DMAC_INTREQ_4" start="3" size="1" /> - <BitField name="EVSYS_INTREQ_0" start="4" size="1" /> - <BitField name="EVSYS_INTREQ_1" start="5" size="1" /> - <BitField name="EVSYS_INTREQ_2" start="6" size="1" /> - <BitField name="EVSYS_INTREQ_3" start="7" size="1" /> - <BitField name="EVSYS_INTREQ_4" start="8" size="1" /> - <BitField name="PAC_INTREQ" start="9" size="1" /> - <BitField name="TAL_INTREQ_0" start="10" size="1" /> - <BitField name="TAL_INTREQ_1" start="11" size="1" /> - <BitField name="RAMECC_INTREQ" start="13" size="1" /> - <BitField name="SERCOM0_INTREQ_0" start="14" size="1" /> - <BitField name="SERCOM0_INTREQ_1" start="15" size="1" /> - <BitField name="SERCOM0_INTREQ_2" start="16" size="1" /> - <BitField name="SERCOM0_INTREQ_3" start="17" size="1" /> - <BitField name="SERCOM1_INTREQ_0" start="18" size="1" /> - <BitField name="SERCOM1_INTREQ_1" start="19" size="1" /> - <BitField name="SERCOM1_INTREQ_2" start="20" size="1" /> - <BitField name="SERCOM1_INTREQ_3" start="21" size="1" /> - <BitField name="SERCOM2_INTREQ_0" start="22" size="1" /> - <BitField name="SERCOM2_INTREQ_1" start="23" size="1" /> - <BitField name="SERCOM2_INTREQ_2" start="24" size="1" /> - <BitField name="SERCOM2_INTREQ_3" start="25" size="1" /> - <BitField name="SERCOM3_INTREQ_0" start="26" size="1" /> - <BitField name="SERCOM3_INTREQ_1" start="27" size="1" /> - <BitField name="SERCOM3_INTREQ_2" start="28" size="1" /> - <BitField name="SERCOM3_INTREQ_3" start="29" size="1" /> - <BitField name="SERCOM4_INTREQ_0" start="30" size="1" /> - <BitField name="SERCOM4_INTREQ_1" start="31" size="1" /> + <Register start="0xE000E430" name="NVIC_IPR12" aka="Irq_48_to_51_Priority" description="Interrupt Priority Register 12"> + <BitField size="3" name="PRI_48" start="5" /> + <BitField size="3" name="PRI_49" start="13" /> + <BitField size="3" name="PRI_50" start="21" /> + <BitField size="3" name="PRI_51" start="29" /> </Register> - <Register name="NVIC_IABR2" description="Interrupt Active Bit Register 2" start="0xE000E308" access="ReadOnly"> - <BitField name="SERCOM4_INTREQ_2" start="0" size="1" /> - <BitField name="SERCOM4_INTREQ_3" start="1" size="1" /> - <BitField name="SERCOM5_INTREQ_0" start="2" size="1" /> - <BitField name="SERCOM5_INTREQ_1" start="3" size="1" /> - <BitField name="SERCOM5_INTREQ_2" start="4" size="1" /> - <BitField name="SERCOM5_INTREQ_3" start="5" size="1" /> - <BitField name="CAN0_INTREQ" start="14" size="1" /> - <BitField name="CAN1_INTREQ" start="15" size="1" /> - <BitField name="USB_INTREQ_0" start="16" size="1" /> - <BitField name="USB_INTREQ_1" start="17" size="1" /> - <BitField name="USB_INTREQ_2" start="18" size="1" /> - <BitField name="USB_INTREQ_3" start="19" size="1" /> - <BitField name="TCC0_INTREQ_0" start="21" size="1" /> - <BitField name="TCC0_INTREQ_1" start="22" size="1" /> - <BitField name="TCC0_INTREQ_2" start="23" size="1" /> - <BitField name="TCC0_INTREQ_3" start="24" size="1" /> - <BitField name="TCC0_INTREQ_4" start="25" size="1" /> - <BitField name="TCC0_INTREQ_5" start="26" size="1" /> - <BitField name="TCC0_INTREQ_6" start="27" size="1" /> - <BitField name="TCC1_INTREQ_0" start="28" size="1" /> - <BitField name="TCC1_INTREQ_1" start="29" size="1" /> - <BitField name="TCC1_INTREQ_2" start="30" size="1" /> - <BitField name="TCC1_INTREQ_3" start="31" size="1" /> + <Register start="0xE000E434" name="NVIC_IPR13" aka="Irq_52_to_55_Priority" description="Interrupt Priority Register 13"> + <BitField size="3" name="PRI_52" start="5" /> + <BitField size="3" name="PRI_53" start="13" /> + <BitField size="3" name="PRI_54" start="21" /> + <BitField size="3" name="PRI_55" start="29" /> </Register> - <Register name="NVIC_IABR3" description="Interrupt Active Bit Register 3" start="0xE000E30C" access="ReadOnly"> - <BitField name="TCC1_INTREQ_4" start="0" size="1" /> - <BitField name="TCC2_INTREQ_0" start="1" size="1" /> - <BitField name="TCC2_INTREQ_1" start="2" size="1" /> - <BitField name="TCC2_INTREQ_2" start="3" size="1" /> - <BitField name="TCC2_INTREQ_3" start="4" size="1" /> - <BitField name="TCC3_INTREQ_0" start="5" size="1" /> - <BitField name="TCC3_INTREQ_1" start="6" size="1" /> - <BitField name="TCC3_INTREQ_2" start="7" size="1" /> - <BitField name="TCC4_INTREQ_0" start="8" size="1" /> - <BitField name="TCC4_INTREQ_1" start="9" size="1" /> - <BitField name="TCC4_INTREQ_2" start="10" size="1" /> - <BitField name="TC0_INTREQ" start="11" size="1" /> - <BitField name="TC1_INTREQ" start="12" size="1" /> - <BitField name="TC2_INTREQ" start="13" size="1" /> - <BitField name="TC3_INTREQ" start="14" size="1" /> - <BitField name="TC4_INTREQ" start="15" size="1" /> - <BitField name="TC5_INTREQ" start="16" size="1" /> - <BitField name="PDEC_INTREQ_0" start="19" size="1" /> - <BitField name="PDEC_INTREQ_1" start="20" size="1" /> - <BitField name="PDEC_INTREQ_2" start="21" size="1" /> - <BitField name="ADC0_INTREQ_0" start="22" size="1" /> - <BitField name="ADC0_INTREQ_1" start="23" size="1" /> - <BitField name="ADC1_INTREQ_0" start="24" size="1" /> - <BitField name="ADC1_INTREQ_1" start="25" size="1" /> - <BitField name="AC_INTREQ" start="26" size="1" /> - <BitField name="DAC_INTREQ_0" start="27" size="1" /> - <BitField name="DAC_INTREQ_1" start="28" size="1" /> - <BitField name="DAC_INTREQ_2" start="29" size="1" /> - <BitField name="DAC_INTREQ_3" start="30" size="1" /> - <BitField name="DAC_INTREQ_4" start="31" size="1" /> + <Register start="0xE000E438" name="NVIC_IPR14" aka="Irq_56_to_59_Priority" description="Interrupt Priority Register 14"> + <BitField size="3" name="PRI_56" start="5" /> + <BitField size="3" name="PRI_57" start="13" /> + <BitField size="3" name="PRI_58" start="21" /> + <BitField size="3" name="PRI_59" start="29" /> </Register> - <Register name="NVIC_IABR4" description="Interrupt Active Bit Register 4" start="0xE000E310" access="ReadOnly"> - <BitField name="I2S_INTREQ" start="0" size="1" /> - <BitField name="PCC_INTREQ" start="1" size="1" /> - <BitField name="AES_INTREQ" start="2" size="1" /> - <BitField name="TRNG_INTREQ" start="3" size="1" /> - <BitField name="ICM_INTREQ" start="4" size="1" /> - <BitField name="QSPI_INTREQ" start="6" size="1" /> - <BitField name="SDHC0_INTREQ" start="7" size="1" /> + <Register start="0xE000E43C" name="NVIC_IPR15" aka="Irq_60_to_63_Priority" description="Interrupt Priority Register 15"> + <BitField size="3" name="PRI_60" start="5" /> + <BitField size="3" name="PRI_61" start="13" /> + <BitField size="3" name="PRI_62" start="21" /> + <BitField size="3" name="PRI_63" start="29" /> </Register> - <Register name="NVIC_IPR0" description="Interrupt Priority Register 0" start="0xE000E400"> - <BitField name="PM_INTREQ" start="4" size="4" /> - <BitField name="MCLK_INTREQ" start="12" size="4" /> - <BitField name="OSCCTRL_INTREQ_0" start="20" size="4" /> - <BitField name="OSCCTRL_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E440" name="NVIC_IPR16" aka="Irq_64_to_67_Priority" description="Interrupt Priority Register 16"> + <BitField size="3" name="PRI_64" start="5" /> + <BitField size="3" name="PRI_65" start="13" /> + <BitField size="3" name="PRI_66" start="21" /> + <BitField size="3" name="PRI_67" start="29" /> </Register> - <Register name="NVIC_IPR1" description="Interrupt Priority Register 1" start="0xE000E404"> - <BitField name="OSCCTRL_INTREQ_2" start="4" size="4" /> - <BitField name="OSCCTRL_INTREQ_3" start="12" size="4" /> - <BitField name="OSCCTRL_INTREQ_4" start="20" size="4" /> - <BitField name="OSC32KCTRL_INTREQ" start="28" size="4" /> + <Register start="0xE000E444" name="NVIC_IPR17" aka="Irq_68_to_71_Priority" description="Interrupt Priority Register 17"> + <BitField size="3" name="PRI_68" start="5" /> + <BitField size="3" name="PRI_69" start="13" /> + <BitField size="3" name="PRI_70" start="21" /> + <BitField size="3" name="PRI_71" start="29" /> </Register> - <Register name="NVIC_IPR2" description="Interrupt Priority Register 2" start="0xE000E408"> - <BitField name="SUPC_INTREQ_0" start="4" size="4" /> - <BitField name="SUPC_INTREQ_1" start="12" size="4" /> - <BitField name="WDT_INTREQ" start="20" size="4" /> - <BitField name="RTC_INTREQ" start="28" size="4" /> + <Register start="0xE000E448" name="NVIC_IPR18" aka="Irq_72_to_75_Priority" description="Interrupt Priority Register 18"> + <BitField size="3" name="PRI_72" start="5" /> + <BitField size="3" name="PRI_73" start="13" /> + <BitField size="3" name="PRI_74" start="21" /> + <BitField size="3" name="PRI_75" start="29" /> </Register> - <Register name="NVIC_IPR3" description="Interrupt Priority Register 3" start="0xE000E40C"> - <BitField name="EIC_INTREQ_0" start="4" size="4" /> - <BitField name="EIC_INTREQ_1" start="12" size="4" /> - <BitField name="EIC_INTREQ_2" start="20" size="4" /> - <BitField name="EIC_INTREQ_3" start="28" size="4" /> + <Register start="0xE000E44C" name="NVIC_IPR19" aka="Irq_76_to_79_Priority" description="Interrupt Priority Register 19"> + <BitField size="3" name="PRI_76" start="5" /> + <BitField size="3" name="PRI_77" start="13" /> + <BitField size="3" name="PRI_78" start="21" /> + <BitField size="3" name="PRI_79" start="29" /> </Register> - <Register name="NVIC_IPR4" description="Interrupt Priority Register 4" start="0xE000E410"> - <BitField name="EIC_INTREQ_4" start="4" size="4" /> - <BitField name="EIC_INTREQ_5" start="12" size="4" /> - <BitField name="EIC_INTREQ_6" start="20" size="4" /> - <BitField name="EIC_INTREQ_7" start="28" size="4" /> + <Register start="0xE000E450" name="NVIC_IPR20" aka="Irq_80_to_83_Priority" description="Interrupt Priority Register 20"> + <BitField size="3" name="PRI_80" start="5" /> + <BitField size="3" name="PRI_81" start="13" /> + <BitField size="3" name="PRI_82" start="21" /> + <BitField size="3" name="PRI_83" start="29" /> </Register> - <Register name="NVIC_IPR5" description="Interrupt Priority Register 5" start="0xE000E414"> - <BitField name="EIC_INTREQ_8" start="4" size="4" /> - <BitField name="EIC_INTREQ_9" start="12" size="4" /> - <BitField name="EIC_INTREQ_10" start="20" size="4" /> - <BitField name="EIC_INTREQ_11" start="28" size="4" /> + <Register start="0xE000E454" name="NVIC_IPR21" aka="Irq_84_to_87_Priority" description="Interrupt Priority Register 21"> + <BitField size="3" name="PRI_84" start="5" /> + <BitField size="3" name="PRI_85" start="13" /> + <BitField size="3" name="PRI_86" start="21" /> + <BitField size="3" name="PRI_87" start="29" /> </Register> - <Register name="NVIC_IPR6" description="Interrupt Priority Register 6" start="0xE000E418"> - <BitField name="EIC_INTREQ_12" start="4" size="4" /> - <BitField name="EIC_INTREQ_13" start="12" size="4" /> - <BitField name="EIC_INTREQ_14" start="20" size="4" /> - <BitField name="EIC_INTREQ_15" start="28" size="4" /> + <Register start="0xE000E458" name="NVIC_IPR22" aka="Irq_88_to_91_Priority" description="Interrupt Priority Register 22"> + <BitField size="3" name="PRI_88" start="5" /> + <BitField size="3" name="PRI_89" start="13" /> + <BitField size="3" name="PRI_90" start="21" /> + <BitField size="3" name="PRI_91" start="29" /> </Register> - <Register name="NVIC_IPR7" description="Interrupt Priority Register 7" start="0xE000E41C"> - <BitField name="FREQM_INTREQ" start="4" size="4" /> - <BitField name="NVMCTRL_INTREQ_0" start="12" size="4" /> - <BitField name="NVMCTRL_INTREQ_1" start="20" size="4" /> - <BitField name="DMAC_INTREQ_0" start="28" size="4" /> + <Register start="0xE000E45C" name="NVIC_IPR23" aka="Irq_92_to_95_Priority" description="Interrupt Priority Register 23"> + <BitField size="3" name="PRI_92" start="5" /> + <BitField size="3" name="PRI_93" start="13" /> + <BitField size="3" name="PRI_94" start="21" /> + <BitField size="3" name="PRI_95" start="29" /> </Register> - <Register name="NVIC_IPR8" description="Interrupt Priority Register 8" start="0xE000E420"> - <BitField name="DMAC_INTREQ_1" start="4" size="4" /> - <BitField name="DMAC_INTREQ_2" start="12" size="4" /> - <BitField name="DMAC_INTREQ_3" start="20" size="4" /> - <BitField name="DMAC_INTREQ_4" start="28" size="4" /> + <Register start="0xE000E460" name="NVIC_IPR24" aka="Irq_96_to_99_Priority" description="Interrupt Priority Register 24"> + <BitField size="3" name="PRI_96" start="5" /> + <BitField size="3" name="PRI_97" start="13" /> + <BitField size="3" name="PRI_98" start="21" /> + <BitField size="3" name="PRI_99" start="29" /> </Register> - <Register name="NVIC_IPR9" description="Interrupt Priority Register 9" start="0xE000E424"> - <BitField name="EVSYS_INTREQ_0" start="4" size="4" /> - <BitField name="EVSYS_INTREQ_1" start="12" size="4" /> - <BitField name="EVSYS_INTREQ_2" start="20" size="4" /> - <BitField name="EVSYS_INTREQ_3" start="28" size="4" /> + <Register start="0xE000E464" name="NVIC_IPR25" aka="Irq_100_to_103_Priority" description="Interrupt Priority Register 25"> + <BitField size="3" name="PRI_100" start="5" /> + <BitField size="3" name="PRI_101" start="13" /> + <BitField size="3" name="PRI_102" start="21" /> + <BitField size="3" name="PRI_103" start="29" /> </Register> - <Register name="NVIC_IPR10" description="Interrupt Priority Register 10" start="0xE000E428"> - <BitField name="EVSYS_INTREQ_4" start="4" size="4" /> - <BitField name="PAC_INTREQ" start="12" size="4" /> - <BitField name="TAL_INTREQ_0" start="20" size="4" /> - <BitField name="TAL_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E468" name="NVIC_IPR26" aka="Irq_104_to_107_Priority" description="Interrupt Priority Register 26"> + <BitField size="3" name="PRI_104" start="5" /> + <BitField size="3" name="PRI_105" start="13" /> + <BitField size="3" name="PRI_106" start="21" /> + <BitField size="3" name="PRI_107" start="29" /> </Register> - <Register name="NVIC_IPR11" description="Interrupt Priority Register 11" start="0xE000E42C"> - <BitField name="RAMECC_INTREQ" start="12" size="4" /> - <BitField name="SERCOM0_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM0_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E46C" name="NVIC_IPR27" aka="Irq_108_to_111_Priority" description="Interrupt Priority Register 27"> + <BitField size="3" name="PRI_108" start="5" /> + <BitField size="3" name="PRI_109" start="13" /> + <BitField size="3" name="PRI_110" start="21" /> + <BitField size="3" name="PRI_111" start="29" /> </Register> - <Register name="NVIC_IPR12" description="Interrupt Priority Register 12" start="0xE000E430"> - <BitField name="SERCOM0_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM0_INTREQ_3" start="12" size="4" /> - <BitField name="SERCOM1_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM1_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E470" name="NVIC_IPR28" aka="Irq_112_to_115_Priority" description="Interrupt Priority Register 28"> + <BitField size="3" name="PRI_112" start="5" /> + <BitField size="3" name="PRI_113" start="13" /> + <BitField size="3" name="PRI_114" start="21" /> + <BitField size="3" name="PRI_115" start="29" /> </Register> - <Register name="NVIC_IPR13" description="Interrupt Priority Register 13" start="0xE000E434"> - <BitField name="SERCOM1_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM1_INTREQ_3" start="12" size="4" /> - <BitField name="SERCOM2_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM2_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E474" name="NVIC_IPR29" aka="Irq_116_to_119_Priority" description="Interrupt Priority Register 29"> + <BitField size="3" name="PRI_116" start="5" /> + <BitField size="3" name="PRI_117" start="13" /> + <BitField size="3" name="PRI_118" start="21" /> + <BitField size="3" name="PRI_119" start="29" /> </Register> - <Register name="NVIC_IPR14" description="Interrupt Priority Register 14" start="0xE000E438"> - <BitField name="SERCOM2_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM2_INTREQ_3" start="12" size="4" /> - <BitField name="SERCOM3_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM3_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E478" name="NVIC_IPR30" aka="Irq_120_to_123_Priority" description="Interrupt Priority Register 30"> + <BitField size="3" name="PRI_120" start="5" /> + <BitField size="3" name="PRI_121" start="13" /> + <BitField size="3" name="PRI_122" start="21" /> + <BitField size="3" name="PRI_123" start="29" /> </Register> - <Register name="NVIC_IPR15" description="Interrupt Priority Register 15" start="0xE000E43C"> - <BitField name="SERCOM3_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM3_INTREQ_3" start="12" size="4" /> - <BitField name="SERCOM4_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM4_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E47C" name="NVIC_IPR31" aka="Irq_124_to_127_Priority" description="Interrupt Priority Register 31"> + <BitField size="3" name="PRI_124" start="5" /> + <BitField size="3" name="PRI_125" start="13" /> + <BitField size="3" name="PRI_126" start="21" /> + <BitField size="3" name="PRI_127" start="29" /> </Register> - <Register name="NVIC_IPR16" description="Interrupt Priority Register 16" start="0xE000E440"> - <BitField name="SERCOM4_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM4_INTREQ_3" start="12" size="4" /> - <BitField name="SERCOM5_INTREQ_0" start="20" size="4" /> - <BitField name="SERCOM5_INTREQ_1" start="28" size="4" /> + <Register start="0xE000E480" name="NVIC_IPR32" aka="Irq_128_to_131_Priority" description="Interrupt Priority Register 32"> + <BitField size="3" name="PRI_128" start="5" /> + <BitField size="3" name="PRI_129" start="13" /> + <BitField size="3" name="PRI_130" start="21" /> + <BitField size="3" name="PRI_131" start="29" /> </Register> - <Register name="NVIC_IPR17" description="Interrupt Priority Register 17" start="0xE000E444"> - <BitField name="SERCOM5_INTREQ_2" start="4" size="4" /> - <BitField name="SERCOM5_INTREQ_3" start="12" size="4" /> + <Register start="0xE000E484" name="NVIC_IPR33" aka="Irq_132_to_135_Priority" description="Interrupt Priority Register 33"> + <BitField size="3" name="PRI_132" start="5" /> + <BitField size="3" name="PRI_133" start="13" /> + <BitField size="3" name="PRI_134" start="21" /> + <BitField size="3" name="PRI_135" start="29" /> </Register> - <Register name="NVIC_IPR18" description="Interrupt Priority Register 18" start="0xE000E448" /> - <Register name="NVIC_IPR19" description="Interrupt Priority Register 19" start="0xE000E44C"> - <BitField name="CAN0_INTREQ" start="20" size="4" /> - <BitField name="CAN1_INTREQ" start="28" size="4" /> + </RegisterGroup> + <RegisterGroup start="0xE000ED00" name="SCB"> + <Register start="0xE000ED04" name="ICSR" aka="Interrupt_Control_State" description="Interrupt Control and State Register"> + <BitField size="1" name="NMIPENDSET" start="31" description="NMI set-pending bit" /> + <BitField size="1" name="PENDSVSET" start="28" description="PendSV Set-Pending Bit" /> + <BitField size="1" name="PENDSVCLR" start="27" description="PendSV Clear-Pending Bit" /> + <BitField size="1" name="PENDSTSET" start="26" description="SysTick Exception Set-Pending Bit" /> + <BitField size="1" name="PENDSTCLR" start="25" description="SysTick Exception Clear-Pending Bit" /> + <BitField size="1" name="ISRPREEMPT" start="23" /> + <BitField size="1" name="ISRPENDING" start="22" description="Interrupt Pending Flag" /> + <BitField size="9" name="VECTPENDING" start="12" description="Vector Pending" /> + <BitField size="1" name="RETTOBASE" start="11" description="Return to Base" /> + <BitField size="9" name="VECTACTIVE" start="0" description="Active Exception Number" /> </Register> - <Register name="NVIC_IPR20" description="Interrupt Priority Register 20" start="0xE000E450"> - <BitField name="USB_INTREQ_0" start="4" size="4" /> - <BitField name="USB_INTREQ_1" start="12" size="4" /> - <BitField name="USB_INTREQ_2" start="20" size="4" /> - <BitField name="USB_INTREQ_3" start="28" size="4" /> + <Register start="0xE000ED08" name="VTOR" aka="Vector_Table_Offset" description="Vector Table Offset Register"> + <BitField size="1" name="TBLBASE" start="29" /> + <BitField size="25" name="TBLOFF" start="7" /> </Register> - <Register name="NVIC_IPR21" description="Interrupt Priority Register 21" start="0xE000E454"> - <BitField name="TCC0_INTREQ_0" start="12" size="4" /> - <BitField name="TCC0_INTREQ_1" start="20" size="4" /> - <BitField name="TCC0_INTREQ_2" start="28" size="4" /> + <Register start="0xE000ED0C" name="AIRCR" aka="Application_Interrupt_and_Reset_Control" description="Application Interrupt and Reset Control Register"> + <BitField size="16" name="VECTKEY" start="16" description="Register Key" /> + <BitField size="1" name="ENDIANESS" start="15" description="Data Endianness Bit" /> + <BitField size="3" name="PRIGROUP" start="8" description="Interrupt Priority Grouping Field" /> + <BitField size="1" name="SYSRESETREQ" start="2" description="System Reset Request" /> + <BitField size="1" name="VECTCLRACTIVE" start="1" /> + <BitField size="1" name="VECTRESET" start="0" /> </Register> - <Register name="NVIC_IPR22" description="Interrupt Priority Register 22" start="0xE000E458"> - <BitField name="TCC0_INTREQ_3" start="4" size="4" /> - <BitField name="TCC0_INTREQ_4" start="12" size="4" /> - <BitField name="TCC0_INTREQ_5" start="20" size="4" /> - <BitField name="TCC0_INTREQ_6" start="28" size="4" /> + <Register start="0xE000ED10" name="SCR" aka="System_Control" description="System Control Register"> + <BitField size="1" name="SEVONPEND" start="4" description="Send Event on Pending" /> + <BitField size="1" name="SLEEPDEEP" start="2" description="Sleep or Deep Sleep" /> + <BitField size="1" name="SLEEPONEXIT" start="1" description="Sleep on Exit" /> </Register> - <Register name="NVIC_IPR23" description="Interrupt Priority Register 23" start="0xE000E45C"> - <BitField name="TCC1_INTREQ_0" start="4" size="4" /> - <BitField name="TCC1_INTREQ_1" start="12" size="4" /> - <BitField name="TCC1_INTREQ_2" start="20" size="4" /> - <BitField name="TCC1_INTREQ_3" start="28" size="4" /> + <Register start="0xE000ED14" name="CCR" aka="Configuration_Control" description="Configuration and Control Register"> + <BitField size="1" name="STKALIGN" start="9" description="Stack Alignment" /> + <BitField size="1" name="BFHFNMIGN" start="8" description="Bus Fault Hard Fault and NMI Ignore" /> + <BitField size="1" name="DIV_0_TRP" start="4" description="Divide by Zero Trap Enable" /> + <BitField size="1" name="UNALIGN_TRP" start="3" description="Unaligned Access Trap Enable" /> + <BitField size="1" name="USERSETMPEND" start="1" description="User Set Pending Enable" /> + <BitField size="1" name="NONBASETHRDENA" start="0" description="Non Base Thread Mode Enable" /> </Register> - <Register name="NVIC_IPR24" description="Interrupt Priority Register 24" start="0xE000E460"> - <BitField name="TCC1_INTREQ_4" start="4" size="4" /> - <BitField name="TCC2_INTREQ_0" start="12" size="4" /> - <BitField name="TCC2_INTREQ_1" start="20" size="4" /> - <BitField name="TCC2_INTREQ_2" start="28" size="4" /> + <Register start="0xE000ED18" name="SHPR1" aka="System_Handlers_4_7_Priority" description="System Handler Priority Register 1"> + <BitField size="3" name="PRI_4(MemManage)" start="8-3" description="Priority of system handler 4, MemManage" /> + <BitField size="3" name="PRI_5(BusFault)" start="16-3" description="Priority of system handler 5, BusFault" /> + <BitField size="3" name="PRI_6(UsageFault)" start="24-3" description="Priority of system handler 6, UsageFault" /> + <BitField size="3" name="PRI_7" start="32-3" /> </Register> - <Register name="NVIC_IPR25" description="Interrupt Priority Register 25" start="0xE000E464"> - <BitField name="TCC2_INTREQ_3" start="4" size="4" /> - <BitField name="TCC3_INTREQ_0" start="12" size="4" /> - <BitField name="TCC3_INTREQ_1" start="20" size="4" /> - <BitField name="TCC3_INTREQ_2" start="28" size="4" /> + <Register start="0xE000ED1C" name="SHPR2" aka="System_Handlers_8_11_Priority" description="System Handler Priority Register 2"> + <BitField size="3" name="PRI_8" start="8-3" /> + <BitField size="3" name="PRI_9" start="16-3" /> + <BitField size="3" name="PRI_10" start="24-3" /> + <BitField size="3" name="PRI_11(SVCall)" start="32-3" description="Priority of system handler 11, SVCall" /> </Register> - <Register name="NVIC_IPR26" description="Interrupt Priority Register 26" start="0xE000E468"> - <BitField name="TCC4_INTREQ_0" start="4" size="4" /> - <BitField name="TCC4_INTREQ_1" start="12" size="4" /> - <BitField name="TCC4_INTREQ_2" start="20" size="4" /> - <BitField name="TC0_INTREQ" start="28" size="4" /> + <Register start="0xE000ED20" name="SHPR3" aka="System_Handlers_12_15_Priority" description="System Handler Priority Register 3"> + <BitField size="3" name="PRI_12(DebugMonitor)" start="8-3" /> + <BitField size="3" name="PRI_13" start="16-3" /> + <BitField size="3" name="PRI_14(PendSV)" start="24-3" /> + <BitField size="3" name="PRI_15(SysTick)" start="32-3" /> </Register> - <Register name="NVIC_IPR27" description="Interrupt Priority Register 27" start="0xE000E46C"> - <BitField name="TC1_INTREQ" start="4" size="4" /> - <BitField name="TC2_INTREQ" start="12" size="4" /> - <BitField name="TC3_INTREQ" start="20" size="4" /> - <BitField name="TC4_INTREQ" start="28" size="4" /> + <Register start="0xE000ED24" name="SHCSR" aka="System_Handler_Control_and_State" description="System Handler Control and State Register"> + <BitField size="1" name="USGFAULTENA" start="18" description="UsageFault Enable Bit" /> + <BitField size="1" name="BUSFAULTENA" start="17" description="BusFault Enable Bit" /> + <BitField size="1" name="MEMFAULTENA" start="16" description="MemManage Enable Bit" /> + <BitField size="1" name="SVCALLPENDED" start="15" description="SVCall Pending Bit" /> + <BitField size="1" name="BUSFAULTPENDED" start="14" description="BusFault Exception Pending Bit" /> + <BitField size="1" name="MEMFAULTPENDED" start="13" description="MemManage Exception Pending Bit" /> + <BitField size="1" name="USGFAULTPENDED" start="12" description="UsageFault Exception Pending Bit" /> + <BitField size="1" name="SYSTICKACT" start="11" description="SysTick Exception Active Bit" /> + <BitField size="1" name="PENDSVACT" start="10" description="PendSV Exception Active Bit" /> + <BitField size="1" name="MONITORACT" start="8" description="Debug Monitor Active Bit" /> + <BitField size="1" name="SVCALLACT" start="7" description="SVCall Active Bit" /> + <BitField size="1" name="USGFAULTACT" start="3" description="UsageFault Exception Active Bit" /> + <BitField size="1" name="BUSFAULTACT" start="1" description="BusFault Exception Active Bit" /> + <BitField size="1" name="MEMFAULTACT" start="0" description="MemManage Exception Active Bit" /> </Register> - <Register name="NVIC_IPR28" description="Interrupt Priority Register 28" start="0xE000E470"> - <BitField name="TC5_INTREQ" start="4" size="4" /> - <BitField name="PDEC_INTREQ_0" start="28" size="4" /> + <Register start="0xE000ED28" size="1" name="MMFSR" aka="Memory_Manage_Fault_Status"> + <BitField size="1" name="MMARVALID" start="7" /> + <BitField size="1" name="MLSPERR" start="5" /> + <BitField size="1" name="MSTKERR" start="4" /> + <BitField size="1" name="MUNSTKERR" start="3" /> + <BitField size="1" name="DACCVIOL" start="1" /> + <BitField size="1" name="IACCVIOL" start="0" /> </Register> - <Register name="NVIC_IPR29" description="Interrupt Priority Register 29" start="0xE000E474"> - <BitField name="PDEC_INTREQ_1" start="4" size="4" /> - <BitField name="PDEC_INTREQ_2" start="12" size="4" /> - <BitField name="ADC0_INTREQ_0" start="20" size="4" /> - <BitField name="ADC0_INTREQ_1" start="28" size="4" /> + <Register start="0xE000ED29" size="1" name="BFSR" aka="Bus_Fault_Status"> + <BitField size="1" name="BFARVALID" start="7" /> + <BitField size="1" name="LSPERR" start="5" /> + <BitField size="1" name="STKERR" start="4" /> + <BitField size="1" name="UNSTKERR" start="3" /> + <BitField size="1" name="IMPRECISERR" start="2" /> + <BitField size="1" name="PRECISERR" start="1" /> + <BitField size="1" name="IBUSERR" start="0" /> </Register> - <Register name="NVIC_IPR30" description="Interrupt Priority Register 30" start="0xE000E478"> - <BitField name="ADC1_INTREQ_0" start="4" size="4" /> - <BitField name="ADC1_INTREQ_1" start="12" size="4" /> - <BitField name="AC_INTREQ" start="20" size="4" /> - <BitField name="DAC_INTREQ_0" start="28" size="4" /> + <Register start="0xE000ED2A" size="2" name="UFSR" aka="Usage_Fault_Status"> + <BitField size="1" name="DIVBYZERO" start="9" /> + <BitField size="1" name="UNALIGNED" start="8" /> + <BitField size="1" name="NOCP" start="3" /> + <BitField size="1" name="INVPC" start="2" /> + <BitField size="1" name="INVSTATE" start="1" /> + <BitField size="1" name="UNDEFINSTR" start="0" /> </Register> - <Register name="NVIC_IPR31" description="Interrupt Priority Register 31" start="0xE000E47C"> - <BitField name="DAC_INTREQ_1" start="4" size="4" /> - <BitField name="DAC_INTREQ_2" start="12" size="4" /> - <BitField name="DAC_INTREQ_3" start="20" size="4" /> - <BitField name="DAC_INTREQ_4" start="28" size="4" /> + <Register start="0xE000ED2C" name="HFSR" aka="Hard_Fault_Status"> + <BitField size="1" name="DEBUGEVT" start="31" /> + <BitField size="1" name="FORCED" start="30" /> + <BitField size="1" name="VECTTBL" start="1" /> </Register> - <Register name="NVIC_IPR32" description="Interrupt Priority Register 32" start="0xE000E480"> - <BitField name="I2S_INTREQ" start="4" size="4" /> - <BitField name="PCC_INTREQ" start="12" size="4" /> - <BitField name="AES_INTREQ" start="20" size="4" /> - <BitField name="TRNG_INTREQ" start="28" size="4" /> + <Register start="0xE000ED30" name="DFSR" aka="Debug_Fault_Status"> + <BitField size="1" name="EXTERNAL" start="4" /> + <BitField size="1" name="VCATCH" start="3" /> + <BitField size="1" name="DWTTRAP" start="2" /> + <BitField size="1" name="BKPT" start="1" /> + <BitField size="1" name="HALTED" start="0" /> </Register> - <Register name="NVIC_IPR33" description="Interrupt Priority Register 33" start="0xE000E484"> - <BitField name="ICM_INTREQ" start="4" size="4" /> - <BitField name="QSPI_INTREQ" start="20" size="4" /> - <BitField name="SDHC0_INTREQ" start="28" size="4" /> + <Register start="0xE000ED34" name="MMFAR" aka="Memory_Manage_Fault_Address" /> + <Register start="0xE000ED38" name="BFAR" aka="Bus_Fault_Address" /> + <Register start="0xE000ED3C" name="AFSR" aka="Auxillary_Fault_Address" /> + <Register start="0xE000ED88" name="CPACR" description="Coprocessor Access Control Register"> + <BitField size="2" name="CP0" start="0" /> + <BitField size="2" name="CP1" start="2" /> + <BitField size="2" name="CP2" start="4" /> + <BitField size="2" name="CP3" start="6" /> + <BitField size="2" name="CP4" start="8" /> + <BitField size="2" name="CP5" start="10" /> + <BitField size="2" name="CP6" start="12" /> + <BitField size="2" name="CP7" start="14" /> + <BitField size="2" name="CP10" start="20" /> + <BitField size="2" name="CP11" start="22" /> </Register> </RegisterGroup> - <RegisterGroup name="SysTick" start="0xE000E010" description="24-bit System Timer"> - <Register name="SYST_CSR" start="0xE000E010" description="SysTick Control and Status Register"> - <BitField name="COUNTFLAG" start="16" size="1" description="Counter Flag" /> - <BitField name="CLKSOURCE" start="2" size="1" description="Timer Clock Source" /> - <BitField name="TICKINT" start="1" size="1" description="Tick Interrupt Enable" /> - <BitField name="ENABLE" start="0" size="1" description="Enable SysTick Timer" /> - </Register> - <Register name="SYST_RVR" start="0xE000E014" description="SysTick Reload Value Register"> - <BitField name="RELOAD" start="0" size="24" description="Value to load into the SYST_CVR when the counter is enabled and when it reaches 0" /> - </Register> - <Register name="SYST_CVR" start="0xE000E018" description="SysTick Current Value Register Register"> - <BitField name="CURRENT" start="0" size="24" description="The current value of the SysTick counter" /> - </Register> - <Register name="SYST_CALIB" start="0xE000E01C" access="ReadOnly" description="SysTick Calibration Value Register"> - <BitField name="NOREF" start="31" size="1" description="Indicates whether the device provides a reference clock to the processor" /> - <BitField name="SKEW" start="30" size="1" description="Indicates whether the TENMS value is exact" /> - <BitField name="TENMS" start="0" size="24" description="Reload value for 10ms (100Hz) timing, subject to system clock skew errors" /> + <RegisterGroup start="0xE000ED00" name="CPUID"> + <Register start="0xE000ED00" name="CPUID" aka="CPUID_Base" access="ReadOnly" description="CPUID Base Register"> + <BitField size="8" name="IMPLEMENTER" start="24" description="Implementer Code" /> + <BitField size="4" name="VARIANT" start="20" description="Variant Number" /> + <BitField size="12" name="PARTNO" start="4" description="Part Number" /> + <BitField size="4" name="REVISION" start="0" description="Revision Number" /> </Register> + <Register start="0xE000ED40" name="ID_PFR0" aka="PFR0" access="ReadOnly" /> + <Register start="0xE000ED44" name="ID_PFR1" aka="PFR1" access="ReadOnly" /> + <Register start="0xE000ED48" name="ID_DFR0" aka="DFR0" access="ReadOnly" /> + <Register start="0xE000ED4C" name="ID_AFR0" aka="AFR0" access="ReadOnly" /> + <Register start="0xE000ED50" name="ID_MMFR0" aka="MMFR0" access="ReadOnly" /> + <Register start="0xE000ED54" name="ID_MMFR1" aka="MMFR1" access="ReadOnly" /> + <Register start="0xE000ED58" name="ID_MMFR2" aka="MMFR2" access="ReadOnly" /> + <Register start="0xE000ED5C" name="ID_MMFR3" aka="MMFR3" access="ReadOnly" /> + <Register start="0xE000ED60" name="ID_ISAR0" aka="ISAR0" access="ReadOnly" /> + <Register start="0xE000ED64" name="ID_ISAR1" aka="ISAR1" access="ReadOnly" /> + <Register start="0xE000ED68" name="ID_ISAR2" aka="ISAR2" access="ReadOnly" /> + <Register start="0xE000ED6C" name="ID_ISAR3" aka="ISAR3" access="ReadOnly" /> + <Register start="0xE000ED70" name="ID_ISAR4" aka="ISAR4" access="ReadOnly" /> </RegisterGroup> - <RegisterGroup name="SCB" start="" description="System Control Block"> - <Register name="ACTLR" start="0xE000E008" description="Auxiliary Control Register"> - <BitField name="DISOOFP" start="9" size="1" description="Disables floating pointinstructions completing outof order with respect to integer instructions" /> - <BitField name="DISFPCA" start="8" size="1" description="When set to 1, disables IT folding" /> - <BitField name="DISFOLD" start="2" size="1" description="When set to 1, disables write buffer use during default memory map accesses" /> - <BitField name="DISDEFWBUF" start="1" size="1" description="When set to 1, disables write buffer use during default memory map accesses" /> - <BitField name="DISMCYCINT" start="0" size="1" description="When set to 1, disables interruption of load multiple and store multiple instructions" /> - </Register> - <Register name="CPUID" start="0xE000ED00" access="ReadOnly" description="CPUID Register"> - <BitField name="IMPLEMENTER" start="24" size="8" description="Implementer Code" /> - <BitField name="VARIANT" start="20" size="4" description="Variant Number" /> - <BitField name="PARTNO" start="4" size="12" description="Part Number" /> - <BitField name="REVISION" start="0" size="4" description="Revision Number" /> - </Register> - <Register name="ICSR" start="0xE000ED04" description="Interrupt Control and State Register"> - <BitField name="NMIPENDSET" start="31" size="1" description="NMI set-pending bit" /> - <BitField name="PENDSVSET" start="28" size="1" description="PendSV set-pending bit" /> - <BitField name="PENDSVCLR" start="27" size="1" description="PendSV clear-pending bit" /> - <BitField name="PENDSTSET" start="26" size="1" description="SysTick exception set-pending bit" /> - <BitField name="PENDSTCLR" start="25" size="1" description="SysTick exception clear-pending bit" /> - <BitField name="ISRPREEMPT" start="23" size="1" description="" /> - <BitField name="ISRPENDING" start="22" size="1" description="Interrupt pending flag" /> - <BitField name="VECTPENDING" start="12" size="9" description="Indicates the exception number of the highest priority pending enabled exception" /> - <BitField name="RETTOBASE" start="11" size="1" description="Indicates whether there are preempted active exceptions" /> - <BitField name="VECTACTIVE" start="0" size="9" description="Contains the active exception number" /> - </Register> - <Register name="VTOR" start="0xE000ED08" description="Vector Table Offset Register"> - <BitField name="TBLOFF" start="7" size="25" description="Vector table base offset field" /> + <RegisterGroup start="0xE000ED90" name="MPU"> + <Register start="0xE000ED90" name="MPU_TYPE" aka="MPU_Type" access="ReadOnly" description="MPU Type Register"> + <BitField size="8" name="IREGION" start="16" description="Number of supported MPU instruction regions" /> + <BitField size="8" name="DREGION" start="8" description="Number of supported MPU data regions" /> + <BitField size="8" name="SEPARATE" start="0" description="Support for unified or separate instruction and date memory maps" /> </Register> - <Register name="AIRCR" start="0xE000ED0C" description="Application Interrupt and Reset Control Register"> - <BitField name="VECTKEY" start="16" size="16" description="Register key" /> - <BitField name="ENDIANESS" start="15" size="1" description="Data endianness bit" /> - <BitField name="PRIGROUP" start="8" size="3" description="Interrupt priority grouping field" /> - <BitField name="SYSRESETREQ" start="2" size="1" description="System reset request bit" /> - <BitField name="VECTCLRACTIVE" start="1" size="1" description="" /> - <BitField name="VECTRESET" start="0" size="1" description="" /> + <Register start="0xE000ED94" name="MPU_CTRL" aka="MPU_Control" description="MPU Control Register"> + <BitField size="1" name="PRIVDEFENA" start="2" description="Enables privileged software access to the default memory map" /> + <BitField size="1" name="HFNMIENA" start="1" description="Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers" /> + <BitField size="1" name="ENABLE" start="0" description="Enable MPU" /> </Register> - <Register name="SCR" start="0xE000ED10" description="System Control Register"> - <BitField name="SEVONPEND" start="4" size="1" description="Send event on pending bit" /> - <BitField name="SLEEPDEEP" start="2" size="1" description="Controls whether the processor uses sleep or deep sleep as its low power mode" /> - <BitField name="SLEEPONEXIT" start="1" size="1" description="Indicates sleep-on-exit when returning from Handler mode to Thread mode" /> + <Register start="0xE000ED98" name="MPU_RNR" aka="MPU_Region_Number" description="MPU Region Number Register"> + <BitField size="8" name="REGION" start="0" /> </Register> - <Register name="CCR" start="0xE000ED14" access="ReadOnly" description="Configuration and Control Register"> - <BitField name="STKALIGN" start="9" size="1" description="Indicates stack alignment on exception entry" /> - <BitField name="BFHFNMIGN" start="8" size="1" description="Enables handlers with priority -1 or-2 to ignore data BusFaults caused by load and store instructions" /> - <BitField name="DIV_0_TRP" start="4" size="1" description="Enables faulting or halting when the processor executes an SDIVor UDIV instruction with a divisor of 0" /> - <BitField name="UNALIGN_TRP" start="3" size="1" description="Enables unaligned access traps" /> - <BitField name="USERSETMPEND" start="1" size="1" description="Enables unprivileged software access to the STIR" /> - <BitField name="NONBASETHRDENA" start="0" size="1" description="Indicates how the processor enters Thread mode" /> + <Register start="0xE000ED9C" name="MPU_RBAR" aka="MPU_Region_Base_Address" description="MPU Region Base Address Register"> + <BitField size="27" name="ADDR" start="5" description="Region base address field" /> + <BitField size="1" name="VALID" start="4" description="MPU Region Number valid bit" /> + <BitField size="4" name="REGION" start="0" description="MPU region field" /> </Register> - <Register name="SHPR1" start="0xE000ED18" description="System Handler Priority Register 1"> - <BitField name="PRI_6" start="20" size="4" description="Priority of system handler 6 (UsageFault)" /> - <BitField name="PRI_5" start="12" size="4" description="Priority of system handler 5 (BusFault)" /> - <BitField name="PRI_4" start="4" size="4" description="Priority of system handler 4 (MemManage)" /> - </Register> - <Register name="SHPR2" start="0xE000ED1C" description="System Handler Priority Register 2"> - <BitField name="PRI_11" start="28" size="4" description="Priority of system handler 11 (SVCall)" /> - </Register> - <Register name="SHPR3" start="0xE000ED20" description="System Handler Priority Register 3"> - <BitField name="PRI_15" start="28" size="4" description="Priority of system handler 15 (SysTick)" /> - <BitField name="PRI_14" start="20" size="4" description="Priority of system handler 14 (PendSV)" /> - </Register> - <Register name="SHCSR" start="0xE000ED24" description="System Handler Control and State Register"> - <BitField name="USGFAULTENA" start="18" size="1" description="UsageFault enable Bit" /> - <BitField name="BUSFAULTENA" start="17" size="1" description="BusFault Enable Bit" /> - <BitField name="MEMFAULTENA" start="16" size="1" description="MemManage Enable Bit" /> - <BitField name="SVCALLPENDED" start="15" size="1" description="SVCall Pending Bit" /> - <BitField name="BUSFAULTPENDED" start="14" size="1" description="BusFault Exception Pending Bit" /> - <BitField name="MEMFAULTPENDED" start="13" size="1" description="MemManage Exception Pending Bit" /> - <BitField name="USGFAULTPENDED" start="12" size="1" description="UsageFault Exception Pending Bit" /> - <BitField name="SYSTICKACT" start="11" size="1" description="SysTick Exception Active Bit" /> - <BitField name="PENDSVACT" start="10" size="1" description="PendSV Exception Active Bit" /> - <BitField name="MONITORACT" start="8" size="1" description="Debug Monitor Active Bit" /> - <BitField name="SVCALLACT" start="7" size="1" description="SVCall Active Bit" /> - <BitField name="USGFAULTACT" start="3" size="1" description="UsageFault Exception Active Bit" /> - <BitField name="BUSFAULTACT" start="1" size="1" description="BusFault Exception Active Bit" /> - <BitField name="MEMFAULTACT" start="0" size="1" description="MemManage Exception Active Bit" /> - </Register> - <Register name="MMSR" start="0xE000ED28" size="1" description="MemManage Fault Status Register"> - <BitField name="MMARVALID" start="7" size="1" description="MemManage Fault Address Register(MMFAR) valid flag" /> - <BitField name="MLSPERR" start="5" size="1" description="Indicates a MemManage fault occurred during floating-point lazy state preservation" /> - <BitField name="MSTKERR" start="4" size="1" description="MemManage fault on stacking for exception entry" /> - <BitField name="MUNSTKERR" start="3" size="1" description="MemManage fault on unstacking for a return from exception" /> - <BitField name="DACCVIOL" start="1" size="1" description="Data access violation flag" /> - <BitField name="IACCVIOL" start="0" size="1" description="Instruction access violation flag" /> - </Register> - <Register name="BFSR" start="0xE000ED29" size="1" description="BusFault Status Register"> - <BitField name="BFARVALID" start="7" size="1" description="BusFault Address Register(BFAR) valid flag" /> - <BitField name="LSPERR" start="5" size="1" description="Indicates a bus fault occurred during floating-point lazy state preservation" /> - <BitField name="STKERR" start="4" size="1" description="BusFault on stacking for exception entry" /> - <BitField name="UNSTKERR" start="3" size="1" description="BusFault on unstacking for a return from exception" /> - <BitField name="IMPRECISERR" start="2" size="1" description="Imprecise data bus error" /> - <BitField name="PRECISERR" start="1" size="1" description="Precise data bus error" /> - <BitField name="IBUSERR" start="0" size="1" description="Instruction bus error" /> - </Register> - <Register name="UFSR" start="0xE000ED2A" size="2" description="UsageFault Status Register"> - <BitField name="DIVBYZERO" start="9" size="1" description="Divide by zero UsageFault" /> - <BitField name="UNALIGNED" start="8" size="1" description="Unaligned access UsageFault" /> - <BitField name="NOCP" start="3" size="1" description="No coprocessor UsageFault" /> - <BitField name="INVPC" start="2" size="1" description="Invalid PC load UsageFault, causedby an invalid PC load by EXC_RETURN" /> - <BitField name="INVSTATE" start="1" size="1" description="Invalid state UsageFault" /> - <BitField name="UNDEFINSTR" start="0" size="1" description="Undefined instruction UsageFault" /> - </Register> - <Register name="HFSR" start="0xE000ED2C" description="HardFault Status Register"> - <BitField name="DEBUGEVT" start="31" size="1" description="" /> - <BitField name="FORCED" start="30" size="1" description="Indicates a forced hard fault, generated by escalation of a fault with configurable priority that cannot be handled, either because of priority or because it is disabled" /> - <BitField name="VECTTBL" start="1" size="1" description="Indicates a BusFault on a vectortable read during exception processing" /> - </Register> - <Register name="DFSR" start="0xE000ED30" description="Debug Fault Status Register"> - <BitField name="EXTERNAL" start="4" size="1" description="" /> - <BitField name="VCATCH" start="3" size="1" description="" /> - <BitField name="DWTTRAP" start="2" size="1" description="" /> - <BitField name="BKPT" start="1" size="1" description="" /> - <BitField name="HALTED" start="0" size="1" description="" /> - </Register> - <Register name="MMAR" start="0xE000ED34" description="MemManage Fault Address Register"> - <BitField name="ADDRESS" start="0" size="32" description="When the MMARVALID bit of the MMFSR is set to 1, this field holds the address of the location that generated the MemManage fault" /> - </Register> - <Register name="BFAR" start="0xE000ED38" description="BusFault Address Register"> - <BitField name="ADDRESS" start="0" size="32" description="When the BFARVALID bit of the BFSR is set to1, this field holds the address of the location that generated the BusFault" /> - </Register> - <Register name="AFSR" start="0xE000ED3C" description="Auxiliary Fault Status Register"> - <BitField name="IMPDEF" start="0" size="32" description="Implementation defined, the bits map to the AUXFAULT input signals" /> + <Register start="0xE000EDA0" name="MPU_RASR" aka="MPU_Attribute_and_Size" description="MPU Region Attribute and Size Register"> + <BitField size="1" name="XN" start="28" description="Instruction access disable bit" /> + <BitField size="3" name="AP" start="24" description="Access permission field" /> + <BitField size="3" name="TEX" start="19" description="Memory access attribute" /> + <BitField size="1" name="S" start="18" description="Shareable bit" /> + <BitField size="1" name="C" start="17" description="Memory access attribute" /> + <BitField size="1" name="B" start="16" description="Memory access attribute" /> + <BitField size="8" name="SRD" start="8" description="Subregion disable bits" /> + <BitField size="5" name="SIZE" start="1" description="MPU protection region size" /> + <BitField size="1" name="ENABLE" start="0" description="Region enable bit" /> </Register> </RegisterGroup> - <RegisterGroup name="FPU" description="Floating Point Unit"> - <Register name="CPACR" start="0xE000ED88" description="Coprocessor Access Control Register"> - <BitField name="CP11" start="22" size="2" description="Access privileges for coprocessor 11" /> - <BitField name="CP10" start="20" size="2" description="Access privileges for coprocessor 10" /> - </Register> - <Register name="FPCCR" start="0xE000EF34" description="Floating-point Context Control Register"> - <BitField name="ASPEN" start="31" size="1" description="Automatic State Preservation" /> - <BitField name="LSPEN" start="30" size="1" description="Lazy State Preservation Enabled" /> - <BitField name="MONRDY" start="8" size="1" description="Monitor Ready" /> - <BitField name="BFRDY" start="6" size="1" description="BusFault Ready" /> - <BitField name="MMRDY" start="5" size="1" description="MemManage Ready" /> - <BitField name="HFRDY" start="4" size="1" description="HardFault Ready" /> - <BitField name="THREAD" start="3" size="1" description="Thread Mode Allocated Stack Frame" /> - <BitField name="USER" start="1" size="1" description="User Allocated Stack Frame" /> - <BitField name="LSPACT" start="0" size="1" description="Lazy State Preservation Active" /> - </Register> - <Register name="FPCAR" start="0xE000EF38" description="Floating-point Context Address Register"> - <BitField name="ADDRESSS" start="3" size="29" description="The location of the unpopulated floating-point register space allocated on an exception stack frame" /> - </Register> - <Register name="FPDSCR" start="0xE000EF3C" description="Floating-point Status Control Register"> - <BitField name="N" start="31" size="1" description="Negative condition code flag" /> - <BitField name="Z" start="30" size="1" description="Zero condition code flag" /> - <BitField name="C" start="29" size="1" description="Carry condition code flag" /> - <BitField name="V" start="28" size="1" description="Overflow condition code flag" /> - <BitField name="AHP" start="26" size="1" description="Alternative half-precision control bit" /> - <BitField name="DN" start="25" size="1" description="Default NaN mode control bit" /> - <BitField name="FZ" start="24" size="1" description="Flush-to-zero mode control bit" /> - <BitField name="RMode" start="22" size="2" description="Rounding Mode control field" /> - <BitField name="IDC" start="7" size="1" description="Input Denormal cumulative exception bit" /> - <BitField name="IXC" start="4" size="1" description="Inexact cumulative exception bit" /> - <BitField name="UFC" start="3" size="1" description="Underflow cumulative exception bit" /> - <BitField name="OFC" start="2" size="1" description="Overflow cumulative exception bit" /> - <BitField name="DZC" start="1" size="1" description="Division by Zero cumulative exception bit" /> - <BitField name="IOC" start="0" size="1" description="Invalid Operation cumulative exception bit" /> - </Register> + <RegisterGroup start="0xE000EDF0" name="CoreDebug"> + <Register start="0xE000EDF0" name="DHCSR" /> + <Register start="0xE000EDF4" name="DCRSR" /> + <Register start="0xE000EDF8" name="DCRDR" /> + <Register start="0xE000EDFC" name="DEMCR" /> </RegisterGroup> - <RegisterGroup name="MPU" start="0xE000ED90" description="Memory Protection Unit"> - <Register name="MPU_TYPE" start="0xE000ED90" access="ReadOnly" description="MPU Type Register"> - <BitField name="IREGION" start="16" size="8" description="Number of supported MPU instruction regions" /> - <BitField name="DREGION" start="8" size="8" description="Number of supported MPU data regions" /> - <BitField name="SEPARATE" start="0" size="1" description="Support for unified or separate instruction and date memory maps" /> + <RegisterGroup start="0xE000EF00" name="SCB"> + <Register start="0xE000EF00" name="STIR" aka="SCB_SW_TRIG" access="WriteOnly" description="Software Trigger Interrupt Register"> + <BitField size="10" name="INTID" start="0" description="ID of the interrupt to trigger" /> </Register> - <Register name="MPU_CTRL" start="0xE000ED94" description="MPU Control Register"> - <BitField name="PRIVDEFENA" start="2" size="1" description="Enables privileged software access to the default memory map" /> - <BitField name="HFNMIENA" start="1" size="1" description="Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers" /> - <BitField name="ENABLE" start="0" size="1" description="Enable MPU" /> - </Register> - <Register name="MPU_RNR" start="0xE000ED98" description="MPU Region Number Register"> - <BitField name="REGION" start="0" size="8" description="Indicates the MPU region referenced by the MPU_RBAR and MPU_RASR registers" /> - </Register> - <Register name="MPU_RBAR" start="0xE000ED9C" description="MPU Region Base Address Register"> - <BitField name="ADDR" start="5" size="27" description="Region base address field" /> - <BitField name="VALID" start="4" size="1" description="MPU Region Number valid bit" /> - <BitField name="REGION" start="0" size="4" description="MPU region field" /> + </RegisterGroup> + <RegisterGroup start="0xE000EF34" name="SCB_FP"> + <Register start="0xE000EF34" name="FPCCR" description="Floating-point Context Control Register"> + <BitField size="1" name="ASPEN" start="31" description="Automatic State Preservation" /> + <BitField size="1" name="LSPEN" start="30" description="Lazy State Preservation Enabled" /> + <BitField size="1" name="MONRDY" start="8" description="Monitor Ready" /> + <BitField size="1" name="BFRDY" start="6" description="BusFault Ready" /> + <BitField size="1" name="MMRDY" start="5" description="MemManage Ready" /> + <BitField size="1" name="HFRDY" start="4" description="HardFault Ready" /> + <BitField size="1" name="THREAD" start="3" description="Thread Mode Allocated Stack Frame" /> + <BitField size="1" name="USER" start="1" description="User Allocated Stack Frame" /> + <BitField size="1" name="LSPACT" start="0" description="Lazy State Preservation Active" /> </Register> - <Register name="MPU_RASR" start="0xE000EDA0" description="MPU Region Attribute and Size Register"> - <BitField name="XN" start="28" size="1" description="Instruction access disable bit" /> - <BitField name="AP" start="24" size="3" description="Access permission field" /> - <BitField name="TEX" start="19" size="3" description="Memory access attribute" /> - <BitField name="S" start="18" size="1" description="Shareable bit" /> - <BitField name="C" start="17" size="1" description="Memory access attribute" /> - <BitField name="B" start="16" size="1" description="Memory access attribute" /> - <BitField name="SRD" start="8" size="8" description="Subregion disable bits" /> - <BitField name="SIZE" start="1" size="5" description="MPU protection region size" /> - <BitField name="ENABLE" start="0" size="1" description="Region enable bit" /> + <Register start="0xE000EF38" name="FPCAR" description="Floating-point Context Address Register" /> + <Register start="0xE000EF3C" name="FPDSCR" description="Floating-point Default Status Control Register"> + <BitField size="1" name="AHP" start="26" description="Default value for FPSCR.AHP" /> + <BitField size="1" name="DN" start="25" description="Default value for FPSCR.DN" /> + <BitField size="1" name="FZ" start="24" description="Default value for FPSCR.FZ" /> + <BitField size="2" name="RMode" start="22" description="Default value for FPSCR.RMode" /> </Register> + <Register start="0xE000EF40" name="MVFR0" /> + <Register start="0xE000EF44" name="MVFR1" /> + </RegisterGroup> + <RegisterGroup start="0xE000EFD0" name="ID_space"> + <Register start="0xE000EFD0" size="1" name="PID4" access="ReadOnly" /> + <Register start="0xE000EFD4" size="1" name="PID5" access="ReadOnly" /> + <Register start="0xE000EFD8" size="1" name="PID6" access="ReadOnly" /> + <Register start="0xE000EFDC" size="1" name="PID7" access="ReadOnly" /> + <Register start="0xE000EFE0" size="1" name="PID0" access="ReadOnly" /> + <Register start="0xE000EFE4" size="1" name="PID1" access="ReadOnly" /> + <Register start="0xE000EFE8" size="1" name="PID2" access="ReadOnly" /> + <Register start="0xE000EFEC" size="1" name="PID3" access="ReadOnly" /> + <Register start="0xE000EFF0" size="1" name="CID0" access="ReadOnly" /> + <Register start="0xE000EFF4" size="1" name="CID1" access="ReadOnly" /> + <Register start="0xE000EFF8" size="1" name="CID2" access="ReadOnly" /> + <Register start="0xE000EFFC" size="1" name="CID3" access="ReadOnly" /> </RegisterGroup> </Processor> diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s new file mode 100644 index 000000000..9e657625d --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s @@ -0,0 +1,1227 @@ +/***************************************************************************** + * Copyright (c) 2018 Rowley Associates Limited. * + * * + * This file may be distributed under the terms of the License Agreement * + * provided with this software. * + * * + * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * + * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * STARTUP_FROM_RESET * + * * + * If defined, the program will startup from power-on/reset. If not * + * defined the program will just loop endlessly from power-on/reset. * + * * + * VECTORS_IN_RAM * + * * + * If defined, an area of RAM will large enough to store the vector table * + * will be reserved. * + * * + *****************************************************************************/ + + .syntax unified + .code 16 + + .section .init, "ax" + .align 0 + +/***************************************************************************** + * Default Exception Handlers * + *****************************************************************************/ + +#ifndef STARTUP_FROM_RESET + + .thumb_func + .weak Reset_Wait +Reset_Wait: + b . + +#endif + + .thumb_func + .weak NMI_Handler +NMI_Handler: + b . + + .thumb_func + .weak HardFault_Handler +HardFault_Handler: + b . + + .thumb_func + .weak SVC_Handler +SVC_Handler: + b . + + .thumb_func + .weak PendSV_Handler +PendSV_Handler: + b . + + .thumb_func + .weak SysTick_Handler +SysTick_Handler: + b . + + .thumb_func +Dummy_Handler: + b . + +#if defined(__OPTIMIZATION_SMALL) + + .weak PM_Handler + .thumb_set PM_Handler,Dummy_Handler + + .weak MCLK_Handler + .thumb_set MCLK_Handler,Dummy_Handler + + .weak OSCCTRL_0_Handler + .thumb_set OSCCTRL_0_Handler,Dummy_Handler + + .weak OSCCTRL_1_Handler + .thumb_set OSCCTRL_1_Handler,Dummy_Handler + + .weak OSCCTRL_2_Handler + .thumb_set OSCCTRL_2_Handler,Dummy_Handler + + .weak OSCCTRL_3_Handler + .thumb_set OSCCTRL_3_Handler,Dummy_Handler + + .weak OSCCTRL_4_Handler + .thumb_set OSCCTRL_4_Handler,Dummy_Handler + + .weak OSC32KCTRL_Handler + .thumb_set OSC32KCTRL_Handler,Dummy_Handler + + .weak SUPC_0_Handler + .thumb_set SUPC_0_Handler,Dummy_Handler + + .weak SUPC_1_Handler + .thumb_set SUPC_1_Handler,Dummy_Handler + + .weak WDT_Handler + .thumb_set WDT_Handler,Dummy_Handler + + .weak RTC_Handler + .thumb_set RTC_Handler,Dummy_Handler + + .weak EIC_0_Handler + .thumb_set EIC_0_Handler,Dummy_Handler + + .weak EIC_1_Handler + .thumb_set EIC_1_Handler,Dummy_Handler + + .weak EIC_2_Handler + .thumb_set EIC_2_Handler,Dummy_Handler + + .weak EIC_3_Handler + .thumb_set EIC_3_Handler,Dummy_Handler + + .weak EIC_4_Handler + .thumb_set EIC_4_Handler,Dummy_Handler + + .weak EIC_5_Handler + .thumb_set EIC_5_Handler,Dummy_Handler + + .weak EIC_6_Handler + .thumb_set EIC_6_Handler,Dummy_Handler + + .weak EIC_7_Handler + .thumb_set EIC_7_Handler,Dummy_Handler + + .weak EIC_8_Handler + .thumb_set EIC_8_Handler,Dummy_Handler + + .weak EIC_9_Handler + .thumb_set EIC_9_Handler,Dummy_Handler + + .weak EIC_10_Handler + .thumb_set EIC_10_Handler,Dummy_Handler + + .weak EIC_11_Handler + .thumb_set EIC_11_Handler,Dummy_Handler + + .weak EIC_12_Handler + .thumb_set EIC_12_Handler,Dummy_Handler + + .weak EIC_13_Handler + .thumb_set EIC_13_Handler,Dummy_Handler + + .weak EIC_14_Handler + .thumb_set EIC_14_Handler,Dummy_Handler + + .weak EIC_15_Handler + .thumb_set EIC_15_Handler,Dummy_Handler + + .weak FREQM_Handler + .thumb_set FREQM_Handler,Dummy_Handler + + .weak NVMCTRL_0_Handler + .thumb_set NVMCTRL_0_Handler,Dummy_Handler + + .weak NVMCTRL_1_Handler + .thumb_set NVMCTRL_1_Handler,Dummy_Handler + + .weak DMAC_0_Handler + .thumb_set DMAC_0_Handler,Dummy_Handler + + .weak DMAC_1_Handler + .thumb_set DMAC_1_Handler,Dummy_Handler + + .weak DMAC_2_Handler + .thumb_set DMAC_2_Handler,Dummy_Handler + + .weak DMAC_3_Handler + .thumb_set DMAC_3_Handler,Dummy_Handler + + .weak DMAC_4_Handler + .thumb_set DMAC_4_Handler,Dummy_Handler + + .weak EVSYS_0_Handler + .thumb_set EVSYS_0_Handler,Dummy_Handler + + .weak EVSYS_1_Handler + .thumb_set EVSYS_1_Handler,Dummy_Handler + + .weak EVSYS_2_Handler + .thumb_set EVSYS_2_Handler,Dummy_Handler + + .weak EVSYS_3_Handler + .thumb_set EVSYS_3_Handler,Dummy_Handler + + .weak EVSYS_4_Handler + .thumb_set EVSYS_4_Handler,Dummy_Handler + + .weak PAC_Handler + .thumb_set PAC_Handler,Dummy_Handler + + .weak TAL_0_Handler + .thumb_set TAL_0_Handler,Dummy_Handler + + .weak TAL_1_Handler + .thumb_set TAL_1_Handler,Dummy_Handler + + .weak RAMECC_Handler + .thumb_set RAMECC_Handler,Dummy_Handler + + .weak SERCOM0_0_Handler + .thumb_set SERCOM0_0_Handler,Dummy_Handler + + .weak SERCOM0_1_Handler + .thumb_set SERCOM0_1_Handler,Dummy_Handler + + .weak SERCOM0_2_Handler + .thumb_set SERCOM0_2_Handler,Dummy_Handler + + .weak SERCOM0_3_Handler + .thumb_set SERCOM0_3_Handler,Dummy_Handler + + .weak SERCOM1_0_Handler + .thumb_set SERCOM1_0_Handler,Dummy_Handler + + .weak SERCOM1_1_Handler + .thumb_set SERCOM1_1_Handler,Dummy_Handler + + .weak SERCOM1_2_Handler + .thumb_set SERCOM1_2_Handler,Dummy_Handler + + .weak SERCOM1_3_Handler + .thumb_set SERCOM1_3_Handler,Dummy_Handler + + .weak SERCOM2_0_Handler + .thumb_set SERCOM2_0_Handler,Dummy_Handler + + .weak SERCOM2_1_Handler + .thumb_set SERCOM2_1_Handler,Dummy_Handler + + .weak SERCOM2_2_Handler + .thumb_set SERCOM2_2_Handler,Dummy_Handler + + .weak SERCOM2_3_Handler + .thumb_set SERCOM2_3_Handler,Dummy_Handler + + .weak SERCOM3_0_Handler + .thumb_set SERCOM3_0_Handler,Dummy_Handler + + .weak SERCOM3_1_Handler + .thumb_set SERCOM3_1_Handler,Dummy_Handler + + .weak SERCOM3_2_Handler + .thumb_set SERCOM3_2_Handler,Dummy_Handler + + .weak SERCOM3_3_Handler + .thumb_set SERCOM3_3_Handler,Dummy_Handler + + .weak SERCOM4_0_Handler + .thumb_set SERCOM4_0_Handler,Dummy_Handler + + .weak SERCOM4_1_Handler + .thumb_set SERCOM4_1_Handler,Dummy_Handler + + .weak SERCOM4_2_Handler + .thumb_set SERCOM4_2_Handler,Dummy_Handler + + .weak SERCOM4_3_Handler + .thumb_set SERCOM4_3_Handler,Dummy_Handler + + .weak SERCOM5_0_Handler + .thumb_set SERCOM5_0_Handler,Dummy_Handler + + .weak SERCOM5_1_Handler + .thumb_set SERCOM5_1_Handler,Dummy_Handler + + .weak SERCOM5_2_Handler + .thumb_set SERCOM5_2_Handler,Dummy_Handler + + .weak SERCOM5_3_Handler + .thumb_set SERCOM5_3_Handler,Dummy_Handler + + .weak USB_0_Handler + .thumb_set USB_0_Handler,Dummy_Handler + + .weak USB_1_Handler + .thumb_set USB_1_Handler,Dummy_Handler + + .weak USB_2_Handler + .thumb_set USB_2_Handler,Dummy_Handler + + .weak USB_3_Handler + .thumb_set USB_3_Handler,Dummy_Handler + + .weak TCC0_0_Handler + .thumb_set TCC0_0_Handler,Dummy_Handler + + .weak TCC0_1_Handler + .thumb_set TCC0_1_Handler,Dummy_Handler + + .weak TCC0_2_Handler + .thumb_set TCC0_2_Handler,Dummy_Handler + + .weak TCC0_3_Handler + .thumb_set TCC0_3_Handler,Dummy_Handler + + .weak TCC0_4_Handler + .thumb_set TCC0_4_Handler,Dummy_Handler + + .weak TCC0_5_Handler + .thumb_set TCC0_5_Handler,Dummy_Handler + + .weak TCC0_6_Handler + .thumb_set TCC0_6_Handler,Dummy_Handler + + .weak TCC1_0_Handler + .thumb_set TCC1_0_Handler,Dummy_Handler + + .weak TCC1_1_Handler + .thumb_set TCC1_1_Handler,Dummy_Handler + + .weak TCC1_2_Handler + .thumb_set TCC1_2_Handler,Dummy_Handler + + .weak TCC1_3_Handler + .thumb_set TCC1_3_Handler,Dummy_Handler + + .weak TCC1_4_Handler + .thumb_set TCC1_4_Handler,Dummy_Handler + + .weak TCC2_0_Handler + .thumb_set TCC2_0_Handler,Dummy_Handler + + .weak TCC2_1_Handler + .thumb_set TCC2_1_Handler,Dummy_Handler + + .weak TCC2_2_Handler + .thumb_set TCC2_2_Handler,Dummy_Handler + + .weak TCC2_3_Handler + .thumb_set TCC2_3_Handler,Dummy_Handler + + .weak TCC3_0_Handler + .thumb_set TCC3_0_Handler,Dummy_Handler + + .weak TCC3_1_Handler + .thumb_set TCC3_1_Handler,Dummy_Handler + + .weak TCC3_2_Handler + .thumb_set TCC3_2_Handler,Dummy_Handler + + .weak TCC4_0_Handler + .thumb_set TCC4_0_Handler,Dummy_Handler + + .weak TCC4_1_Handler + .thumb_set TCC4_1_Handler,Dummy_Handler + + .weak TCC4_2_Handler + .thumb_set TCC4_2_Handler,Dummy_Handler + + .weak TC0_Handler + .thumb_set TC0_Handler,Dummy_Handler + + .weak TC1_Handler + .thumb_set TC1_Handler,Dummy_Handler + + .weak TC2_Handler + .thumb_set TC2_Handler,Dummy_Handler + + .weak TC3_Handler + .thumb_set TC3_Handler,Dummy_Handler + + .weak TC4_Handler + .thumb_set TC4_Handler,Dummy_Handler + + .weak TC5_Handler + .thumb_set TC5_Handler,Dummy_Handler + + .weak PDEC_0_Handler + .thumb_set PDEC_0_Handler,Dummy_Handler + + .weak PDEC_1_Handler + .thumb_set PDEC_1_Handler,Dummy_Handler + + .weak PDEC_2_Handler + .thumb_set PDEC_2_Handler,Dummy_Handler + + .weak ADC0_0_Handler + .thumb_set ADC0_0_Handler,Dummy_Handler + + .weak ADC0_1_Handler + .thumb_set ADC0_1_Handler,Dummy_Handler + + .weak ADC1_0_Handler + .thumb_set ADC1_0_Handler,Dummy_Handler + + .weak ADC1_1_Handler + .thumb_set ADC1_1_Handler,Dummy_Handler + + .weak AC_Handler + .thumb_set AC_Handler,Dummy_Handler + + .weak DAC_0_Handler + .thumb_set DAC_0_Handler,Dummy_Handler + + .weak DAC_1_Handler + .thumb_set DAC_1_Handler,Dummy_Handler + + .weak DAC_2_Handler + .thumb_set DAC_2_Handler,Dummy_Handler + + .weak DAC_3_Handler + .thumb_set DAC_3_Handler,Dummy_Handler + + .weak DAC_4_Handler + .thumb_set DAC_4_Handler,Dummy_Handler + + .weak I2S_Handler + .thumb_set I2S_Handler,Dummy_Handler + + .weak PCC_Handler + .thumb_set PCC_Handler,Dummy_Handler + + .weak AES_Handler + .thumb_set AES_Handler,Dummy_Handler + + .weak TRNG_Handler + .thumb_set TRNG_Handler,Dummy_Handler + + .weak ICM_Handler + .thumb_set ICM_Handler,Dummy_Handler + + .weak QSPI_Handler + .thumb_set QSPI_Handler,Dummy_Handler + + .weak SDHC0_Handler + .thumb_set SDHC0_Handler,Dummy_Handler + +#else + + .thumb_func + .weak PM_Handler +PM_Handler: + b . + + .thumb_func + .weak MCLK_Handler +MCLK_Handler: + b . + + .thumb_func + .weak OSCCTRL_0_Handler +OSCCTRL_0_Handler: + b . + + .thumb_func + .weak OSCCTRL_1_Handler +OSCCTRL_1_Handler: + b . + + .thumb_func + .weak OSCCTRL_2_Handler +OSCCTRL_2_Handler: + b . + + .thumb_func + .weak OSCCTRL_3_Handler +OSCCTRL_3_Handler: + b . + + .thumb_func + .weak OSCCTRL_4_Handler +OSCCTRL_4_Handler: + b . + + .thumb_func + .weak OSC32KCTRL_Handler +OSC32KCTRL_Handler: + b . + + .thumb_func + .weak SUPC_0_Handler +SUPC_0_Handler: + b . + + .thumb_func + .weak SUPC_1_Handler +SUPC_1_Handler: + b . + + .thumb_func + .weak WDT_Handler +WDT_Handler: + b . + + .thumb_func + .weak RTC_Handler +RTC_Handler: + b . + + .thumb_func + .weak EIC_0_Handler +EIC_0_Handler: + b . + + .thumb_func + .weak EIC_1_Handler +EIC_1_Handler: + b . + + .thumb_func + .weak EIC_2_Handler +EIC_2_Handler: + b . + + .thumb_func + .weak EIC_3_Handler +EIC_3_Handler: + b . + + .thumb_func + .weak EIC_4_Handler +EIC_4_Handler: + b . + + .thumb_func + .weak EIC_5_Handler +EIC_5_Handler: + b . + + .thumb_func + .weak EIC_6_Handler +EIC_6_Handler: + b . + + .thumb_func + .weak EIC_7_Handler +EIC_7_Handler: + b . + + .thumb_func + .weak EIC_8_Handler +EIC_8_Handler: + b . + + .thumb_func + .weak EIC_9_Handler +EIC_9_Handler: + b . + + .thumb_func + .weak EIC_10_Handler +EIC_10_Handler: + b . + + .thumb_func + .weak EIC_11_Handler +EIC_11_Handler: + b . + + .thumb_func + .weak EIC_12_Handler +EIC_12_Handler: + b . + + .thumb_func + .weak EIC_13_Handler +EIC_13_Handler: + b . + + .thumb_func + .weak EIC_14_Handler +EIC_14_Handler: + b . + + .thumb_func + .weak EIC_15_Handler +EIC_15_Handler: + b . + + .thumb_func + .weak FREQM_Handler +FREQM_Handler: + b . + + .thumb_func + .weak NVMCTRL_0_Handler +NVMCTRL_0_Handler: + b . + + .thumb_func + .weak NVMCTRL_1_Handler +NVMCTRL_1_Handler: + b . + + .thumb_func + .weak DMAC_0_Handler +DMAC_0_Handler: + b . + + .thumb_func + .weak DMAC_1_Handler +DMAC_1_Handler: + b . + + .thumb_func + .weak DMAC_2_Handler +DMAC_2_Handler: + b . + + .thumb_func + .weak DMAC_3_Handler +DMAC_3_Handler: + b . + + .thumb_func + .weak DMAC_4_Handler +DMAC_4_Handler: + b . + + .thumb_func + .weak EVSYS_0_Handler +EVSYS_0_Handler: + b . + + .thumb_func + .weak EVSYS_1_Handler +EVSYS_1_Handler: + b . + + .thumb_func + .weak EVSYS_2_Handler +EVSYS_2_Handler: + b . + + .thumb_func + .weak EVSYS_3_Handler +EVSYS_3_Handler: + b . + + .thumb_func + .weak EVSYS_4_Handler +EVSYS_4_Handler: + b . + + .thumb_func + .weak PAC_Handler +PAC_Handler: + b . + + .thumb_func + .weak TAL_0_Handler +TAL_0_Handler: + b . + + .thumb_func + .weak TAL_1_Handler +TAL_1_Handler: + b . + + .thumb_func + .weak RAMECC_Handler +RAMECC_Handler: + b . + + .thumb_func + .weak SERCOM0_0_Handler +SERCOM0_0_Handler: + b . + + .thumb_func + .weak SERCOM0_1_Handler +SERCOM0_1_Handler: + b . + + .thumb_func + .weak SERCOM0_2_Handler +SERCOM0_2_Handler: + b . + + .thumb_func + .weak SERCOM0_3_Handler +SERCOM0_3_Handler: + b . + + .thumb_func + .weak SERCOM1_0_Handler +SERCOM1_0_Handler: + b . + + .thumb_func + .weak SERCOM1_1_Handler +SERCOM1_1_Handler: + b . + + .thumb_func + .weak SERCOM1_2_Handler +SERCOM1_2_Handler: + b . + + .thumb_func + .weak SERCOM1_3_Handler +SERCOM1_3_Handler: + b . + + .thumb_func + .weak SERCOM2_0_Handler +SERCOM2_0_Handler: + b . + + .thumb_func + .weak SERCOM2_1_Handler +SERCOM2_1_Handler: + b . + + .thumb_func + .weak SERCOM2_2_Handler +SERCOM2_2_Handler: + b . + + .thumb_func + .weak SERCOM2_3_Handler +SERCOM2_3_Handler: + b . + + .thumb_func + .weak SERCOM3_0_Handler +SERCOM3_0_Handler: + b . + + .thumb_func + .weak SERCOM3_1_Handler +SERCOM3_1_Handler: + b . + + .thumb_func + .weak SERCOM3_2_Handler +SERCOM3_2_Handler: + b . + + .thumb_func + .weak SERCOM3_3_Handler +SERCOM3_3_Handler: + b . + + .thumb_func + .weak SERCOM4_0_Handler +SERCOM4_0_Handler: + b . + + .thumb_func + .weak SERCOM4_1_Handler +SERCOM4_1_Handler: + b . + + .thumb_func + .weak SERCOM4_2_Handler +SERCOM4_2_Handler: + b . + + .thumb_func + .weak SERCOM4_3_Handler +SERCOM4_3_Handler: + b . + + .thumb_func + .weak SERCOM5_0_Handler +SERCOM5_0_Handler: + b . + + .thumb_func + .weak SERCOM5_1_Handler +SERCOM5_1_Handler: + b . + + .thumb_func + .weak SERCOM5_2_Handler +SERCOM5_2_Handler: + b . + + .thumb_func + .weak SERCOM5_3_Handler +SERCOM5_3_Handler: + b . + + .thumb_func + .weak USB_0_Handler +USB_0_Handler: + b . + + .thumb_func + .weak USB_1_Handler +USB_1_Handler: + b . + + .thumb_func + .weak USB_2_Handler +USB_2_Handler: + b . + + .thumb_func + .weak USB_3_Handler +USB_3_Handler: + b . + + .thumb_func + .weak TCC0_0_Handler +TCC0_0_Handler: + b . + + .thumb_func + .weak TCC0_1_Handler +TCC0_1_Handler: + b . + + .thumb_func + .weak TCC0_2_Handler +TCC0_2_Handler: + b . + + .thumb_func + .weak TCC0_3_Handler +TCC0_3_Handler: + b . + + .thumb_func + .weak TCC0_4_Handler +TCC0_4_Handler: + b . + + .thumb_func + .weak TCC0_5_Handler +TCC0_5_Handler: + b . + + .thumb_func + .weak TCC0_6_Handler +TCC0_6_Handler: + b . + + .thumb_func + .weak TCC1_0_Handler +TCC1_0_Handler: + b . + + .thumb_func + .weak TCC1_1_Handler +TCC1_1_Handler: + b . + + .thumb_func + .weak TCC1_2_Handler +TCC1_2_Handler: + b . + + .thumb_func + .weak TCC1_3_Handler +TCC1_3_Handler: + b . + + .thumb_func + .weak TCC1_4_Handler +TCC1_4_Handler: + b . + + .thumb_func + .weak TCC2_0_Handler +TCC2_0_Handler: + b . + + .thumb_func + .weak TCC2_1_Handler +TCC2_1_Handler: + b . + + .thumb_func + .weak TCC2_2_Handler +TCC2_2_Handler: + b . + + .thumb_func + .weak TCC2_3_Handler +TCC2_3_Handler: + b . + + .thumb_func + .weak TCC3_0_Handler +TCC3_0_Handler: + b . + + .thumb_func + .weak TCC3_1_Handler +TCC3_1_Handler: + b . + + .thumb_func + .weak TCC3_2_Handler +TCC3_2_Handler: + b . + + .thumb_func + .weak TCC4_0_Handler +TCC4_0_Handler: + b . + + .thumb_func + .weak TCC4_1_Handler +TCC4_1_Handler: + b . + + .thumb_func + .weak TCC4_2_Handler +TCC4_2_Handler: + b . + + .thumb_func + .weak TC0_Handler +TC0_Handler: + b . + + .thumb_func + .weak TC1_Handler +TC1_Handler: + b . + + .thumb_func + .weak TC2_Handler +TC2_Handler: + b . + + .thumb_func + .weak TC3_Handler +TC3_Handler: + b . + + .thumb_func + .weak TC4_Handler +TC4_Handler: + b . + + .thumb_func + .weak TC5_Handler +TC5_Handler: + b . + + .thumb_func + .weak PDEC_0_Handler +PDEC_0_Handler: + b . + + .thumb_func + .weak PDEC_1_Handler +PDEC_1_Handler: + b . + + .thumb_func + .weak PDEC_2_Handler +PDEC_2_Handler: + b . + + .thumb_func + .weak ADC0_0_Handler +ADC0_0_Handler: + b . + + .thumb_func + .weak ADC0_1_Handler +ADC0_1_Handler: + b . + + .thumb_func + .weak ADC1_0_Handler +ADC1_0_Handler: + b . + + .thumb_func + .weak ADC1_1_Handler +ADC1_1_Handler: + b . + + .thumb_func + .weak AC_Handler +AC_Handler: + b . + + .thumb_func + .weak DAC_0_Handler +DAC_0_Handler: + b . + + .thumb_func + .weak DAC_1_Handler +DAC_1_Handler: + b . + + .thumb_func + .weak DAC_2_Handler +DAC_2_Handler: + b . + + .thumb_func + .weak DAC_3_Handler +DAC_3_Handler: + b . + + .thumb_func + .weak DAC_4_Handler +DAC_4_Handler: + b . + + .thumb_func + .weak I2S_Handler +I2S_Handler: + b . + + .thumb_func + .weak PCC_Handler +PCC_Handler: + b . + + .thumb_func + .weak AES_Handler +AES_Handler: + b . + + .thumb_func + .weak TRNG_Handler +TRNG_Handler: + b . + + .thumb_func + .weak ICM_Handler +ICM_Handler: + b . + + .thumb_func + .weak QSPI_Handler +QSPI_Handler: + b . + + .thumb_func + .weak SDHC0_Handler +SDHC0_Handler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ +#ifdef STARTUP_FROM_RESET + .extern Reset_Handler +#endif + +_vectors: + .word __stack_end__ +#ifdef STARTUP_FROM_RESET + .word Reset_Handler +#else + .word Reset_Wait +#endif + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word PM_Handler + .word MCLK_Handler + .word OSCCTRL_0_Handler + .word OSCCTRL_1_Handler + .word OSCCTRL_2_Handler + .word OSCCTRL_3_Handler + .word OSCCTRL_4_Handler + .word OSC32KCTRL_Handler + .word SUPC_0_Handler + .word SUPC_1_Handler + .word WDT_Handler + .word RTC_Handler + .word EIC_0_Handler + .word EIC_1_Handler + .word EIC_2_Handler + .word EIC_3_Handler + .word EIC_4_Handler + .word EIC_5_Handler + .word EIC_6_Handler + .word EIC_7_Handler + .word EIC_8_Handler + .word EIC_9_Handler + .word EIC_10_Handler + .word EIC_11_Handler + .word EIC_12_Handler + .word EIC_13_Handler + .word EIC_14_Handler + .word EIC_15_Handler + .word FREQM_Handler + .word NVMCTRL_0_Handler + .word NVMCTRL_1_Handler + .word DMAC_0_Handler + .word DMAC_1_Handler + .word DMAC_2_Handler + .word DMAC_3_Handler + .word DMAC_4_Handler + .word EVSYS_0_Handler + .word EVSYS_1_Handler + .word EVSYS_2_Handler + .word EVSYS_3_Handler + .word EVSYS_4_Handler + .word PAC_Handler + .word TAL_0_Handler + .word TAL_1_Handler + .word Dummy_Handler /* Reserved */ + .word RAMECC_Handler + .word SERCOM0_0_Handler + .word SERCOM0_1_Handler + .word SERCOM0_2_Handler + .word SERCOM0_3_Handler + .word SERCOM1_0_Handler + .word SERCOM1_1_Handler + .word SERCOM1_2_Handler + .word SERCOM1_3_Handler + .word SERCOM2_0_Handler + .word SERCOM2_1_Handler + .word SERCOM2_2_Handler + .word SERCOM2_3_Handler + .word SERCOM3_0_Handler + .word SERCOM3_1_Handler + .word SERCOM3_2_Handler + .word SERCOM3_3_Handler + .word SERCOM4_0_Handler + .word SERCOM4_1_Handler + .word SERCOM4_2_Handler + .word SERCOM4_3_Handler + .word SERCOM5_0_Handler + .word SERCOM5_1_Handler + .word SERCOM5_2_Handler + .word SERCOM5_3_Handler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word USB_0_Handler + .word USB_1_Handler + .word USB_2_Handler + .word USB_3_Handler + .word Dummy_Handler /* Reserved */ + .word TCC0_0_Handler + .word TCC0_1_Handler + .word TCC0_2_Handler + .word TCC0_3_Handler + .word TCC0_4_Handler + .word TCC0_5_Handler + .word TCC0_6_Handler + .word TCC1_0_Handler + .word TCC1_1_Handler + .word TCC1_2_Handler + .word TCC1_3_Handler + .word TCC1_4_Handler + .word TCC2_0_Handler + .word TCC2_1_Handler + .word TCC2_2_Handler + .word TCC2_3_Handler + .word TCC3_0_Handler + .word TCC3_1_Handler + .word TCC3_2_Handler + .word TCC4_0_Handler + .word TCC4_1_Handler + .word TCC4_2_Handler + .word TC0_Handler + .word TC1_Handler + .word TC2_Handler + .word TC3_Handler + .word TC4_Handler + .word TC5_Handler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word PDEC_0_Handler + .word PDEC_1_Handler + .word PDEC_2_Handler + .word ADC0_0_Handler + .word ADC0_1_Handler + .word ADC1_0_Handler + .word ADC1_1_Handler + .word AC_Handler + .word DAC_0_Handler + .word DAC_1_Handler + .word DAC_2_Handler + .word DAC_3_Handler + .word DAC_4_Handler + .word I2S_Handler + .word PCC_Handler + .word AES_Handler + .word TRNG_Handler + .word ICM_Handler + .word Dummy_Handler /* Reserved */ + .word QSPI_Handler + .word SDHC0_Handler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s b/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s deleted file mode 100644 index 20ca04678..000000000 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s +++ /dev/null @@ -1,1223 +0,0 @@ -/***************************************************************************** - * SEGGER Microcontroller GmbH & Co. KG * - * Solutions for real time microcontroller applications * - ***************************************************************************** - * * - * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * - * * - * Internet: www.segger.com Support: [email protected] * - * * - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions * - * ------------------------ * - * VECTORS_IN_RAM * - * * - * If defined, an area of RAM will large enough to store the vector table * - * will be reserved. * - * * - *****************************************************************************/ - - .syntax unified - .code 16 - - .section .init, "ax" - .align 0 - -/***************************************************************************** - * Default Exception Handlers * - *****************************************************************************/ - - .thumb_func - .weak NMI_Handler -NMI_Handler: - b . - - .thumb_func - .weak HardFault_Handler -HardFault_Handler: - b . - - .thumb_func - .weak SVC_Handler -SVC_Handler: - b . - - .thumb_func - .weak PendSV_Handler -PendSV_Handler: - b . - - .thumb_func - .weak SysTick_Handler -SysTick_Handler: - b . - - .thumb_func -Dummy_Handler: - b . - -#if defined(__OPTIMIZATION_SMALL) - - .weak PM_INTREQ_IRQHandler - .thumb_set PM_INTREQ_IRQHandler,Dummy_Handler - - .weak MCLK_INTREQ_IRQHandler - .thumb_set MCLK_INTREQ_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_0_IRQHandler - .thumb_set OSCCTRL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_1_IRQHandler - .thumb_set OSCCTRL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_2_IRQHandler - .thumb_set OSCCTRL_INTREQ_2_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_3_IRQHandler - .thumb_set OSCCTRL_INTREQ_3_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_4_IRQHandler - .thumb_set OSCCTRL_INTREQ_4_IRQHandler,Dummy_Handler - - .weak OSC32KCTRL_INTREQ_IRQHandler - .thumb_set OSC32KCTRL_INTREQ_IRQHandler,Dummy_Handler - - .weak SUPC_INTREQ_0_IRQHandler - .thumb_set SUPC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SUPC_INTREQ_1_IRQHandler - .thumb_set SUPC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak WDT_INTREQ_IRQHandler - .thumb_set WDT_INTREQ_IRQHandler,Dummy_Handler - - .weak RTC_INTREQ_IRQHandler - .thumb_set RTC_INTREQ_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_0_IRQHandler - .thumb_set EIC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_1_IRQHandler - .thumb_set EIC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_2_IRQHandler - .thumb_set EIC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_3_IRQHandler - .thumb_set EIC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_4_IRQHandler - .thumb_set EIC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_5_IRQHandler - .thumb_set EIC_INTREQ_5_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_6_IRQHandler - .thumb_set EIC_INTREQ_6_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_7_IRQHandler - .thumb_set EIC_INTREQ_7_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_8_IRQHandler - .thumb_set EIC_INTREQ_8_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_9_IRQHandler - .thumb_set EIC_INTREQ_9_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_10_IRQHandler - .thumb_set EIC_INTREQ_10_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_11_IRQHandler - .thumb_set EIC_INTREQ_11_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_12_IRQHandler - .thumb_set EIC_INTREQ_12_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_13_IRQHandler - .thumb_set EIC_INTREQ_13_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_14_IRQHandler - .thumb_set EIC_INTREQ_14_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_15_IRQHandler - .thumb_set EIC_INTREQ_15_IRQHandler,Dummy_Handler - - .weak FREQM_INTREQ_IRQHandler - .thumb_set FREQM_INTREQ_IRQHandler,Dummy_Handler - - .weak NVMCTRL_INTREQ_0_IRQHandler - .thumb_set NVMCTRL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak NVMCTRL_INTREQ_1_IRQHandler - .thumb_set NVMCTRL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_0_IRQHandler - .thumb_set DMAC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_1_IRQHandler - .thumb_set DMAC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_2_IRQHandler - .thumb_set DMAC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_3_IRQHandler - .thumb_set DMAC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_4_IRQHandler - .thumb_set DMAC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_0_IRQHandler - .thumb_set EVSYS_INTREQ_0_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_1_IRQHandler - .thumb_set EVSYS_INTREQ_1_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_2_IRQHandler - .thumb_set EVSYS_INTREQ_2_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_3_IRQHandler - .thumb_set EVSYS_INTREQ_3_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_4_IRQHandler - .thumb_set EVSYS_INTREQ_4_IRQHandler,Dummy_Handler - - .weak PAC_INTREQ_IRQHandler - .thumb_set PAC_INTREQ_IRQHandler,Dummy_Handler - - .weak TAL_INTREQ_0_IRQHandler - .thumb_set TAL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TAL_INTREQ_1_IRQHandler - .thumb_set TAL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak RAMECC_INTREQ_IRQHandler - .thumb_set RAMECC_INTREQ_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_0_IRQHandler - .thumb_set SERCOM0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_1_IRQHandler - .thumb_set SERCOM0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_2_IRQHandler - .thumb_set SERCOM0_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_3_IRQHandler - .thumb_set SERCOM0_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_0_IRQHandler - .thumb_set SERCOM1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_1_IRQHandler - .thumb_set SERCOM1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_2_IRQHandler - .thumb_set SERCOM1_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_3_IRQHandler - .thumb_set SERCOM1_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_0_IRQHandler - .thumb_set SERCOM2_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_1_IRQHandler - .thumb_set SERCOM2_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_2_IRQHandler - .thumb_set SERCOM2_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_3_IRQHandler - .thumb_set SERCOM2_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_0_IRQHandler - .thumb_set SERCOM3_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_1_IRQHandler - .thumb_set SERCOM3_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_2_IRQHandler - .thumb_set SERCOM3_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_3_IRQHandler - .thumb_set SERCOM3_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_0_IRQHandler - .thumb_set SERCOM4_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_1_IRQHandler - .thumb_set SERCOM4_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_2_IRQHandler - .thumb_set SERCOM4_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_3_IRQHandler - .thumb_set SERCOM4_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_0_IRQHandler - .thumb_set SERCOM5_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_1_IRQHandler - .thumb_set SERCOM5_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_2_IRQHandler - .thumb_set SERCOM5_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_3_IRQHandler - .thumb_set SERCOM5_INTREQ_3_IRQHandler,Dummy_Handler - - .weak CAN0_INTREQ_IRQHandler - .thumb_set CAN0_INTREQ_IRQHandler,Dummy_Handler - - .weak CAN1_INTREQ_IRQHandler - .thumb_set CAN1_INTREQ_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_0_IRQHandler - .thumb_set USB_INTREQ_0_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_1_IRQHandler - .thumb_set USB_INTREQ_1_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_2_IRQHandler - .thumb_set USB_INTREQ_2_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_3_IRQHandler - .thumb_set USB_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_0_IRQHandler - .thumb_set TCC0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_1_IRQHandler - .thumb_set TCC0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_2_IRQHandler - .thumb_set TCC0_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_3_IRQHandler - .thumb_set TCC0_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_4_IRQHandler - .thumb_set TCC0_INTREQ_4_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_5_IRQHandler - .thumb_set TCC0_INTREQ_5_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_6_IRQHandler - .thumb_set TCC0_INTREQ_6_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_0_IRQHandler - .thumb_set TCC1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_1_IRQHandler - .thumb_set TCC1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_2_IRQHandler - .thumb_set TCC1_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_3_IRQHandler - .thumb_set TCC1_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_4_IRQHandler - .thumb_set TCC1_INTREQ_4_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_0_IRQHandler - .thumb_set TCC2_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_1_IRQHandler - .thumb_set TCC2_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_2_IRQHandler - .thumb_set TCC2_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_3_IRQHandler - .thumb_set TCC2_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_0_IRQHandler - .thumb_set TCC3_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_1_IRQHandler - .thumb_set TCC3_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_2_IRQHandler - .thumb_set TCC3_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_0_IRQHandler - .thumb_set TCC4_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_1_IRQHandler - .thumb_set TCC4_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_2_IRQHandler - .thumb_set TCC4_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TC0_INTREQ_IRQHandler - .thumb_set TC0_INTREQ_IRQHandler,Dummy_Handler - - .weak TC1_INTREQ_IRQHandler - .thumb_set TC1_INTREQ_IRQHandler,Dummy_Handler - - .weak TC2_INTREQ_IRQHandler - .thumb_set TC2_INTREQ_IRQHandler,Dummy_Handler - - .weak TC3_INTREQ_IRQHandler - .thumb_set TC3_INTREQ_IRQHandler,Dummy_Handler - - .weak TC4_INTREQ_IRQHandler - .thumb_set TC4_INTREQ_IRQHandler,Dummy_Handler - - .weak TC5_INTREQ_IRQHandler - .thumb_set TC5_INTREQ_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_0_IRQHandler - .thumb_set PDEC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_1_IRQHandler - .thumb_set PDEC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_2_IRQHandler - .thumb_set PDEC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak ADC0_INTREQ_0_IRQHandler - .thumb_set ADC0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak ADC0_INTREQ_1_IRQHandler - .thumb_set ADC0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak ADC1_INTREQ_0_IRQHandler - .thumb_set ADC1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak ADC1_INTREQ_1_IRQHandler - .thumb_set ADC1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak AC_INTREQ_IRQHandler - .thumb_set AC_INTREQ_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_0_IRQHandler - .thumb_set DAC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_1_IRQHandler - .thumb_set DAC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_2_IRQHandler - .thumb_set DAC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_3_IRQHandler - .thumb_set DAC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_4_IRQHandler - .thumb_set DAC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak I2S_INTREQ_IRQHandler - .thumb_set I2S_INTREQ_IRQHandler,Dummy_Handler - - .weak PCC_INTREQ_IRQHandler - .thumb_set PCC_INTREQ_IRQHandler,Dummy_Handler - - .weak AES_INTREQ_IRQHandler - .thumb_set AES_INTREQ_IRQHandler,Dummy_Handler - - .weak TRNG_INTREQ_IRQHandler - .thumb_set TRNG_INTREQ_IRQHandler,Dummy_Handler - - .weak ICM_INTREQ_IRQHandler - .thumb_set ICM_INTREQ_IRQHandler,Dummy_Handler - - .weak QSPI_INTREQ_IRQHandler - .thumb_set QSPI_INTREQ_IRQHandler,Dummy_Handler - - .weak SDHC0_INTREQ_IRQHandler - .thumb_set SDHC0_INTREQ_IRQHandler,Dummy_Handler - -#else - - .thumb_func - .weak PM_INTREQ_IRQHandler -PM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak MCLK_INTREQ_IRQHandler -MCLK_INTREQ_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_0_IRQHandler -OSCCTRL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_1_IRQHandler -OSCCTRL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_2_IRQHandler -OSCCTRL_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_3_IRQHandler -OSCCTRL_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_4_IRQHandler -OSCCTRL_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak OSC32KCTRL_INTREQ_IRQHandler -OSC32KCTRL_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SUPC_INTREQ_0_IRQHandler -SUPC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SUPC_INTREQ_1_IRQHandler -SUPC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak WDT_INTREQ_IRQHandler -WDT_INTREQ_IRQHandler: - b . - - .thumb_func - .weak RTC_INTREQ_IRQHandler -RTC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_0_IRQHandler -EIC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_1_IRQHandler -EIC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_2_IRQHandler -EIC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_3_IRQHandler -EIC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_4_IRQHandler -EIC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_5_IRQHandler -EIC_INTREQ_5_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_6_IRQHandler -EIC_INTREQ_6_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_7_IRQHandler -EIC_INTREQ_7_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_8_IRQHandler -EIC_INTREQ_8_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_9_IRQHandler -EIC_INTREQ_9_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_10_IRQHandler -EIC_INTREQ_10_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_11_IRQHandler -EIC_INTREQ_11_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_12_IRQHandler -EIC_INTREQ_12_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_13_IRQHandler -EIC_INTREQ_13_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_14_IRQHandler -EIC_INTREQ_14_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_15_IRQHandler -EIC_INTREQ_15_IRQHandler: - b . - - .thumb_func - .weak FREQM_INTREQ_IRQHandler -FREQM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak NVMCTRL_INTREQ_0_IRQHandler -NVMCTRL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak NVMCTRL_INTREQ_1_IRQHandler -NVMCTRL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_0_IRQHandler -DMAC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_1_IRQHandler -DMAC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_2_IRQHandler -DMAC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_3_IRQHandler -DMAC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_4_IRQHandler -DMAC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_0_IRQHandler -EVSYS_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_1_IRQHandler -EVSYS_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_2_IRQHandler -EVSYS_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_3_IRQHandler -EVSYS_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_4_IRQHandler -EVSYS_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak PAC_INTREQ_IRQHandler -PAC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TAL_INTREQ_0_IRQHandler -TAL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TAL_INTREQ_1_IRQHandler -TAL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak RAMECC_INTREQ_IRQHandler -RAMECC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_0_IRQHandler -SERCOM0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_1_IRQHandler -SERCOM0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_2_IRQHandler -SERCOM0_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_3_IRQHandler -SERCOM0_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_0_IRQHandler -SERCOM1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_1_IRQHandler -SERCOM1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_2_IRQHandler -SERCOM1_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_3_IRQHandler -SERCOM1_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_0_IRQHandler -SERCOM2_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_1_IRQHandler -SERCOM2_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_2_IRQHandler -SERCOM2_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_3_IRQHandler -SERCOM2_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_0_IRQHandler -SERCOM3_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_1_IRQHandler -SERCOM3_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_2_IRQHandler -SERCOM3_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_3_IRQHandler -SERCOM3_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_0_IRQHandler -SERCOM4_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_1_IRQHandler -SERCOM4_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_2_IRQHandler -SERCOM4_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_3_IRQHandler -SERCOM4_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_0_IRQHandler -SERCOM5_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_1_IRQHandler -SERCOM5_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_2_IRQHandler -SERCOM5_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_3_IRQHandler -SERCOM5_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak CAN0_INTREQ_IRQHandler -CAN0_INTREQ_IRQHandler: - b . - - .thumb_func - .weak CAN1_INTREQ_IRQHandler -CAN1_INTREQ_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_0_IRQHandler -USB_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_1_IRQHandler -USB_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_2_IRQHandler -USB_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_3_IRQHandler -USB_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_0_IRQHandler -TCC0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_1_IRQHandler -TCC0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_2_IRQHandler -TCC0_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_3_IRQHandler -TCC0_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_4_IRQHandler -TCC0_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_5_IRQHandler -TCC0_INTREQ_5_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_6_IRQHandler -TCC0_INTREQ_6_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_0_IRQHandler -TCC1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_1_IRQHandler -TCC1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_2_IRQHandler -TCC1_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_3_IRQHandler -TCC1_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_4_IRQHandler -TCC1_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_0_IRQHandler -TCC2_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_1_IRQHandler -TCC2_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_2_IRQHandler -TCC2_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_3_IRQHandler -TCC2_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_0_IRQHandler -TCC3_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_1_IRQHandler -TCC3_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_2_IRQHandler -TCC3_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_0_IRQHandler -TCC4_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_1_IRQHandler -TCC4_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_2_IRQHandler -TCC4_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TC0_INTREQ_IRQHandler -TC0_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC1_INTREQ_IRQHandler -TC1_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC2_INTREQ_IRQHandler -TC2_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC3_INTREQ_IRQHandler -TC3_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC4_INTREQ_IRQHandler -TC4_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC5_INTREQ_IRQHandler -TC5_INTREQ_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_0_IRQHandler -PDEC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_1_IRQHandler -PDEC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_2_IRQHandler -PDEC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak ADC0_INTREQ_0_IRQHandler -ADC0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak ADC0_INTREQ_1_IRQHandler -ADC0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak ADC1_INTREQ_0_IRQHandler -ADC1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak ADC1_INTREQ_1_IRQHandler -ADC1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak AC_INTREQ_IRQHandler -AC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_0_IRQHandler -DAC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_1_IRQHandler -DAC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_2_IRQHandler -DAC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_3_IRQHandler -DAC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_4_IRQHandler -DAC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak I2S_INTREQ_IRQHandler -I2S_INTREQ_IRQHandler: - b . - - .thumb_func - .weak PCC_INTREQ_IRQHandler -PCC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak AES_INTREQ_IRQHandler -AES_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TRNG_INTREQ_IRQHandler -TRNG_INTREQ_IRQHandler: - b . - - .thumb_func - .weak ICM_INTREQ_IRQHandler -ICM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak QSPI_INTREQ_IRQHandler -QSPI_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SDHC0_INTREQ_IRQHandler -SDHC0_INTREQ_IRQHandler: - b . - -#endif - -/***************************************************************************** - * Vector Table * - *****************************************************************************/ - - .section .vectors, "ax" - .align 0 - .global _vectors - .extern __stack_end__ - .extern Reset_Handler - -_vectors: - .word __stack_end__ - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word SVC_Handler - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word PendSV_Handler - .word SysTick_Handler - .word PM_INTREQ_IRQHandler - .word MCLK_INTREQ_IRQHandler - .word OSCCTRL_INTREQ_0_IRQHandler - .word OSCCTRL_INTREQ_1_IRQHandler - .word OSCCTRL_INTREQ_2_IRQHandler - .word OSCCTRL_INTREQ_3_IRQHandler - .word OSCCTRL_INTREQ_4_IRQHandler - .word OSC32KCTRL_INTREQ_IRQHandler - .word SUPC_INTREQ_0_IRQHandler - .word SUPC_INTREQ_1_IRQHandler - .word WDT_INTREQ_IRQHandler - .word RTC_INTREQ_IRQHandler - .word EIC_INTREQ_0_IRQHandler - .word EIC_INTREQ_1_IRQHandler - .word EIC_INTREQ_2_IRQHandler - .word EIC_INTREQ_3_IRQHandler - .word EIC_INTREQ_4_IRQHandler - .word EIC_INTREQ_5_IRQHandler - .word EIC_INTREQ_6_IRQHandler - .word EIC_INTREQ_7_IRQHandler - .word EIC_INTREQ_8_IRQHandler - .word EIC_INTREQ_9_IRQHandler - .word EIC_INTREQ_10_IRQHandler - .word EIC_INTREQ_11_IRQHandler - .word EIC_INTREQ_12_IRQHandler - .word EIC_INTREQ_13_IRQHandler - .word EIC_INTREQ_14_IRQHandler - .word EIC_INTREQ_15_IRQHandler - .word FREQM_INTREQ_IRQHandler - .word NVMCTRL_INTREQ_0_IRQHandler - .word NVMCTRL_INTREQ_1_IRQHandler - .word DMAC_INTREQ_0_IRQHandler - .word DMAC_INTREQ_1_IRQHandler - .word DMAC_INTREQ_2_IRQHandler - .word DMAC_INTREQ_3_IRQHandler - .word DMAC_INTREQ_4_IRQHandler - .word EVSYS_INTREQ_0_IRQHandler - .word EVSYS_INTREQ_1_IRQHandler - .word EVSYS_INTREQ_2_IRQHandler - .word EVSYS_INTREQ_3_IRQHandler - .word EVSYS_INTREQ_4_IRQHandler - .word PAC_INTREQ_IRQHandler - .word TAL_INTREQ_0_IRQHandler - .word TAL_INTREQ_1_IRQHandler - .word Dummy_Handler /* Reserved */ - .word RAMECC_INTREQ_IRQHandler - .word SERCOM0_INTREQ_0_IRQHandler - .word SERCOM0_INTREQ_1_IRQHandler - .word SERCOM0_INTREQ_2_IRQHandler - .word SERCOM0_INTREQ_3_IRQHandler - .word SERCOM1_INTREQ_0_IRQHandler - .word SERCOM1_INTREQ_1_IRQHandler - .word SERCOM1_INTREQ_2_IRQHandler - .word SERCOM1_INTREQ_3_IRQHandler - .word SERCOM2_INTREQ_0_IRQHandler - .word SERCOM2_INTREQ_1_IRQHandler - .word SERCOM2_INTREQ_2_IRQHandler - .word SERCOM2_INTREQ_3_IRQHandler - .word SERCOM3_INTREQ_0_IRQHandler - .word SERCOM3_INTREQ_1_IRQHandler - .word SERCOM3_INTREQ_2_IRQHandler - .word SERCOM3_INTREQ_3_IRQHandler - .word SERCOM4_INTREQ_0_IRQHandler - .word SERCOM4_INTREQ_1_IRQHandler - .word SERCOM4_INTREQ_2_IRQHandler - .word SERCOM4_INTREQ_3_IRQHandler - .word SERCOM5_INTREQ_0_IRQHandler - .word SERCOM5_INTREQ_1_IRQHandler - .word SERCOM5_INTREQ_2_IRQHandler - .word SERCOM5_INTREQ_3_IRQHandler - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word CAN0_INTREQ_IRQHandler - .word CAN1_INTREQ_IRQHandler - .word USB_INTREQ_0_IRQHandler - .word USB_INTREQ_1_IRQHandler - .word USB_INTREQ_2_IRQHandler - .word USB_INTREQ_3_IRQHandler - .word Dummy_Handler /* Reserved */ - .word TCC0_INTREQ_0_IRQHandler - .word TCC0_INTREQ_1_IRQHandler - .word TCC0_INTREQ_2_IRQHandler - .word TCC0_INTREQ_3_IRQHandler - .word TCC0_INTREQ_4_IRQHandler - .word TCC0_INTREQ_5_IRQHandler - .word TCC0_INTREQ_6_IRQHandler - .word TCC1_INTREQ_0_IRQHandler - .word TCC1_INTREQ_1_IRQHandler - .word TCC1_INTREQ_2_IRQHandler - .word TCC1_INTREQ_3_IRQHandler - .word TCC1_INTREQ_4_IRQHandler - .word TCC2_INTREQ_0_IRQHandler - .word TCC2_INTREQ_1_IRQHandler - .word TCC2_INTREQ_2_IRQHandler - .word TCC2_INTREQ_3_IRQHandler - .word TCC3_INTREQ_0_IRQHandler - .word TCC3_INTREQ_1_IRQHandler - .word TCC3_INTREQ_2_IRQHandler - .word TCC4_INTREQ_0_IRQHandler - .word TCC4_INTREQ_1_IRQHandler - .word TCC4_INTREQ_2_IRQHandler - .word TC0_INTREQ_IRQHandler - .word TC1_INTREQ_IRQHandler - .word TC2_INTREQ_IRQHandler - .word TC3_INTREQ_IRQHandler - .word TC4_INTREQ_IRQHandler - .word TC5_INTREQ_IRQHandler - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word PDEC_INTREQ_0_IRQHandler - .word PDEC_INTREQ_1_IRQHandler - .word PDEC_INTREQ_2_IRQHandler - .word ADC0_INTREQ_0_IRQHandler - .word ADC0_INTREQ_1_IRQHandler - .word ADC1_INTREQ_0_IRQHandler - .word ADC1_INTREQ_1_IRQHandler - .word AC_INTREQ_IRQHandler - .word DAC_INTREQ_0_IRQHandler - .word DAC_INTREQ_1_IRQHandler - .word DAC_INTREQ_2_IRQHandler - .word DAC_INTREQ_3_IRQHandler - .word DAC_INTREQ_4_IRQHandler - .word I2S_INTREQ_IRQHandler - .word PCC_INTREQ_IRQHandler - .word AES_INTREQ_IRQHandler - .word TRNG_INTREQ_IRQHandler - .word ICM_INTREQ_IRQHandler - .word Dummy_Handler /* Reserved */ - .word QSPI_INTREQ_IRQHandler - .word SDHC0_INTREQ_IRQHandler -_vectors_end: - -#ifdef VECTORS_IN_RAM - .section .vectors_ram, "ax" - .align 0 - .global _vectors_ram - -_vectors_ram: - .space _vectors_end - _vectors, 0 -#endif diff --git a/examples/device/device_composite/ses/ses_samd51/SAME51_Startup.s b/examples/device/device_composite/ses/ses_samd51/SAMD51_Startup.s index 03bf54def..03bf54def 100644 --- a/examples/device/device_composite/ses/ses_samd51/SAME51_Startup.s +++ b/examples/device/device_composite/ses/ses_samd51/SAMD51_Startup.s diff --git a/examples/device/device_composite/ses/ses_samd51/SAME51_Target.js b/examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js index 20560af43..20560af43 100644 --- a/examples/device/device_composite/ses/ses_samd51/SAME51_Target.js +++ b/examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js |