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authorhathach <[email protected]>2025-12-31 18:01:50 +0700
committerhathach <[email protected]>2025-12-31 22:18:05 +0700
commit111247337c3911691acd7d218362460a6c0a2572 (patch)
treed8fdce1152ddde443ee9a5c0d6e565b822f33a87
parent9b5c7761cc6ea816cf35f330cb269030256be7ca (diff)
replace PMA buffer packet read/write by using tu_hwfifo API
-rw-r--r--src/common/tusb_fifo.c6
-rw-r--r--src/common/tusb_fifo.h4
-rw-r--r--src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c2
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_common.c67
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_common.h14
-rw-r--r--src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c16
6 files changed, 15 insertions, 94 deletions
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index a46bee955..8be137628 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -113,7 +113,7 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
// Pull & Push
// copy data to/from fifo without updating read/write pointers
//--------------------------------------------------------------------+
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO
+#if CFG_TUSB_FIFO_HWFIFO_API
#if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE == 4
#define stride_unaligned_write tu_unaligned_write32
#define stride_unaligned_read tu_unaligned_read32
@@ -183,7 +183,7 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
uint16_t wrap_bytes = n - lin_bytes;
uint8_t *ff_buf = f->buffer + wr_ptr;
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO
+#if CFG_TUSB_FIFO_HWFIFO_API
if (stride_mode) {
const volatile stride_item_t *hwfifo = (const volatile stride_item_t *)app_buf;
if (n <= lin_bytes) {
@@ -237,7 +237,7 @@ static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd
uint16_t wrap_bytes = n - lin_bytes; // only used if wrapped
const uint8_t *ff_buf = f->buffer + rd_ptr;
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO
+#if CFG_TUSB_FIFO_HWFIFO_API
if (stride_mode) {
volatile stride_item_t *hwfifo = (volatile stride_item_t *)app_buf;
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index f28f54749..b17f6a1d6 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -41,6 +41,8 @@ extern "C" {
// mutex is only needed for RTOS. For OS None, we don't get preempted
#define CFG_FIFO_MUTEX OSAL_MUTEX_REQUIRED
+#define CFG_TUSB_FIFO_HWFIFO_API (CFG_TUD_EDPT_DEDICATED_HWFIFO)
+
#ifndef CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
#define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 0
#endif
@@ -224,7 +226,6 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const
// CFG_TUSB_FIFO_ACCESS_DATA_STRIDE (data width) and CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE (address increment)
// Note: these usually has opposiite direction (read/write) to/from our software FIFO (tu_fifo_t)
//--------------------------------------------------------------------+
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO
TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_write_from_fifo(tu_fifo_t *f, void *hwfifo, uint16_t n) {
return tu_fifo_read_n_access_mode(f, hwfifo, n, true);
}
@@ -233,6 +234,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_read_to_fifo(tu_fifo_t *f
return tu_fifo_write_n_access_mode(f, hwfifo, n, true);
}
+#if CFG_TUSB_FIFO_HWFIFO_API
// read from hwfifo to buffer
void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len);
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cc2626383..dae921049 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -285,7 +285,7 @@ static void handle_ctr_setup(uint32_t ep_id) {
uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
- fsdev_read_packet_memory(setup_packet, rx_addr, rx_count);
+ tu_hwfifo_read(PMA_BUF_AT(rx_addr), setup_packet, rx_count);
// Clear CTR RX if another setup packet arrived before this, it will be discarded
ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 19f36b492..4f127ae86 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -69,73 +69,6 @@ void fsdev_deinit(void) {
}
}
-
-//--------------------------------------------------------------------+
-// PMA read/write
-//--------------------------------------------------------------------+
-
-// Write to packet memory area (PMA) from user memory
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
- if (nbytes == 0) {
- return true;
- }
- uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
-
- fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
- const uint8_t *src8 = src;
-
- while (n_write--) {
- pma_buf->value = fsdevbus_unaligned_read(src8);
- src8 += FSDEV_BUS_SIZE;
- pma_buf++;
- }
-
- // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
- uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
- if (odd) {
- fsdev_bus_t temp = 0;
- for(uint16_t i = 0; i < odd; i++) {
- temp |= *src8++ << (i * 8);
- }
- pma_buf->value = temp;
- }
-
- return true;
-}
-
-// Read from packet memory area (PMA) to user memory.
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
- if (nbytes == 0) {
- return true;
- }
- uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
-
- fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
- uint8_t *dst8 = (uint8_t *)dst;
-
- while (n_read--) {
- fsdevbus_unaligned_write(dst8, (fsdev_bus_t ) pma_buf->value);
- dst8 += FSDEV_BUS_SIZE;
- pma_buf++;
- }
-
- // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
- uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
- if (odd) {
- fsdev_bus_t temp = pma_buf->value;
- while (odd--) {
- *dst8++ = (uint8_t) (temp & 0xfful);
- temp >>= 8;
- }
- }
-
- return true;
-}
-
//--------------------------------------------------------------------+
// BTable Helper
//--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 4715f438f..69440aa32 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -323,20 +323,6 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_bloc
// Set RX buffer size
void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
-//--------------------------------------------------------------------+
-// PMA (Packet Memory Area) Access
-//--------------------------------------------------------------------+
-
-// Write to packet memory area (PMA) from user memory
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
-
-// Read from packet memory area (PMA) to user memory.
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
-
#ifdef __cplusplus
}
#endif
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index da9c6961c..480e460cb 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -303,10 +303,12 @@ static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
uint8_t ep_id = endpoint_find(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0));
- if (ep_id == TUSB_INDEX_INVALID_8) return;
+ if (ep_id == TUSB_INDEX_INVALID_8) {
+ return;
+ }
- hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
- hcd_channel_t* channel = &_hcd_data.channel[ch_id];
+ hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+ hcd_channel_t *channel = &_hcd_data.channel[ch_id];
if (dir == TUSB_DIR_OUT) {
// OUT/TX direction
@@ -314,7 +316,7 @@ static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
// More data to send
uint16_t const len = tu_min16(edpt->buflen - edpt->queued_len, edpt->max_packet_size);
uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_TX);
- fsdev_write_packet_memory(pma_addr, &(edpt->buffer[edpt->queued_len]), len);
+ tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len);
btable_set_count(ch_id, BTABLE_BUF_TX, len);
edpt->queued_len += len;
channel_write_status(ch_id, ch_reg, TUSB_DIR_OUT, EP_STAT_VALID, false);
@@ -329,8 +331,7 @@ static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
// IN/RX direction
uint16_t const rx_count = channel_get_rx_count(ch_id);
uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_RX);
-
- fsdev_read_packet_memory(edpt->buffer + edpt->queued_len, pma_addr, rx_count);
+ tu_hwfifo_read(PMA_BUF_AT(pma_addr), edpt->buffer + edpt->queued_len, rx_count);
edpt->queued_len += rx_count;
if ((rx_count < edpt->max_packet_size) || (edpt->queued_len >= edpt->buflen)) {
@@ -841,8 +842,7 @@ static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir) {
if (dir == TUSB_DIR_OUT) {
uint16_t const len = tu_min16(edpt->buflen - edpt->queued_len, edpt->max_packet_size);
-
- fsdev_write_packet_memory(pma_addr, &(edpt->buffer[edpt->queued_len]), len);
+ tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len);
btable_set_count(ch_id, BTABLE_BUF_TX, len);
edpt->queued_len += len;