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authorkkitayam <[email protected]>2021-03-05 01:38:49 +0900
committerkkitayam <[email protected]>2021-03-26 19:30:53 +0900
commit18be454011eb29652b9e740f33b5b5677d50e7b7 (patch)
treeb830cbc4dc95fd8a45fb79879c35ec0731e772d5
parentaa1a5a11c7729548957e5d8baf1c18ba7a333d14 (diff)
added board files
-rw-r--r--hw/bsp/gr_citrus/board.mk54
-rw-r--r--hw/bsp/gr_citrus/gr_citrus.c217
-rw-r--r--hw/bsp/gr_citrus/hwinit.c31
-rw-r--r--hw/bsp/gr_citrus/r5f5631fd.ld127
4 files changed, 429 insertions, 0 deletions
diff --git a/hw/bsp/gr_citrus/board.mk b/hw/bsp/gr_citrus/board.mk
new file mode 100644
index 000000000..8675d8530
--- /dev/null
+++ b/hw/bsp/gr_citrus/board.mk
@@ -0,0 +1,54 @@
+CFLAGS += \
+ -nostartfiles \
+ -nostdinc \
+ -ffunction-sections \
+ -fdata-sections \
+ -mcpu=rx610 \
+ -misa=v1 \
+ -mlittle-endian-data \
+ -DCFG_TUSB_MCU=OPT_MCU_RX63X
+
+# Cross Compiler for RX
+CROSS_COMPILE = rx-elf-
+
+ifeq ($(CMDEXE),1)
+OPTLIBINC="$(shell for /F "usebackq delims=" %%i in (`where rx-elf-gcc`) do echo %%~dpi..\rx-elf\optlibinc)"
+else
+OPTLIBINC=$(shell dirname `which rx-elf-gcc`)../rx-elf/optlibinc
+endif
+
+# mcu driver cause following warnings
+CFLAGS += -isystem $(OPTLIBINC)
+
+LIBS += -loptm -loptc
+
+MCU_DIR = hw/mcu/renesas/rx63n
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/$(BOARD)/r5f5631fd.ld
+
+SRC_C += \
+ $(MCU_DIR)/vects.c
+
+INC += \
+ $(TOP)/hw/bsp/$(BOARD) \
+ $(TOP)/$(MCU_DIR)
+
+SRC_S += $(MCU_DIR)/start.S
+
+# For TinyUSB port source
+VENDOR = renesas
+CHIP_FAMILY = usba
+
+# For freeRTOS port source
+FREERTOS_PORT = RX600
+
+# For flash-jlink target
+JLINK_DEVICE = R5F5631F
+JLINK_IF = JTAG
+
+# For flash-pyocd target
+PYOCD_TARGET =
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/gr_citrus/gr_citrus.c b/hw/bsp/gr_citrus/gr_citrus.c
new file mode 100644
index 000000000..3fa568cc0
--- /dev/null
+++ b/hw/bsp/gr_citrus/gr_citrus.c
@@ -0,0 +1,217 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Koji Kitayama
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+#include "iodefine.h"
+#include "interrupt_handlers.h"
+
+#define IRQ_PRIORITY_CMT0 5
+#define IRQ_PRIORITY_USBI0 5
+#define IRQ_PRIORITY_SCI0 5
+
+#define SYSTEM_PRCR_PRC1 (1<<1)
+#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
+
+#define CMT_PCLK 48000000
+#define CMT_CMCR_CKS_DIV_128 2
+#define CMT_CMCR_CMIE (1<<6)
+#define MPC_PFS_ISEL (1<<6)
+
+#define SCI_PCLK 48000000
+#define SCI_SSR_FER (1<<4)
+#define SCI_SSR_ORER (1<<5)
+
+#define SCI_SCR_TEIE (1u<<2)
+#define SCI_SCR_RE (1u<<4)
+#define SCI_SCR_TE (1u<<5)
+#define SCI_SCR_RIE (1u<<6)
+#define SCI_SCR_TIE (1u<<7)
+
+//--------------------------------------------------------------------+
+// SCI0 handling
+//--------------------------------------------------------------------+
+typedef struct {
+ uint8_t *buf;
+ uint32_t cnt;
+} sci_buf_t;
+static volatile sci_buf_t sci0_buf[2];
+
+void INT_Excep_SCI0_TXI0(void)
+{
+ uint8_t *buf = sci0_buf[0].buf;
+ uint32_t cnt = sci0_buf[0].cnt;
+
+ if (!buf || !cnt) {
+ SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
+ return;
+ }
+ SCI0.TDR = *buf;
+ if (--cnt) {
+ ++buf;
+ } else {
+ buf = NULL;
+ SCI0.SCR.BIT.TIE = 0;
+ SCI0.SCR.BIT.TEIE = 1;
+ }
+ sci0_buf[0].buf = buf;
+ sci0_buf[0].cnt = cnt;
+}
+
+void INT_Excep_SCI0_TEI0(void)
+{
+ SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
+}
+
+void INT_Excep_SCI0_RXI0(void)
+{
+ uint8_t *buf = sci0_buf[1].buf;
+ uint32_t cnt = sci0_buf[1].cnt;
+
+ if (!buf || !cnt ||
+ (SCI0.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
+ sci0_buf[1].buf = NULL;
+ SCI0.SSR.BYTE = 0;
+ SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
+ return;
+ }
+ *buf = SCI0.RDR;
+ if (--cnt) {
+ ++buf;
+ } else {
+ buf = NULL;
+ SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
+ }
+ sci0_buf[1].buf = buf;
+ sci0_buf[1].cnt = cnt;
+}
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void INT_Excep_USB0_USBI0(void)
+{
+ tud_int_handler(0);
+}
+
+void board_init(void)
+{
+#if CFG_TUSB_OS == OPT_OS_NONE
+ /* Enable CMT0 */
+ SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+ MSTP(CMT0) = 0;
+ SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+ /* Setup 1ms tick timer */
+ CMT0.CMCNT = 0;
+ CMT0.CMCOR = CMT_PCLK / 1000 / 128;
+ CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
+ IR(CMT0, CMI0) = 0;
+ IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
+ IEN(CMT0, CMI0) = 1;
+ CMT.CMSTR0.BIT.STR0 = 1;
+#endif
+
+ /* Unlock MPC registers */
+ MPC.PWPR.BIT.B0WI = 0;
+ MPC.PWPR.BIT.PFSWE = 1;
+ /* LED PA0 */
+ PORTA.PMR.BIT.B0 = 0U;
+ PORTA.PODR.BIT.B0 = 0U;
+ PORTA.PDR.BIT.B0 = 1U;
+ /* UART TXD0 => P20, RXD0 => P21 */
+ PORT2.PMR.BIT.B0 = 1U;
+ PORT2.PCR.BIT.B0 = 1U;
+ MPC.P20PFS.BYTE = 0b01010;
+ PORT2.PMR.BIT.B1 = 1U;
+ MPC.P21PFS.BYTE = 0b01010;
+ /* USB VBUS -> P16, RXD0 => P21, TXD0 => P20 */
+ PORT1.PMR.BIT.B6 = 1U;
+ MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001;
+ /* Lock MPC registers */
+ MPC.PWPR.BIT.PFSWE = 0;
+ MPC.PWPR.BIT.B0WI = 1;
+
+ IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
+
+ /* Enable SCI0 */
+ SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+ MSTP(SCI0) = 0;
+ SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+ SCI0.BRR = (SCI_PCLK / (32 * 115200)) - 1;
+ IR(SCI0, RXI0) = 0;
+ IR(SCI0, TXI0) = 0;
+ IR(SCI0, TEI0) = 0;
+ IPR(SCI0, RXI0) = IRQ_PRIORITY_SCI0;
+ IPR(SCI0, TXI0) = IRQ_PRIORITY_SCI0;
+ IPR(SCI0, TEI0) = IRQ_PRIORITY_SCI0;
+ IEN(SCI0, RXI0) = 1;
+ IEN(SCI0, TXI0) = 1;
+ IEN(SCI0, TEI0) = 1;
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+ PORTA.PODR.BIT.B0 = state ? 1 : 0;
+}
+
+uint32_t board_button_read(void)
+{
+ return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+ sci0_buf[1].buf = buf;
+ sci0_buf[1].cnt = len;
+ SCI0.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
+ while (SCI0.SCR.BIT.RE) ;
+ return len - sci0_buf[1].cnt;
+}
+
+int board_uart_write(void const *buf, int len)
+{
+ sci0_buf[0].buf = (uint8_t*)buf;
+ sci0_buf[0].cnt = len;
+ SCI0.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
+ while (SCI0.SCR.BIT.TE) ;
+ return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void INT_Excep_CMT0_CMI0(void)
+{
+ ++system_ticks;
+}
+
+uint32_t board_millis(void)
+{
+ return system_ticks;
+}
+#endif
diff --git a/hw/bsp/gr_citrus/hwinit.c b/hw/bsp/gr_citrus/hwinit.c
new file mode 100644
index 000000000..8245d7744
--- /dev/null
+++ b/hw/bsp/gr_citrus/hwinit.c
@@ -0,0 +1,31 @@
+/************************************************************************/
+/* File Version: V1.00 */
+/* Date Generated: 08/07/2013 */
+/************************************************************************/
+
+#include "iodefine.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+extern void HardwareSetup(void);
+#ifdef __cplusplus
+}
+#endif
+
+void HardwareSetup(void)
+{
+ SYSTEM.PRCR.WORD = 0xA503u;
+ SYSTEM.SOSCCR.BYTE = 0x01u;
+ SYSTEM.MOSCWTCR.BYTE = 0x0Du;
+ SYSTEM.PLLWTCR.BYTE = 0x0Eu;
+ SYSTEM.PLLCR.WORD = 0x0F00u;
+ SYSTEM.MOSCCR.BYTE = 0x00u;
+ SYSTEM.PLLCR2.BYTE = 0x00u;
+ for (unsigned i = 0; i < 2075u; ++i) __asm("nop");
+ SYSTEM.SCKCR.LONG = 0x21021211u;
+ SYSTEM.SCKCR2.WORD = 0x0033u;
+ SYSTEM.SCKCR3.WORD = 0x0400u;
+ SYSTEM.SYSCR0.WORD = 0x5A01;
+ SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
+ SYSTEM.PRCR.WORD = 0xA500u;
+}
diff --git a/hw/bsp/gr_citrus/r5f5631fd.ld b/hw/bsp/gr_citrus/r5f5631fd.ld
new file mode 100644
index 000000000..166a9e7c5
--- /dev/null
+++ b/hw/bsp/gr_citrus/r5f5631fd.ld
@@ -0,0 +1,127 @@
+__USTACK_SIZE = 0x00000200;
+__ISTACK_SIZE = 0x00000100;
+
+MEMORY
+{
+ RAM : ORIGIN = 0x4, LENGTH = 0x3fffc
+ ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000
+}
+SECTIONS
+{
+ .fvectors 0xFFFFFF80: AT(0xFFFFFF80)
+ {
+ KEEP(*(.fvectors))
+ } > ROM
+ .text 0xFFE00000: AT(0xFFE00000)
+ {
+ *(.text)
+ *(.text.*)
+ *(P)
+ etext = .;
+ } > ROM
+ .rvectors ALIGN(4):
+ {
+ _rvectors_start = .;
+ KEEP(*(.rvectors))
+ _rvectors_end = .;
+ } > ROM
+ .init :
+ {
+ KEEP(*(.init))
+ __preinit_array_start = .;
+ KEEP(*(.preinit_array))
+ __preinit_array_end = .;
+ __init_array_start = (. + 3) & ~ 3;
+ KEEP(*(.init_array))
+ KEEP(*(SORT(.init_array.*)))
+ __init_array_end = .;
+ __fini_array_start = .;
+ KEEP(*(.fini_array))
+ KEEP(*(SORT(.fini_array.*)))
+ __fini_array_end = .;
+ } > ROM
+ .fini :
+ {
+ KEEP(*(.fini))
+ } > ROM
+ .got :
+ {
+ *(.got)
+ *(.got.plt)
+ } > ROM
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata.*)
+ *(C_1)
+ *(C_2)
+ *(C)
+ _erodata = .;
+ } > ROM
+ .eh_frame_hdr :
+ {
+ *(.eh_frame_hdr)
+ } > ROM
+ .eh_frame :
+ {
+ *(.eh_frame)
+ } > ROM
+ .jcr :
+ {
+ *(.jcr)
+ } > ROM
+ .tors :
+ {
+ __CTOR_LIST__ = .;
+ . = ALIGN(2);
+ ___ctors = .;
+ *(.ctors)
+ ___ctors_end = .;
+ __CTOR_END__ = .;
+ __DTOR_LIST__ = .;
+ ___dtors = .;
+ *(.dtors)
+ ___dtors_end = .;
+ __DTOR_END__ = .;
+ . = ALIGN(2);
+ _mdata = .;
+ } > ROM
+ .data : AT(_mdata)
+ {
+ _data = .;
+ *(.data)
+ *(.data.*)
+ *(D)
+ *(D_1)
+ *(D_2)
+ _edata = .;
+ } > RAM
+ .gcc_exc :
+ {
+ *(.gcc_exc)
+ } > RAM
+ .bss :
+ {
+ _bss = .;
+ *(.bss)
+ *(.bss.**)
+ *(COMMON)
+ *(B)
+ *(B_1)
+ *(B_2)
+ _ebss = .;
+ _end = .;
+ } > RAM
+ .ustack (COPY) :
+ {
+ . = ALIGN(8);
+ . = . + __USTACK_SIZE;
+ PROVIDE(_ustack = .);
+ } > RAM
+ .istack (COPY) :
+ {
+ . = ALIGN(8);
+ . = . + __ISTACK_SIZE;
+ PROVIDE(_istack = .);
+ } > RAM
+}