diff options
| author | hathach <[email protected]> | 2019-05-15 11:34:40 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2019-05-15 11:34:40 +0700 |
| commit | 2582dfb3af270c4f0ed08336cb5fc88956c64076 (patch) | |
| tree | b352ab62990fb856132e4dc4837688e4c237d6de | |
| parent | 2e07a09b0d0a5a108b34597ee3624553b1a7e1cb (diff) | |
lpcxpresso 1769 build with makefile but not blinky yet
| -rw-r--r-- | hw/bsp/lpcxpresso1347/board.mk | 1 | ||||
| -rw-r--r-- | hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c | 5 | ||||
| -rw-r--r-- | hw/bsp/lpcxpresso1769/board.mk | 38 | ||||
| -rw-r--r-- | hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c | 57 | ||||
| -rw-r--r-- | hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c | 371 | ||||
| -rw-r--r-- | hw/bsp/lpcxpresso1769/lpc1769.ld | 184 |
6 files changed, 614 insertions, 42 deletions
diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index 09e4f4a4a..e87c4e7da 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -4,7 +4,6 @@ CFLAGS += \ -mcpu=cortex-m3 \ -nostdlib \ -DCORE_M3 \ - -D__VTOR_PRESENT=0 \ -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ -D__USE_LPCOPEN \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ diff --git a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c index f0b4c4226..d389eb798 100644 --- a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c +++ b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c @@ -30,9 +30,9 @@ #define LED_PORT 0 #define LED_PIN 7 -// Joytick UP if connected to LPCXpresso Base board +// Joytick Down if connected to LPCXpresso Base board #define BUTTON_PORT 1 -#define BUTTON_PIN 22 +#define BUTTON_PIN 20 //static const struct { // uint8_t port; @@ -103,6 +103,7 @@ void board_init(void) //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ + #if CFG_TUSB_OS == OPT_OS_NONE volatile uint32_t system_ticks = 0; void SysTick_Handler (void) diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk new file mode 100644 index 000000000..5ff1b2b9e --- /dev/null +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -0,0 +1,38 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -nostdlib \ + -DCORE_M3 \ + -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \ + -D__USE_LPCOPEN \ + -DRTC_EV_SUPPORT=0 + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld + +SRC_C += \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/chip_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/clock_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/uart_17xx_40xx.c + +INC += \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = lpc17_40 + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM3 + +# For flash-jlink target +JLINK_DEVICE = LPC1769 +JLINK_IF = swd + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c index d0c59e089..46cd22908 100644 --- a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c @@ -30,6 +30,10 @@ #define LED_PORT 0 #define LED_PIN 22 +// Joytick Down if connected to LPCXpresso Base board +#define BUTTON_PORT 0 +#define BUTTON_PIN 15 + #define BOARD_UART_PORT LPC_UART3 /* System oscillator rate and RTC oscillator rate */ @@ -60,20 +64,18 @@ static const PINMUX_GRP_T pin_usb_mux[] = {1, 19, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PPWR {1, 22, IOCON_MODE_INACT | IOCON_FUNC2}, // USB_PWRD - /* VBUS is not connected on this board, so leave the pin at default setting. */ - /*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */ -}; - -enum { - BOARD_BUTTON_COUNT = 5 + /* VBUS is not connected on this board, so leave the pin at default setting. */ + /*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */ }; // Invoked by startup code void SystemInit(void) { - /* Enable IOCON clock */ Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); Chip_SetupXtalClocking(); + + /* Setup FLASH access to 4 clocks (100MHz clock) */ +// Chip_SYSCTL_SetFLASHAccess(FLASHTIM_100MHZ_CPU); } void board_init(void) @@ -90,11 +92,11 @@ void board_init(void) Chip_GPIO_Init(LPC_GPIO); - //------------- LED -------------// + // LED Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); - //------------- BUTTON -------------// -// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIO_SetDir(buttons[i].port, TU_BIT(buttons[i].pin), 0); + // Button + Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); #if 0 //------------- UART -------------// @@ -142,13 +144,12 @@ void board_init(void) Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T)); } -/*------------------------------------------------------------------*/ -/* TUSB HAL MILLISECOND - *------------------------------------------------------------------*/ -#if CFG_TUSB_OS == OPT_OS_NONE +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ +#if CFG_TUSB_OS == OPT_OS_NONE volatile uint32_t system_ticks = 0; - void SysTick_Handler (void) { system_ticks++; @@ -158,47 +159,25 @@ uint32_t board_millis(void) { return system_ticks; } - #endif -//--------------------------------------------------------------------+ -// LEDS -//--------------------------------------------------------------------+ void board_led_write(bool state) { Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state); } -//--------------------------------------------------------------------+ -// BUTTONS -//--------------------------------------------------------------------+ -#if 0 -static bool button_read(uint8_t id) -{ -// return !tu_bit_test( GPIO_ReadValue(buttons[id].port), buttons[id].pin ); // button is active low - return false; -} -#endif - uint32_t board_button_read(void) { - uint32_t result = 0; - -// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? TU_BIT(i) : 0); - - return result; + // active low + return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1; } -//--------------------------------------------------------------------+ -// UART -//--------------------------------------------------------------------+ int board_uart_read(uint8_t* buf, int len) { // return UART_ReceiveByte(BOARD_UART_PORT); (void) buf; (void) len; return 0; - } int board_uart_write(void const * buf, int len) diff --git a/hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c b/hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c new file mode 100644 index 000000000..86ef7c879 --- /dev/null +++ b/hw/bsp/lpcxpresso1769/cr_startup_lpc175x_6x.c @@ -0,0 +1,371 @@ +//***************************************************************************** +// LPC175x_6x Microcontroller Startup code for use with LPCXpresso IDE +// +// Version : 140114 +//***************************************************************************** +// +// Copyright(C) NXP Semiconductors, 2014 +// All rights reserved. +// +// Software that is described herein is for illustrative purposes only +// which provides customers with programming information regarding the +// LPC products. This software is supplied "AS IS" without any warranties of +// any kind, and NXP Semiconductors and its licensor disclaim any and +// all warranties, express or implied, including all implied warranties of +// merchantability, fitness for a particular purpose and non-infringement of +// intellectual property rights. NXP Semiconductors assumes no responsibility +// or liability for the use of the software, conveys no license or rights under any +// patent, copyright, mask work right, or any other intellectual property rights in +// or to any products. NXP Semiconductors reserves the right to make changes +// in the software without notification. NXP Semiconductors also makes no +// representation or warranty that such application will be suitable for the +// specified use without further testing or modification. +// +// Permission to use, copy, modify, and distribute this software and its +// documentation is hereby granted, under NXP Semiconductors' and its +// licensor's relevant copyrights in the software, without fee, provided that it +// is used in conjunction with NXP Semiconductors microcontrollers. This +// copyright, permission, and disclaimer notice must appear in all copies of +// this code. +//***************************************************************************** + +#if defined (__cplusplus) +#ifdef __REDLIB__ +#error Redlib does not support C++ +#else +//***************************************************************************** +// +// The entry point for the C++ library startup +// +//***************************************************************************** +extern "C" { + extern void __libc_init_array(void); +} +#endif +#endif + +#define WEAK __attribute__ ((weak)) +#define ALIAS(f) __attribute__ ((weak, alias (#f))) + +//***************************************************************************** +#if defined (__cplusplus) +extern "C" { +#endif + +//***************************************************************************** +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) +// Declaration of external SystemInit function +extern void SystemInit(void); +#endif + +//***************************************************************************** +// +// Forward declaration of the default handlers. These are aliased. +// When the application defines a handler (with the same name), this will +// automatically take precedence over these weak definitions +// +//***************************************************************************** + void ResetISR(void); +WEAK void NMI_Handler(void); +WEAK void HardFault_Handler(void); +WEAK void MemManage_Handler(void); +WEAK void BusFault_Handler(void); +WEAK void UsageFault_Handler(void); +WEAK void SVC_Handler(void); +WEAK void DebugMon_Handler(void); +WEAK void PendSV_Handler(void); +WEAK void SysTick_Handler(void); +WEAK void IntDefaultHandler(void); + +//***************************************************************************** +// +// Forward declaration of the specific IRQ handlers. These are aliased +// to the IntDefaultHandler, which is a 'forever' loop. When the application +// defines a handler (with the same name), this will automatically take +// precedence over these weak definitions +// +//***************************************************************************** +void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); +void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); +void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); +void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); +void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); +void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler); +void SPI_IRQHandler(void) ALIAS(IntDefaultHandler); +void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); +void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); +void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler); +void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); +void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler); +void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler); +void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler); +void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler); +void ADC_IRQHandler(void) ALIAS(IntDefaultHandler); +void BOD_IRQHandler(void) ALIAS(IntDefaultHandler); +void USB_IRQHandler(void) ALIAS(IntDefaultHandler); +void CAN_IRQHandler(void) ALIAS(IntDefaultHandler); +void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2S_IRQHandler(void) ALIAS(IntDefaultHandler); +#if defined (__USE_LPCOPEN) +void ETH_IRQHandler(void) ALIAS(IntDefaultHandler); +#else +void ENET_IRQHandler(void) ALIAS(IntDefaultHandler); +#endif +void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); +void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); +void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); +void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler); +void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler); +void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler); + +//***************************************************************************** +// +// The entry point for the application. +// __main() is the entry point for Redlib based applications +// main() is the entry point for Newlib based applications +// +//***************************************************************************** +#if defined (__REDLIB__) +extern void __main(void); +#endif +extern int main(void); +//***************************************************************************** +// +// External declaration for the pointer to the stack top from the Linker Script +// +//***************************************************************************** +extern void _vStackTop(void); + +//***************************************************************************** +#if defined (__cplusplus) +} // extern "C" +#endif +//***************************************************************************** +// +// The vector table. +// This relies on the linker script to place at correct location in memory. +// +//***************************************************************************** +extern void (* const g_pfnVectors[])(void); +__attribute__ ((section(".isr_vector"))) __attribute__ ((used)) +void (* const g_pfnVectors[])(void) = { + // Core Level - CM3 + &_vStackTop, // The initial stack pointer + ResetISR, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + MemManage_Handler, // The MPU fault handler + BusFault_Handler, // The bus fault handler + UsageFault_Handler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + DebugMon_Handler, // Debug monitor handler + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // Chip Level - LPC17 + WDT_IRQHandler, // 16, 0x40 - WDT + TIMER0_IRQHandler, // 17, 0x44 - TIMER0 + TIMER1_IRQHandler, // 18, 0x48 - TIMER1 + TIMER2_IRQHandler, // 19, 0x4c - TIMER2 + TIMER3_IRQHandler, // 20, 0x50 - TIMER3 + UART0_IRQHandler, // 21, 0x54 - UART0 + UART1_IRQHandler, // 22, 0x58 - UART1 + UART2_IRQHandler, // 23, 0x5c - UART2 + UART3_IRQHandler, // 24, 0x60 - UART3 + PWM1_IRQHandler, // 25, 0x64 - PWM1 + I2C0_IRQHandler, // 26, 0x68 - I2C0 + I2C1_IRQHandler, // 27, 0x6c - I2C1 + I2C2_IRQHandler, // 28, 0x70 - I2C2 + SPI_IRQHandler, // 29, 0x74 - SPI + SSP0_IRQHandler, // 30, 0x78 - SSP0 + SSP1_IRQHandler, // 31, 0x7c - SSP1 + PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL) + RTC_IRQHandler, // 33, 0x84 - RTC + EINT0_IRQHandler, // 34, 0x88 - EINT0 + EINT1_IRQHandler, // 35, 0x8c - EINT1 + EINT2_IRQHandler, // 36, 0x90 - EINT2 + EINT3_IRQHandler, // 37, 0x94 - EINT3 + ADC_IRQHandler, // 38, 0x98 - ADC + BOD_IRQHandler, // 39, 0x9c - BOD + USB_IRQHandler, // 40, 0xA0 - USB + CAN_IRQHandler, // 41, 0xa4 - CAN + DMA_IRQHandler, // 42, 0xa8 - GP DMA + I2S_IRQHandler, // 43, 0xac - I2S +#if defined (__USE_LPCOPEN) + ETH_IRQHandler, // 44, 0xb0 - Ethernet +#else + ENET_IRQHandler, // 44, 0xb0 - Ethernet +#endif + RIT_IRQHandler, // 45, 0xb4 - RITINT + MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM + QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder + PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL) + USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup + CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup +}; + +//***************************************************************************** +// Functions to carry out the initialization of RW and BSS data sections. These +// are written as separate functions rather than being inlined within the +// ResetISR() function in order to cope with MCUs with multiple banks of +// memory. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void data_init(unsigned int romstart, unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int *pulSrc = (unsigned int*) romstart; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = *pulSrc++; +} + +__attribute__ ((section(".after_vectors"))) +void bss_init(unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = 0; +} + +//***************************************************************************** +// The following symbols are constructs generated by the linker, indicating +// the location of various points in the "Global Section Table". This table is +// created by the linker via the Code Red managed linker script mechanism. It +// contains the load address, execution address and length of each RW data +// section and the execution and length of each BSS (zero initialized) section. +//***************************************************************************** +extern unsigned int __data_section_table; +extern unsigned int __data_section_table_end; +extern unsigned int __bss_section_table; +extern unsigned int __bss_section_table_end; + +//***************************************************************************** +// Reset entry point for your code. +// Sets up a simple runtime environment and initializes the C/C++ +// library. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void +ResetISR(void) { + + // + // Copy the data sections from flash to SRAM. + // + unsigned int LoadAddr, ExeAddr, SectionLen; + unsigned int *SectionTableAddr; + + // Load base address of Global Section Table + SectionTableAddr = &__data_section_table; + + // Copy the data sections from flash to SRAM. + while (SectionTableAddr < &__data_section_table_end) { + LoadAddr = *SectionTableAddr++; + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + data_init(LoadAddr, ExeAddr, SectionLen); + } + // At this point, SectionTableAddr = &__bss_section_table; + // Zero fill the bss segment + while (SectionTableAddr < &__bss_section_table_end) { + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + bss_init(ExeAddr, SectionLen); + } + +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) + SystemInit(); +#endif + +#if defined (__cplusplus) + // + // Call C++ library initialisation + // + __libc_init_array(); +#endif + +#if defined (__REDLIB__) + // Call the Redlib library, which in turn calls main() + __main() ; +#else + main(); +#endif + + // + // main() shouldn't return, but if it does, we'll just enter an infinite loop + // + while (1) { + ; + } +} + +//***************************************************************************** +// Default exception handlers. Override the ones here by defining your own +// handler routines in your application code. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void NMI_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void HardFault_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void MemManage_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void BusFault_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void UsageFault_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void SVC_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void DebugMon_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void PendSV_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void SysTick_Handler(void) +{ while(1) {} +} + +//***************************************************************************** +// +// Processor ends up here if an unexpected interrupt occurs or a specific +// handler is not present in the application code. +// +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void IntDefaultHandler(void) +{ while(1) {} +} diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpcxpresso1769/lpc1769.ld new file mode 100644 index 000000000..d1c83d8e2 --- /dev/null +++ b/hw/bsp/lpcxpresso1769/lpc1769.ld @@ -0,0 +1,184 @@ +/* + * GENERATED FILE - DO NOT EDIT + * (c) Code Red Technologies Ltd, 2008-2013 + * (c) NXP Semiconductors 2013-2019 + * Generated linker script file for LPC1769 + * Created from linkscript.ldt by FMCreateLinkLibraries + * Using Freemarker v2.3.23 + * MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 6:39:29 PM + */ + +MEMORY +{ + /* Define each memory region */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ +} + + /* Define a symbol for the top of each memory region */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ + __base_RAM2 = 0x2007c000 ; /* RAM2 */ + __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + +ENTRY(ResetISR) + +SECTIONS +{ + /* MAIN TEXT SECTION */ + .text : ALIGN(4) + { + FILL(0xff) + __vectors_start__ = ABSOLUTE(.) ; + KEEP(*(.isr_vector)) + /* Global Section Table */ + . = ALIGN(4) ; + __section_table_start = .; + __data_section_table = .; + LONG(LOADADDR(.data)); + LONG( ADDR(.data)); + LONG( SIZEOF(.data)); + LONG(LOADADDR(.data_RAM2)); + LONG( ADDR(.data_RAM2)); + LONG( SIZEOF(.data_RAM2)); + __data_section_table_end = .; + __bss_section_table = .; + LONG( ADDR(.bss)); + LONG( SIZEOF(.bss)); + LONG( ADDR(.bss_RAM2)); + LONG( SIZEOF(.bss_RAM2)); + __bss_section_table_end = .; + __section_table_end = . ; + /* End of Global Section Table */ + + *(.after_vectors*) + + } > MFlash512 + + .text : ALIGN(4) + { + *(.text*) + *(.rodata .rodata.* .constdata .constdata.*) + . = ALIGN(4); + } > MFlash512 + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > MFlash512 + + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > MFlash512 + __exidx_end = .; + + _etext = .; + + /* DATA section for RamAHB32 */ + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM2 = .) ; + *(.ramfunc.$RAM2) + *(.ramfunc.$RamAHB32) + *(.data.$RAM2*) + *(.data.$RamAHB32*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM2 = .) ; + } > RamAHB32 AT>MFlash512 + /* MAIN DATA SECTION */ + .uninit_RESERVED : ALIGN(4) + { + KEEP(*(.bss.$RESERVED*)) + . = ALIGN(4) ; + _end_uninit_RESERVED = .; + } > RamLoc32 + + /* Main DATA section (RamLoc32) */ + .data : ALIGN(4) + { + FILL(0xff) + _data = . ; + *(vtable) + *(.ramfunc*) + *(.data*) + . = ALIGN(4) ; + _edata = . ; + } > RamLoc32 AT>MFlash512 + + /* BSS section for RamAHB32 */ + .bss_RAM2 : ALIGN(4) + { + PROVIDE(__start_bss_RAM2 = .) ; + *(.bss.$RAM2*) + *(.bss.$RamAHB32*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM2 = .) ; + } > RamAHB32 + + /* MAIN BSS SECTION */ + .bss : ALIGN(4) + { + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > RamLoc32 + + /* NOINIT section for RamAHB32 */ + .noinit_RAM2 (NOLOAD) : ALIGN(4) + { + *(.noinit.$RAM2*) + *(.noinit.$RamAHB32*) + . = ALIGN(4) ; + } > RamAHB32 + + /* DEFAULT NOINIT SECTION */ + .noinit (NOLOAD): ALIGN(4) + { + _noinit = .; + *(.noinit*) + . = ALIGN(4) ; + _end_noinit = .; + } > RamLoc32 + PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); + PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); + + /* ## Create checksum value (used in startup) ## */ + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ + ) ); + + /* Provide basic symbols giving location and size of main text + * block, including initial values of RW data sections. Note that + * these will need extending to give a complete picture with + * complex images (e.g multiple Flash banks). + */ + _image_start = LOADADDR(.text); + _image_end = LOADADDR(.data) + SIZEOF(.data); + _image_size = _image_end - _image_start; +}
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