hw/h7rs: Enable D-Cache in BSP

Signed-off-by: HiFiPhile <[email protected]>

3 files changed, 14 insertions, 0 deletions

diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 5f63834d0..b82ab7d51 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -78,6 +78,11 @@ void OTG_HS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 
 void board_init(void) {
+  SCB_EnableICache();
+  SCB_EnableDCache();
+
+  HAL_Init();
+
   board_clock_init();
 
   // Enable All GPIOs clocks
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index f8723b0c7..23bfcb90e 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -98,6 +98,11 @@ static void trace_etm_init(void) {
 #endif
 
 void board_init(void) {
+  SCB_EnableICache();
+  SCB_EnableDCache();
+
+  HAL_Init();
+
   // Implemented in board.h
   SystemClock_Config();
 
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 4b81deea0..b6b2d70e9 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -124,9 +124,13 @@ void log_swo_init(void)
 #endif
 
 void board_init(void) {
+  SCB_EnableICache();
+  SCB_EnableDCache();
+
   HAL_Init();
 
   HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+
   // Implemented in board.h
   SystemClock_Config();