update qspi

2 files changed, 28 insertions, 32 deletions

diff --git a/examples/device/nrf52840/src/msc_flash_qspi.c b/examples/device/nrf52840/src/msc_flash_qspi.c
index c2cca9b20..d8058d8ac 100644
--- a/examples/device/nrf52840/src/msc_flash_qspi.c
+++ b/examples/device/nrf52840/src/msc_flash_qspi.c
@@ -68,28 +68,24 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
 {
   uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
 
+  switch ( _fl_state )
+  {
+    case FLASH_STATE_IDLE:
+      _fl_state = FLASH_STATE_BUSY;
+      flash_read(buffer, addr, bufsize);
+      return 0;    // data not ready
 
-//  switch ( _fl_state )
-//  {
-//    case FLASH_STATE_IDLE:
-//      _fl_state = FLASH_STATE_BUSY;
-//      flash_read(buffer, addr, bufsize);
-//      return 0;  // data not ready
-//
-//    case FLASH_STATE_BUSY:
-//      return 0;  // data not ready
-//
-//    case FLASH_STATE_COMPLETE:
-//      _fl_state = FLASH_STATE_IDLE;
-//      return bufsize;
-//
-//    default:
-//      _fl_state = FLASH_STATE_IDLE;
-//      return -1;
-//  }
+    case FLASH_STATE_BUSY:
+      return 0;    // data not ready
 
-  flash_read(buffer, addr, bufsize);
-  return bufsize;
+    case FLASH_STATE_COMPLETE:
+      _fl_state = FLASH_STATE_IDLE;
+      return bufsize;
+
+    default:
+      _fl_state = FLASH_STATE_IDLE;
+      return -1;
+  }
 }
 
 // Callback invoked when received WRITE10 command.
@@ -128,16 +124,16 @@ void flash_flush (void)
   if ( _fl_addr == NO_CACHE ) return;
 
   TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, _fl_addr),);
-//  while ( _fl_state != FLASH_STATE_COMPLETE )
-//  {
-//  }
-//  _fl_state = FLASH_STATE_IDLE;
+  while ( _fl_state != FLASH_STATE_COMPLETE )
+  {
+  }
+  _fl_state = FLASH_STATE_IDLE;
 
   TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_write(_fl_buf, FLASH_PAGE_SIZE, _fl_addr),);
-//  while ( _fl_state != FLASH_STATE_COMPLETE )
-//  {
-//  }
-//  _fl_state = FLASH_STATE_IDLE;
+  while ( _fl_state != FLASH_STATE_COMPLETE )
+  {
+  }
+  _fl_state = FLASH_STATE_IDLE;
 
   _fl_addr = NO_CACHE;
 }
@@ -153,6 +149,7 @@ void flash_write (uint32_t dst, const void *src, int len)
 
     flash_read(_fl_buf, newAddr, FLASH_PAGE_SIZE);
   }
+
   memcpy(_fl_buf + (dst & (FLASH_PAGE_SIZE - 1)), src, len);
 }
 
diff --git a/hw/bsp/pca10056/board_pca10056.c b/hw/bsp/pca10056/board_pca10056.c
index 45078a98f..74ae961a4 100644
--- a/hw/bsp/pca10056/board_pca10056.c
+++ b/hw/bsp/pca10056/board_pca10056.c
@@ -127,12 +127,12 @@ void board_init(void)
     },
     .prot_if = {
       .readoc    = NRF_QSPI_READOC_READ4IO,
-      .writeoc   = NRF_QSPI_WRITEOC_PP,
+      .writeoc = NRF_QSPI_WRITEOC_PP4IO,
       .addrmode  = NRF_QSPI_ADDRMODE_24BIT,
       .dpmconfig = false,  // deep power down
     },
     .phy_if = {
-      .sck_freq  = NRF_QSPI_FREQ_32MDIV4,
+      .sck_freq = NRF_QSPI_FREQ_32MDIV1,
       .sck_delay = 1,
       .spi_mode  = NRF_QSPI_MODE_0,
       .dpmen     = false
@@ -140,8 +140,7 @@ void board_init(void)
     .irq_priority   = 7,
   };
 
-  nrfx_qspi_init(&qspi_cfg, NULL, NULL);
-//  nrfx_qspi_init(&qspi_cfg, qflash_hdl, NULL);
+  nrfx_qspi_init(&qspi_cfg, qflash_hdl, NULL);
 
   nrf_qspi_cinstr_conf_t cinstr_cfg = {
     .opcode    = 0,