diff options
| author | Jerzy Kasenberg <[email protected]> | 2020-05-06 14:34:40 +0200 |
|---|---|---|
| committer | Jerzy Kasenberg <[email protected]> | 2020-05-06 15:13:55 +0200 |
| commit | 615369a6eb28c9203d33549c8b944d35539de1b9 (patch) | |
| tree | 6304b5b0b6e1db79b17da8dcb99e1a32dc1f71ef | |
| parent | d9e534f6f274d0d8b02a6258a55d6178517bd5fa (diff) | |
stm32l476disco: Fix system clock setup
Code suggested that PLL with MSI is used resulting in 80MHz clock.
When in fact PLL was not configured and system clock was left at MSI 48MHz.
This happens because PLL configuration requires that SysTick interrupt
has interrupt priority level configured correctly.
As it seems ST code intentionally setups variable uwTickPrio to invalid
value and later when it is not setup by user code configuration
of oscillator will fail before PLL is configured.
This simple changes systick priority to some valid value that
allows clock to use PLL.
| -rw-r--r-- | hw/bsp/stm32l476disco/stm32l476disco.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/bsp/stm32l476disco/stm32l476disco.c b/hw/bsp/stm32l476disco/stm32l476disco.c index 3ecfc90a6..b18846685 100644 --- a/hw/bsp/stm32l476disco/stm32l476disco.c +++ b/hw/bsp/stm32l476disco/stm32l476disco.c @@ -95,6 +95,10 @@ static void SystemClock_Config(void) /* Enable the CSS interrupt in case LSE signal is corrupted or not present */ HAL_RCCEx_DisableLSECSS(); + /* Set tick interrupt priority, default HAL value is intentionally invalid + and that prevents PLL initialization in HAL_RCC_OscConfig() */ + HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); + /* Enable MSI Oscillator and activate PLL with MSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.MSIState = RCC_MSI_ON; |
