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authorhathach <[email protected]>2023-06-01 16:52:58 +0700
committerhathach <[email protected]>2023-06-01 16:52:58 +0700
commit6280cba6e8fb62492d8d07288c914b822b934cd5 (patch)
tree7bb7e0b18a14315ffaecbe1331010d32d645f8bd
parent6b44d8fb55345e19fd82a6169258fbf357a15f81 (diff)
tested with g0b1 nucleo
-rw-r--r--hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h58
1 files changed, 57 insertions, 1 deletions
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index e622c71c2..44c69934d 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -58,6 +58,62 @@
//--------------------------------------------------------------------+
// RCC Clock
//--------------------------------------------------------------------+
+#if 1
+static inline void board_clock_init(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure. */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ /** Initializes the CPU, AHB and APB buses clocks */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+ // Configure CRS clock source
+ __HAL_RCC_CRS_CLK_ENABLE();
+ RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+ RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+ RCC_CRSInitStruct.ErrorLimitValue = 34;
+ RCC_CRSInitStruct.HSI48CalibrationValue = 32;
+
+ HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+
+ /* Select HSI48 as USB clock source */
+ RCC_PeriphCLKInitTypeDef usb_clk = {0 };
+ usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ HAL_RCCEx_PeriphCLKConfig(&usb_clk);
+
+ // Enable HSI48
+ RCC_OscInitTypeDef osc_hsi48 = {0};
+ osc_hsi48.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+ osc_hsi48.HSI48State = RCC_HSI48_ON;
+ HAL_RCC_OscConfig(&osc_hsi48);
+}
+#else
static inline void board_clock_init(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -93,8 +149,8 @@ static inline void board_clock_init(void)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
}
+#endif
#ifdef __cplusplus
}