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authorhathach <[email protected]>2025-10-15 00:32:55 +0700
committerhathach <[email protected]>2025-10-15 00:33:04 +0700
commit6a1117a8d85a6c029808a22ae53be1387ff2ce92 (patch)
treec3cf46770e75cdc5a125a3396da4034a3eb1ffe8
parent2a8811ebb0213297dedb34c33f29c9035a516600 (diff)
refactor sltb009a to family efm32
-rw-r--r--hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h150
-rw-r--r--hw/bsp/efm32/boards/sltb009a/board.cmake8
-rw-r--r--hw/bsp/efm32/boards/sltb009a/board.h49
-rw-r--r--hw/bsp/efm32/boards/sltb009a/board.mk9
-rw-r--r--hw/bsp/efm32/family.c (renamed from hw/bsp/sltb009a/sltb009a.c)36
-rw-r--r--hw/bsp/efm32/family.cmake107
-rw-r--r--hw/bsp/efm32/family.mk (renamed from hw/bsp/sltb009a/board.mk)23
7 files changed, 346 insertions, 36 deletions
diff --git a/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..0b3e7cd2d
--- /dev/null
+++ b/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+ #include "em_device.h"
+#endif
+
+/* Cortex-M4F port configuration. */
+#define configENABLE_MPU 0
+#define configENABLE_FPU 1
+#define configENABLE_TRUSTZONE 0
+#define configMINIMAL_SECURE_STACK_SIZE (1024)
+
+#define configUSE_PREEMPTION 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ SystemCoreClock
+#define configTICK_RATE_HZ ( 1000 )
+#define configMAX_PRIORITIES ( 5 )
+#define configMINIMAL_STACK_SIZE ( 128 )
+#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*8*1024 )
+#define configMAX_TASK_NAME_LEN 16
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_MUTEXES 1
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configQUEUE_REGISTRY_SIZE 4
+#define configUSE_QUEUE_SETS 0
+#define configUSE_TIME_SLICING 0
+#define configUSE_NEWLIB_REENTRANT 0
+#define configENABLE_BACKWARD_COMPATIBILITY 1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
+
+#define configSUPPORT_STATIC_ALLOCATION 1
+#define configSUPPORT_DYNAMIC_ALLOCATION 0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW 2
+#define configCHECK_HANDLER_INSTALLATION 0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define configRECORD_STACK_HIGH_ADDRESS 1
+#define configUSE_TRACE_FACILITY 1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES 2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH 32
+#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet 0
+#define INCLUDE_uxTaskPriorityGet 0
+#define INCLUDE_vTaskDelete 0
+#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR 0
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 0
+#define INCLUDE_xTaskGetCurrentTaskHandle 1
+#define INCLUDE_uxTaskGetStackHighWaterMark 0
+#define INCLUDE_xTaskGetIdleTaskHandle 0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName 0
+#define INCLUDE_eTaskGetState 0
+#define INCLUDE_xEventGroupSetBitFromISR 0
+#define INCLUDE_xTimerPendFunctionCall 0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+#define vPortSVCHandler SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// EFM32GG12B has 3 priority bits
+#define configPRIO_BITS 3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/efm32/boards/sltb009a/board.cmake b/hw/bsp/efm32/boards/sltb009a/board.cmake
new file mode 100644
index 000000000..7a84950b6
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.cmake
@@ -0,0 +1,8 @@
+set(EFM32_FAMILY efm32gg12b)
+set(EFM32_MCU EFM32GG12B810F1024GM64)
+set(JLINK_DEVICE ${EFM32_MCU})
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC
+ )
+endfunction()
diff --git a/hw/bsp/efm32/boards/sltb009a/board.h b/hw/bsp/efm32/boards/sltb009a/board.h
new file mode 100644
index 000000000..8ed6abe9f
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.h
@@ -0,0 +1,49 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Rafael Silva (@perigoso)
+ * Copyright (c) 2021 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT 0 // A
+#define LED_PIN_R 12 // 12
+#define LED_PIN_B 13 // 13
+#define LED_PIN_G 14 // 14
+#define LED_STATE_ON 0 // active-low
+
+#define BUTTON_PORT 3 // D
+#define BUTTON_PIN 5 // 5
+#define BUTTON_STATE_ACTIVE 0 // active-low
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/efm32/boards/sltb009a/board.mk b/hw/bsp/efm32/boards/sltb009a/board.mk
new file mode 100644
index 000000000..4b3e2a4e5
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.mk
@@ -0,0 +1,9 @@
+EFM32_FAMILY = efm32gg12b
+EFM32_MCU = EFM32GG12B810F1024GM64
+JLINK_DEVICE = $(EFM32_MCU)
+
+CFLAGS += \
+ -D$(EFM32_MCU) \
+
+# For flash-jlink target
+flash: flash-jlink
diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/efm32/family.c
index 23ef6d7cd..39166bc4d 100644
--- a/hw/bsp/sltb009a/sltb009a.c
+++ b/hw/bsp/efm32/family.c
@@ -25,7 +25,8 @@
* This file is part of the TinyUSB stack.
*/
-#include "../board_api.h"
+#include "bsp/board_api.h"
+#include "board.h"
#include "em_device.h"
@@ -33,16 +34,6 @@
/* MACRO TYPEDEF CONSTANT ENUM */
/*--------------------------------------------------------------------*/
-#define LED_PORT 0 // A
-#define LED_PIN_R 12 // 12
-#define LED_PIN_B 13 // 13
-#define LED_PIN_G 14 // 14
-#define LED_STATE_ON 0 // active-low
-
-#define BUTTON_PORT 3 // D
-#define BUTTON_PIN 5 // 5
-#define BUTTON_STATE_ACTIVE 0 // active-low
-
/*--------------------------------------------------------------------*/
/* Forward USB interrupt events to TinyUSB IRQ Handler */
/*--------------------------------------------------------------------*/
@@ -82,6 +73,7 @@ void UsageFault_Handler(void)
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
+void _init(void);
void _init(void)
{
@@ -91,12 +83,12 @@ void _init(void)
/* Initing Funcs */
/*--------------------------------------------------------------------*/
-void emu_init(uint8_t immediate_switch)
+static void emu_init(uint8_t immediate_switch)
{
EMU->PWRCTRL = (immediate_switch ? EMU_PWRCTRL_IMMEDIATEPWRSWITCH : 0) | EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
}
-void emu_reg_init(float target_voltage)
+static void emu_reg_init(float target_voltage)
{
if(target_voltage < 2300.f || target_voltage >= 3800.f)
return;
@@ -108,7 +100,7 @@ void emu_reg_init(float target_voltage)
EMU->R5VOUTLEVEL = level; /* Reg output to 3.3V*/
}
-void emu_dcdc_init(float target_voltage, float max_ln_current, float max_lp_current, float max_reverse_current)
+static void emu_dcdc_init(float target_voltage, float max_ln_current, float max_lp_current, float max_reverse_current)
{
if(target_voltage < 1800.f || target_voltage >= 3000.f)
return;
@@ -279,7 +271,7 @@ void emu_dcdc_init(float target_voltage, float max_ln_current, float max_lp_curr
EMU->PWRCTRL = EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
}
-void cmu_hfxo_startup_calib(uint16_t ib_trim, uint16_t c_tune)
+static void cmu_hfxo_startup_calib(uint16_t ib_trim, uint16_t c_tune)
{
if(CMU->STATUS & CMU_STATUS_HFXOENS)
return;
@@ -287,7 +279,7 @@ void cmu_hfxo_startup_calib(uint16_t ib_trim, uint16_t c_tune)
CMU->HFXOSTARTUPCTRL = (CMU->HFXOSTARTUPCTRL & ~(_CMU_HFXOSTARTUPCTRL_CTUNE_MASK | _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) & _CMU_HFXOSTARTUPCTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK);
}
-void cmu_hfxo_steady_calib(uint16_t ib_trim, uint16_t c_tune)
+static void cmu_hfxo_steady_calib(uint16_t ib_trim, uint16_t c_tune)
{
if(CMU->STATUS & CMU_STATUS_HFXOENS)
return;
@@ -295,7 +287,7 @@ void cmu_hfxo_steady_calib(uint16_t ib_trim, uint16_t c_tune)
CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK);
}
-void cmu_hfrco_calib(uint32_t calibration)
+static void cmu_hfrco_calib(uint32_t calibration)
{
if(CMU->STATUS & CMU_STATUS_DPLLENS)
return;
@@ -307,7 +299,7 @@ void cmu_hfrco_calib(uint32_t calibration)
while(CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY);
}
-void cmu_ushfrco_calib(uint8_t enable, uint32_t calibration)
+static void cmu_ushfrco_calib(uint8_t enable, uint32_t calibration)
{
if(CMU->USBCRCTRL & CMU_USBCRCTRL_USBCREN)
return;
@@ -334,7 +326,7 @@ void cmu_ushfrco_calib(uint8_t enable, uint32_t calibration)
}
}
-void cmu_auxhfrco_calib(uint8_t enable, uint32_t calibration)
+static void cmu_auxhfrco_calib(uint8_t enable, uint32_t calibration)
{
if(!enable)
{
@@ -359,7 +351,7 @@ void cmu_auxhfrco_calib(uint8_t enable, uint32_t calibration)
}
-void cmu_init(void)
+static void cmu_init(void)
{
// Change SDIO clock to HFXO if HFRCO selected and disable it
CMU->SDIOCTRL = CMU_SDIOCTRL_SDIOCLKDIS | CMU_SDIOCTRL_SDIOCLKSEL_HFXO;
@@ -441,7 +433,7 @@ void cmu_init(void)
CMU->LFECLKSEL = CMU_LFECLKSEL_LFE_ULFRCO;
}
-void systick_init(void)
+static void systick_init(void)
{
SysTick->LOAD = (72000000 / 1000) - 1;
SysTick->VAL = 0;
@@ -450,7 +442,7 @@ void systick_init(void)
SCB->SHP[11] = 7 << (8 - __NVIC_PRIO_BITS); // Set priority 3,1 (min)
}
-void gpio_init(void)
+static void gpio_init(void)
{
CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
diff --git a/hw/bsp/efm32/family.cmake b/hw/bsp/efm32/family.cmake
new file mode 100644
index 000000000..f5afd6fe4
--- /dev/null
+++ b/hw/bsp/efm32/family.cmake
@@ -0,0 +1,107 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# EFM32_FAMILY should be set by board.cmake (e.g. efm32gg12b)
+string(TOUPPER ${EFM32_FAMILY} EFM32_FAMILY_UPPER)
+set(SILABS_CMSIS ${TOP}/hw/mcu/silabs/cmsis-dfp-${EFM32_FAMILY}/Device/SiliconLabs/${EFM32_FAMILY_UPPER})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS EFM32GG CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+ if (TARGET ${BOARD_TARGET})
+ return()
+ endif ()
+
+ set(LD_FILE_GNU ${SILABS_CMSIS}/Source/GCC/${EFM32_FAMILY}.ld)
+ set(LD_FILE_Clang ${LD_FILE_GNU})
+
+ if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+ message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+ endif ()
+
+ set(STARTUP_FILE_GNU ${SILABS_CMSIS}/Source/GCC/startup_${EFM32_FAMILY}.S)
+ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+ add_library(${BOARD_TARGET} STATIC
+ ${SILABS_CMSIS}/Source/system_${EFM32_FAMILY}.c
+ ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+ )
+
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${CMSIS_5}/CMSIS/Core/Include
+ ${SILABS_CMSIS}/Include
+ )
+
+ target_compile_definitions(${BOARD_TARGET} PUBLIC
+ __STARTUP_CLEAR_BSS
+ __START=main
+ ${EFM32_MCU}
+ )
+
+ update_board(${BOARD_TARGET})
+
+ if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_GNU}"
+ -nostartfiles
+ --specs=nosys.specs --specs=nano.specs
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_Clang}"
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--config=${LD_FILE_IAR}"
+ )
+ endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+ family_configure_common(${TARGET} ${RTOS})
+
+ # Board target
+ add_board_target(board_${BOARD})
+
+ #---------- Port Specific ----------
+ # These files are built for each example since it depends on example's tusb_config.h
+ target_sources(${TARGET} PUBLIC
+ # BSP
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+ )
+ target_include_directories(${TARGET} PUBLIC
+ # family, hw, board
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+ )
+
+ # Add TinyUSB target and port source
+ family_add_tinyusb(${TARGET} OPT_MCU_EFM32GG)
+ target_sources(${TARGET} PUBLIC
+ ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+ ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+ ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+ )
+ target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+ # Flashing
+ family_add_bin_hex(${TARGET})
+ family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/efm32/family.mk
index 5dd7a158f..f115b6bd4 100644
--- a/hw/bsp/sltb009a/board.mk
+++ b/hw/bsp/efm32/family.mk
@@ -1,3 +1,5 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
CFLAGS += \
-flto \
-mthumb \
@@ -7,38 +9,31 @@ CFLAGS += \
-nostdlib -nostartfiles \
-D__STARTUP_CLEAR_BSS \
-D__START=main \
- -DEFM32GG12B810F1024GM64 \
-DCFG_TUSB_MCU=OPT_MCU_EFM32GG
-# mcu driver cause following warnings
-#CFLAGS += -Wno-error=unused-parameter
+CPU_CORE ?= cortex-m4
-SILABS_FAMILY = efm32gg12b
-SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(SILABS_FAMILY)/Device/SiliconLabs/$(shell echo $(SILABS_FAMILY) | tr a-z A-Z)
+# EFM32_FAMILY should be set by board.mk (e.g. efm32gg12b)
+SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(EFM32_FAMILY)/Device/SiliconLabs/$(shell echo $(EFM32_FAMILY) | tr a-z A-Z)
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
-LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(SILABS_FAMILY).ld
+LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(EFM32_FAMILY).ld
SRC_C += \
- $(SILABS_CMSIS)/Source/system_$(SILABS_FAMILY).c \
+ $(SILABS_CMSIS)/Source/system_$(EFM32_FAMILY).c \
src/portable/synopsys/dwc2/dcd_dwc2.c \
src/portable/synopsys/dwc2/hcd_dwc2.c \
src/portable/synopsys/dwc2/dwc2_common.c \
SRC_S += \
- $(SILABS_CMSIS)/Source/GCC/startup_$(SILABS_FAMILY).S
+ $(SILABS_CMSIS)/Source/GCC/startup_$(EFM32_FAMILY).S
INC += \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(SILABS_CMSIS)/Include \
- $(TOP)/hw/bsp/$(BOARD)
+ $(TOP)/$(BOARD_PATH)
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = EFM32GG12B810F1024
-
-flash: flash-jlink