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authorhathach <[email protected]>2020-11-09 01:01:05 +0700
committerhathach <[email protected]>2020-11-09 01:01:05 +0700
commit7ab3da1e0302e466447c02fa353b8659e053764f (patch)
tree0d84614d417f97d3a044ca2011d74587b874f237
parent89b92b54a7b6a9e9dabb72f2b4a3b616cc9f81cc (diff)
same70 xplained uart via edbg work with board_test
-rw-r--r--hw/bsp/same70_xplained/board.mk7
-rw-r--r--hw/bsp/same70_xplained/same70_xplained.c48
-rw-r--r--hw/bsp/samg55xplained/samg55xplained.c14
3 files changed, 38 insertions, 31 deletions
diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk
index fbc634c58..87b59d2d2 100644
--- a/hw/bsp/same70_xplained/board.mk
+++ b/hw/bsp/same70_xplained/board.mk
@@ -9,7 +9,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_NONE
# suppress following warnings from mcu driver
-CFLAGS += -Wno-error=undef
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
ASF_DIR = hw/mcu/microchip/same70
@@ -22,7 +22,10 @@ SRC_C += \
$(ASF_DIR)/hpl/core/hpl_init.c \
$(ASF_DIR)/hpl/usart/hpl_usart.c \
$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
- $(ASF_DIR)/hal/src/hal_atomic.c
+ $(ASF_DIR)/hal/src/hal_usart_async.c \
+ $(ASF_DIR)/hal/src/hal_io.c \
+ $(ASF_DIR)/hal/src/hal_atomic.c \
+ $(ASF_DIR)/hal/utils/src/utils_ringbuffer.c
INC += \
$(TOP)/hw/bsp/$(BOARD) \
diff --git a/hw/bsp/same70_xplained/same70_xplained.c b/hw/bsp/same70_xplained/same70_xplained.c
index c7165a9b9..fb8855f52 100644
--- a/hw/bsp/same70_xplained/same70_xplained.c
+++ b/hw/bsp/same70_xplained/same70_xplained.c
@@ -27,9 +27,10 @@
#include "bsp/board.h"
#include "peripheral_clk_config.h"
-#include "hal/include/hal_init.h"
-#include "hal/include/hpl_usart_sync.h"
+#include "hpl/usart/hpl_usart_base.h"
#include "hpl/pmc/hpl_pmc.h"
+#include "hal/include/hal_init.h"
+#include "hal/include/hal_usart_async.h"
#include "hal/include/hal_gpio.h"
@@ -42,10 +43,17 @@
#define BUTTON_PIN GPIO(GPIO_PORTA, 11)
#define BUTTON_STATE_ACTIVE 0
-#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
-#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
+#define UART_TX_PIN GPIO(GPIO_PORTB, 4)
+#define UART_RX_PIN GPIO(GPIO_PORTA, 21)
+
+static struct usart_async_descriptor edbg_com;
+static uint8_t edbg_com_buffer[64];
+static volatile bool uart_busy = false;
-struct _usart_sync_device _edbg_com;
+static void tx_cb_EDBG_COM(const struct usart_async_descriptor *const io_descr)
+{
+ uart_busy = false;
+}
//------------- IMPLEMENTATION -------------//
void board_init(void)
@@ -67,18 +75,16 @@ void board_init(void)
gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
-#if 0
// Uart via EDBG Com
- _pmc_enable_periph_clock(ID_FLEXCOM7);
- gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
- gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
-
- _usart_sync_init(&_edbg_com, FLEXCOM7);
- _usart_sync_set_baud_rate(&_edbg_com, CFG_BOARD_UART_BAUDRATE);
- _usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
- _usart_sync_enable(&_edbg_com);
+ _pmc_enable_periph_clock(ID_USART1);
+ gpio_set_pin_function(UART_RX_PIN, MUX_PA21A_USART1_RXD1);
+ gpio_set_pin_function(UART_TX_PIN, MUX_PB4D_USART1_TXD1);
-#endif
+ usart_async_init(&edbg_com, USART1, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
+ usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
+ usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_cb_EDBG_COM);
+// usart_async_register_callback(&EDBG_COM, USART_ASYNC_RXC_CB, rx_cb_EDBG_COM);
+ usart_async_enable(&edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
@@ -131,13 +137,11 @@ int board_uart_read(uint8_t* buf, int len)
int board_uart_write(void const * buf, int len)
{
- (void) buf;
-// uint8_t const * buf8 = (uint8_t const *) buf;
-// for(int i=0; i<len; i++)
-// {
-// while ( !_usart_sync_is_ready_to_send(&_edbg_com) ) {}
-// _usart_sync_write_byte(&_edbg_com, buf8[i]);
-// }
+ // while until previous transfer is complete
+ while(uart_busy) {}
+ uart_busy = true;
+
+ io_write(&edbg_com.io, buf, len);
return len;
}
diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c
index c9bc0656e..ed106b06b 100644
--- a/hw/bsp/samg55xplained/samg55xplained.c
+++ b/hw/bsp/samg55xplained/samg55xplained.c
@@ -45,7 +45,7 @@
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
-struct _usart_sync_device _edbg_com;
+struct _usart_sync_device edbg_com;
//------------- IMPLEMENTATION -------------//
void board_init(void)
@@ -72,10 +72,10 @@ void board_init(void)
gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
- _usart_sync_init(&_edbg_com, FLEXCOM7);
- _usart_sync_set_baud_rate(&_edbg_com, CFG_BOARD_UART_BAUDRATE);
- _usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
- _usart_sync_enable(&_edbg_com);
+ _usart_sync_init(&edbg_com, FLEXCOM7);
+ _usart_sync_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
+ _usart_sync_set_mode(&edbg_com, USART_MODE_ASYNCHRONOUS);
+ _usart_sync_enable(&edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
@@ -129,8 +129,8 @@ int board_uart_write(void const * buf, int len)
uint8_t const * buf8 = (uint8_t const *) buf;
for(int i=0; i<len; i++)
{
- while ( !_usart_sync_is_ready_to_send(&_edbg_com) ) {}
- _usart_sync_write_byte(&_edbg_com, buf8[i]);
+ while ( !_usart_sync_is_ready_to_send(&edbg_com) ) {}
+ _usart_sync_write_byte(&edbg_com, buf8[i]);
}
return len;
}