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authorhathach <[email protected]>2021-06-18 17:18:11 +0700
committerhathach <[email protected]>2021-06-18 17:18:11 +0700
commit82618d2d5f15d0f8dd9631dec3807964a1281782 (patch)
treee84fbd0c81d65b0678a6369a7797d17b3aea5be4
parent5006b1065a21099d3c62bf2ea3ecf6c1e82d2723 (diff)
fix build with mm32 board
-rw-r--r--examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h5
-rw-r--r--examples/device/hid_composite_freertos/src/FreeRTOSConfig.h4
-rw-r--r--hw/bsp/board_mcu.h2
-rw-r--r--hw/bsp/mm32/boards/mm32f327x_mb39/board.mk8
-rw-r--r--hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld (renamed from hw/bsp/mm32/mm32f327x/flash.ld)0
-rw-r--r--hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c172
-rw-r--r--hw/bsp/mm32/family.mk36
-rw-r--r--hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c161
-rw-r--r--src/class/cdc/cdc_device.h6
-rw-r--r--src/class/vendor/vendor_device.h8
-rw-r--r--src/common/tusb_common.h32
-rw-r--r--src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c2
12 files changed, 251 insertions, 185 deletions
diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
index b76d59706..c9f553f64 100644
--- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
+++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
@@ -45,7 +45,12 @@
// Include MCU header
#include "bsp/board_mcu.h"
+// TODO fix later
+#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
+extern u32 SystemCoreClock;
+#else
extern uint32_t SystemCoreClock;
+#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
index b76d59706..99c5bc328 100644
--- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
+++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
@@ -45,7 +45,11 @@
// Include MCU header
#include "bsp/board_mcu.h"
+#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
+extern u32 SystemCoreClock;
+#else
extern uint32_t SystemCoreClock;
+#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index 1a659c410..c9d143bd7 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -130,6 +130,8 @@
#elif CFG_TUSB_MCU == OPT_MCU_RX63X
// no header needed
+#elif CFG_TUSB_MCU == OPT_MCU_MM32F327X
+ #include "mm32_device.h"
#else
#error "Missing MCU header"
#endif
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk
new file mode 100644
index 000000000..b7663926f
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk
@@ -0,0 +1,8 @@
+LD_FILE = $(BOARD_PATH)/flash.ld
+SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
+
+# For flash-jlink target
+#JLINK_DEVICE = stm32f411ve
+
+# flash target using on-board stlink
+#flash: flash-jlink
diff --git a/hw/bsp/mm32/mm32f327x/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld
index d96d6e43d..d96d6e43d 100644
--- a/hw/bsp/mm32/mm32f327x/flash.ld
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
new file mode 100644
index 000000000..cff7bc15e
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
@@ -0,0 +1,172 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 MM32 SE TEAM
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "mm32_device.h"
+#include "hal_conf.h"
+#include "tusb.h"
+#include "../board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void OTG_FS_IRQHandler (void)
+{
+ tud_int_handler(0);
+
+}
+void USB_DeviceClockInit (void)
+{
+ /* Select USBCLK source */
+ // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
+ RCC->CFGR &= ~(0x3 << 22);
+ RCC->CFGR |= (0x1 << 22);
+
+ /* Enable USB clock */
+ RCC->AHB2ENR |= 0x1 << 7;
+}
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+// LED
+
+void board_led_write (bool state);
+extern u32 SystemCoreClock;
+const int baudrate = 115200;
+
+void board_init (void)
+{
+// usb clock
+ USB_DeviceClockInit();
+
+ if ( SysTick_Config(SystemCoreClock / 1000) )
+ {
+ while ( 1 )
+ ;
+ }
+ NVIC_SetPriority(SysTick_IRQn, 0x0);
+
+ // LED
+ GPIO_InitTypeDef GPIO_InitStruct;
+ RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);
+ GPIO_StructInit(&GPIO_InitStruct);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_15); //Disable JTDI AF to AF15
+
+ GPIO_InitStruct.GPIO_Pin = GPIO_Pin_15;
+ GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ board_led_write(true);
+
+ // UART
+ UART_InitTypeDef UART_InitStruct;
+
+ RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock
+ RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); //
+ //UART initialset
+
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
+
+ UART_StructInit(&UART_InitStruct);
+ UART_InitStruct.UART_BaudRate = baudrate;
+ UART_InitStruct.UART_WordLength = UART_WordLength_8b;
+ UART_InitStruct.UART_StopBits = UART_StopBits_1; //one stopbit
+ UART_InitStruct.UART_Parity = UART_Parity_No; //none odd-even verify bit
+ UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None; //No hardware flow control
+ UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode
+
+ UART_Init(UART1, &UART_InitStruct); //initial uart 1
+ UART_Cmd(UART1, ENABLE); //enable uart 1
+
+ //UART1_TX GPIOA.9
+ GPIO_StructInit(&GPIO_InitStruct);
+ GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
+ GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
+ GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ //UART1_RX GPIOA.10
+ GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
+ GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write (bool state)
+{
+ state ? (GPIO_ResetBits(GPIOA, GPIO_Pin_15)) : (GPIO_SetBits(GPIOA, GPIO_Pin_15));
+}
+
+uint32_t board_button_read (void)
+{
+ return 0;
+}
+
+int board_uart_read (uint8_t *buf, int len)
+{
+ (void) buf;
+ (void) len;
+ return 0;
+}
+
+int board_uart_write (void const *buf, int len)
+{
+ const char *buff = buf;
+ while ( len )
+ {
+ while ( (UART1->CSR & UART_IT_TXIEN) == 0 )
+ ; //The loop is sent until it is finished
+ UART1->TDR = (*buff & 0xFF);
+ buff++;
+ len--;
+ }
+ return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+ system_ticks++;
+}
+
+uint32_t board_millis (void)
+{
+ return system_ticks;
+}
+#endif
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}
diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk
new file mode 100644
index 000000000..3273ff870
--- /dev/null
+++ b/hw/bsp/mm32/family.mk
@@ -0,0 +1,36 @@
+UF2_FAMILY_ID = 0x0
+SDK_DIR = hw/mcu/mindmotion/mm32sdk
+DEPS_SUBMODULES += lib/CMSIS_5 $(SDK_DIR)
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+ -flto \
+ -mthumb \
+ -mabi=aapcs \
+ -mcpu=cortex-m3 \
+ -mfloat-abi=soft \
+ -nostdlib -nostartfiles \
+ -DCFG_TUSB_MCU=OPT_MCU_MM32F327X
+
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized
+
+SRC_C += \
+ src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c \
+ $(SDK_DIR)/mm32f327x/MM32F327x/Source/system_mm32f327x.c \
+ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_gpio.c \
+ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_rcc.c \
+ $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_uart.c \
+
+INC += \
+ $(TOP)/$(BOARD_PATH) \
+ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/Include \
+ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM3
+
+# flash target using on-board
+flash: flash-jlink
diff --git a/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c b/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c
deleted file mode 100644
index 39b264b70..000000000
--- a/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020 MM32 SE TEAM
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "mm32_device.h"
-#include "hal_conf.h"
-#include "tusb.h"
-#include "../board.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void OTG_FS_IRQHandler(void)
-{
- dcd_int_handler(TUD_OPT_RHPORT);
-
-}
-void USB_DeviceClockInit(void)
-{
- /* Select USBCLK source */
- // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
- RCC->CFGR &= ~(0x3 << 22);
- RCC->CFGR |= (0x1 << 22);
-
- /* Enable USB clock */
- RCC->AHB2ENR |= 0x1 << 7;
-}
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-// LED
-
-void board_led_write(bool state);
-extern u32 SystemCoreClock;
-const int baudrate = 115200;
-
-void board_init(void)
-{
-// usb clock
- USB_DeviceClockInit();
-
- if (SysTick_Config(SystemCoreClock / 1000)) {
- while (1);
- }
- NVIC_SetPriority(SysTick_IRQn, 0x0);
-
- // LED
- GPIO_InitTypeDef GPIO_InitStruct;
- RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);
- GPIO_StructInit(&GPIO_InitStruct);
- GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_15); //Disable JTDI AF to AF15
-
- GPIO_InitStruct.GPIO_Pin = GPIO_Pin_15;
- GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
- GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- board_led_write(true);
-
- // UART
- UART_InitTypeDef UART_InitStruct;
-
- RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock
- RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); //
- //UART initialset
-
- GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
- GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
-
-
- UART_StructInit(&UART_InitStruct);
- UART_InitStruct.UART_BaudRate = baudrate;
- UART_InitStruct.UART_WordLength = UART_WordLength_8b;
- UART_InitStruct.UART_StopBits = UART_StopBits_1;//one stopbit
- UART_InitStruct.UART_Parity = UART_Parity_No;//none odd-even verify bit
- UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None;//No hardware flow control
- UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode
-
- UART_Init(UART1, &UART_InitStruct); //initial uart 1
- UART_Cmd(UART1, ENABLE); //enable uart 1
-
- //UART1_TX GPIOA.9
- GPIO_StructInit(&GPIO_InitStruct);
- GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
- GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
- GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- //UART1_RX GPIOA.10
- GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5;
- GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
- GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
- state ? (GPIO_ResetBits(GPIOA,GPIO_Pin_15)):(GPIO_SetBits(GPIOA,GPIO_Pin_15));
-}
-
-uint32_t board_button_read(void)
-{
- return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
- (void) buf; (void) len;
- return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
- const char *buff = buf;
- while(len){
- while((UART1->CSR & UART_IT_TXIEN) == 0); //The loop is sent until it is finished
- UART1->TDR = (*buff & 0xFF);
- buff++;
- len--;
- }
- return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
- system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
- return system_ticks;
-}
-#endif
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index 7ff757add..72e29705a 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -82,7 +82,7 @@ int32_t tud_cdc_n_read_char (uint8_t itf);
void tud_cdc_n_read_flush (uint8_t itf);
// Get a byte from FIFO at the specified position without removing it
-bool tud_cdc_n_peek (uint8_t itf, uint8_t* u8);
+bool tud_cdc_n_peek (uint8_t itf, uint8_t* uv8);
// Write bytes to TX FIFO, data may remain in the FIFO for a while
uint32_t tud_cdc_n_write (uint8_t itf, void const* buffer, uint32_t bufsize);
@@ -206,9 +206,9 @@ static inline void tud_cdc_read_flush (void)
tud_cdc_n_read_flush(0);
}
-static inline bool tud_cdc_peek (uint8_t* u8)
+static inline bool tud_cdc_peek (uint8_t* uv8)
{
- return tud_cdc_n_peek(0, u8);
+ return tud_cdc_n_peek(0, uv8);
}
static inline uint32_t tud_cdc_write_char (char ch)
diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 6d9c784c0..b54194271 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -44,7 +44,7 @@ bool tud_vendor_n_mounted (uint8_t itf);
uint32_t tud_vendor_n_available (uint8_t itf);
uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize);
-bool tud_vendor_n_peek (uint8_t itf, uint8_t* u8);
+bool tud_vendor_n_peek (uint8_t itf, uint8_t* uv8);
uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize);
uint32_t tud_vendor_n_write_available (uint8_t itf);
@@ -58,7 +58,7 @@ uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str);
static inline bool tud_vendor_mounted (void);
static inline uint32_t tud_vendor_available (void);
static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize);
-static inline bool tud_vendor_peek (uint8_t* u8);
+static inline bool tud_vendor_peek (uint8_t* uv8);
static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize);
static inline uint32_t tud_vendor_write_str (char const* str);
static inline uint32_t tud_vendor_write_available (void);
@@ -94,9 +94,9 @@ static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize)
return tud_vendor_n_read(0, buffer, bufsize);
}
-static inline bool tud_vendor_peek (uint8_t* u8)
+static inline bool tud_vendor_peek (uint8_t* uv8)
{
- return tud_vendor_n_peek(0, u8);
+ return tud_vendor_n_peek(0, uv8);
}
static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize)
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 889ad7b25..ece5d800a 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -38,18 +38,18 @@
#define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) )
#define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) )
-#define TU_U16_HIGH(u16) ((uint8_t) (((u16) >> 8) & 0x00ff))
-#define TU_U16_LOW(u16) ((uint8_t) ((u16) & 0x00ff))
-#define U16_TO_U8S_BE(u16) TU_U16_HIGH(u16), TU_U16_LOW(u16)
-#define U16_TO_U8S_LE(u16) TU_U16_LOW(u16), TU_U16_HIGH(u16)
+#define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff))
+#define TU_U16_LOW(_u16) ((uint8_t) ((_u16) & 0x00ff))
+#define U16_TO_U8S_BE(_u16) TU_U16_HIGH(_u16), TU_U16_LOW(_u16)
+#define U16_TO_U8S_LE(_u16) TU_U16_LOW(_u16), TU_U16_HIGH(_u16)
-#define TU_U32_BYTE3(u32) ((uint8_t) ((((uint32_t) u32) >> 24) & 0x000000ff)) // MSB
-#define TU_U32_BYTE2(u32) ((uint8_t) ((((uint32_t) u32) >> 16) & 0x000000ff))
-#define TU_U32_BYTE1(u32) ((uint8_t) ((((uint32_t) u32) >> 8) & 0x000000ff))
-#define TU_U32_BYTE0(u32) ((uint8_t) (((uint32_t) u32) & 0x000000ff)) // LSB
+#define TU_U32_BYTE3(_u32) ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB
+#define TU_U32_BYTE2(_u32) ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff))
+#define TU_U32_BYTE1(_u32) ((uint8_t) ((((uint32_t) _u32) >> 8) & 0x000000ff))
+#define TU_U32_BYTE0(_u32) ((uint8_t) (((uint32_t) _u32) & 0x000000ff)) // LSB
-#define U32_TO_U8S_BE(u32) TU_U32_BYTE3(u32), TU_U32_BYTE2(u32), TU_U32_BYTE1(u32), TU_U32_BYTE0(u32)
-#define U32_TO_U8S_LE(u32) TU_U32_BYTE0(u32), TU_U32_BYTE1(u32), TU_U32_BYTE2(u32), TU_U32_BYTE3(u32)
+#define U32_TO_U8S_BE(_u32) TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32)
+#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
#define TU_BIT(n) (1UL << (n))
@@ -88,13 +88,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low)
return (uint16_t) ((((uint16_t) high) << 8) | low);
}
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t u32) { return TU_U32_BYTE3(u32); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t u32) { return TU_U32_BYTE2(u32); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t u32) { return TU_U32_BYTE1(u32); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t u32) { return TU_U32_BYTE0(u32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t uv32) { return TU_U32_BYTE3(uv32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t uv32) { return TU_U32_BYTE2(uv32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t uv32) { return TU_U32_BYTE1(uv32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t uv32) { return TU_U32_BYTE0(uv32); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t u16) { return TU_U16_HIGH(u16); }
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t u16) { return TU_U16_LOW(u16); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t uv16) { return TU_U16_HIGH(uv16); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t uv16) { return TU_U16_LOW(uv16); }
//------------- Bits -------------//
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set (uint32_t value, uint8_t pos) { return value | TU_BIT(pos); }
diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
index 59a40dc68..31b1f7080 100644
--- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
+++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
@@ -283,7 +283,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
/* Response with status first before changing device address */
dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
}
-extern u32 SystemCoreClock ;
+extern u32 SystemCoreClock;
void dcd_remote_wakeup(uint8_t rhport)
{
(void) rhport;