Fix RTT buffer not detected.

Signed-off-by: HiFiPhile <[email protected]>

5 files changed, 278 insertions, 1 deletions

diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
index 7891618e2..16cb77ff4 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
@@ -2,8 +2,14 @@ set(MCU_VARIANT stm32h7s3xx)
 set(JLINK_DEVICE stm32h7s3xx)
 
 function(update_board TARGET)
+
+  set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/stm32h7s3xx_flash.ld)
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  set(LD_FILE_IAR ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/stm32h7s3xx_flash.icf)
+
   target_compile_definitions(${TARGET} PUBLIC
     STM32H7S3xx
+    SEGGER_RTT_SECTION="noncacheable_buffer"
     )
 
   target_sources(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
index f0dfe01dc..c802d0211 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
@@ -7,9 +7,16 @@ JLINK_DEVICE = stm32h7s3xx
 # flash target using on-board stlink
 flash: flash-stlink
 
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/stm32h7s3xx_flash.ld
+LD_FILE_IAR = $(BOARD_PATH)/stm32h7s3xx_flash.icf
+
 SRC_C += \
 	$(BOARD_PATH)/tcpp0203/tcpp0203.c \
 	$(BOARD_PATH)/tcpp0203/tcpp0203_reg.c \
 
 INC += \
 	$(TOP)/$(BOARD_PATH)/tcpp0203 \
+
+CFLAGS += \
+	-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.icf b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.icf
new file mode 100644
index 000000000..17af9a620
--- /dev/null
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.icf
@@ -0,0 +1,55 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol NONCACHEABLEBUFFER_size   = 0x1000;
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x2404FFFF - NONCACHEABLEBUFFER_size;
+define symbol NONCACHEABLEBUFFER_start     = __ICFEDIT_region_RAM_end__ + 1;
+define symbol NONCACHEABLEBUFFER_end       = __ICFEDIT_region_RAM_end__ + NONCACHEABLEBUFFER_size;
+
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x800;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __region_ITCM_start__ = 0x00000000;
+define symbol __region_ITCM_end__   = 0x0000FFFF;
+define symbol __region_DTCM_start__ = 0x20000000;
+define symbol __region_DTCM_end__   = 0x2000FFFF;
+define symbol __region_SRAMAHB_start__ = 0x30000000;
+define symbol __region_SRAMAHB_end__   = 0x30007FFF;
+define symbol __region_BKPSRAM_start__ = 0x38800000;
+define symbol __region_BKPSRAM_end__   = 0x38800FFF;
+
+export symbol NONCACHEABLEBUFFER_start;
+export symbol NONCACHEABLEBUFFER_size;
+
+export symbol __ICFEDIT_region_ROM_start__;
+export symbol __ICFEDIT_region_ROM_end__;
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region NONCACHEABLE_region   = mem:[from NONCACHEABLEBUFFER_start to NONCACHEABLEBUFFER_end];
+define region ITCM_region     = mem:[from __region_ITCM_start__ to __region_ITCM_end__];
+define region DTCM_region     = mem:[from __region_DTCM_start__ to __region_DTCM_end__];
+define region SRAMAHB_region  = mem:[from __region_SRAMAHB_start__ to __region_SRAMAHB_end__];
+define region BKPSRAM_region  = mem:[from __region_BKPSRAM_start__ to __region_BKPSRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite };
+place in NONCACHEABLE_region { section noncacheable_buffer };
+place in DTCM_region  { block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.ld b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.ld
new file mode 100644
index 000000000..2c6bb27de
--- /dev/null
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/stm32h7s3xx_flash.ld
@@ -0,0 +1,209 @@
+/*
+******************************************************************************
+**
+** @file        : LinkerScript.ld
+**
+** @author      : Auto-generated by STM32CubeIDE
+**
+** @brief       : Linker script for STM32H7S3xx Device from STM32H7RS series
+**                      64Kbytes FLASH
+**                      456Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2023 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(DTCM) + LENGTH(DTCM); /* end of "DTCM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+__FLASH_BEGIN  = 0x08000000;
+__FLASH_SIZE   = 0x00010000;
+
+
+__RAM_BEGIN    = 0x24000000;
+__RAM_SIZE     = 0x4FC00;
+__RAM_NONCACHEABLEBUFFER_SIZE = 0x1000;
+
+/* Memories definition */
+MEMORY
+{
+  RAM       (xrw) : ORIGIN = __RAM_BEGIN,    LENGTH = __RAM_SIZE
+  RAM_NONCACHEABLEBUFFER (xrw) : ORIGIN = __RAM_BEGIN + __RAM_SIZE,  LENGTH = __RAM_NONCACHEABLEBUFFER_SIZE
+
+  ITCM      (xrw) : ORIGIN = 0x00000000,    LENGTH = 0x00010000
+  DTCM       (rw) : ORIGIN = 0x20000000,    LENGTH = 0x00010000
+  SRAMAHB   (rw)  : ORIGIN = 0x30000000,  LENGTH = 0x00008000
+  BKPSRAM   (rw)  : ORIGIN = 0x38800000,  LENGTH = 0x00001000
+
+  FLASH     (xrw) : ORIGIN = __FLASH_BEGIN, LENGTH = __FLASH_SIZE
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+   {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array  (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  RW_NONCACHEABLE :
+  {
+    __NONCACHEABLEBUFFER_BEGIN = .;/* create symbol for start of section */
+    KEEP(*(noncacheable_buffer))
+    __NONCACHEABLEBUFFER_END = .;  /* create symbol for start of section */
+  } > RAM_NONCACHEABLEBUFFER
+
+  /* User_heap_stack section, used to check that there is enough "DTCM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >DTCM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32h7rs/family.mk b/hw/bsp/stm32h7rs/family.mk
index e2d6d40e4..d679b72f1 100644
--- a/hw/bsp/stm32h7rs/family.mk
+++ b/hw/bsp/stm32h7rs/family.mk
@@ -88,5 +88,5 @@ SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_GCC = $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
+LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
 LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf