re-branding fixed address fifo read/write to stride mode

8 files changed, 139 insertions, 150 deletions

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 7822b7aae..a347fbee3 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -113,87 +113,92 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
 // Pull & Push
 // copy data to/from fifo without updating read/write pointers
 //--------------------------------------------------------------------+
-#if CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH
-  #if CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH == 32
-    #define fixed_unaligned_write tu_unaligned_write32
-    #define fixed_unaligned_read  tu_unaligned_read32
-typedef uint32_t fixed_access_item_t;
-  #elif CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH == 16
-    #define fixed_unaligned_write tu_unaligned_write16
-    #define fixed_unaligned_read  tu_unaligned_read16
-typedef uint16_t fixed_access_item_t;
+#if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
+  #if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE == 4
+    #define stride_unaligned_write tu_unaligned_write32
+    #define stride_unaligned_read  tu_unaligned_read32
+typedef uint32_t stride_item_t;
+  #elif CFG_TUSB_FIFO_ACCESS_DATA_STRIDE == 2
+    #define stride_unaligned_write tu_unaligned_write16
+    #define stride_unaligned_read  tu_unaligned_read16
+typedef uint16_t stride_item_t;
   #endif
 
 enum {
-  FIXED_ACCESS_REMAINDER_MASK = sizeof(fixed_access_item_t) - 1u
+  STRIDE_REMAIN_MASK = sizeof(stride_item_t) - 1u
 };
 
 // Copy to fifo from fixed address buffer (usually a rx register) with TU_FIFO_FIXED_ADDR_RW32 mode
-static void ff_push_access_mode(uint8_t *ff_buf, const volatile fixed_access_item_t *reg_rx, uint16_t len,
-                                uint8_t data_stride, uint8_t addr_stride) {
-  (void)data_stride;
-  (void)addr_stride;
-  // Reading full available 16/32-bit data from const app address
-  uint16_t n_items = len / sizeof(fixed_access_item_t);
+static void ff_push_stride(uint8_t *ff_buf, const volatile stride_item_t *src, uint16_t len) {
+  // Reading full available 16/32-bit src and write to fifo
+  uint16_t n_items = len >> (CFG_TUSB_FIFO_ACCESS_DATA_STRIDE >> 1); // len / data_stride;
   while (n_items--) {
-    const fixed_access_item_t tmp = *reg_rx;
-    fixed_unaligned_write(ff_buf, tmp);
-    ff_buf += sizeof(fixed_access_item_t);
+    const stride_item_t tmp = *src;
+    stride_unaligned_write(ff_buf, tmp);
+    ff_buf += sizeof(stride_item_t);
+
+  #if CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
+    src = (const volatile uint8_t *)src + addr_stride;
+  #endif
   }
 
-  // Read the remaining 1 byte (16bit) or 1-3 bytes (32bit) from const app address
-  const uint8_t bytes_rem = len & FIXED_ACCESS_REMAINDER_MASK;
+  // Read the remaining 1 byte (16bit) or 1-3 bytes (32bit)
+  const uint8_t bytes_rem = len & STRIDE_REMAIN_MASK;
   if (bytes_rem) {
-    const fixed_access_item_t tmp = *reg_rx;
+    const stride_item_t tmp = *src;
     memcpy(ff_buf, &tmp, bytes_rem);
   }
 }
 
 // Copy from fifo to fixed address buffer (usually a tx register) with TU_FIFO_FIXED_ADDR_RW32 mode
-static void ff_pull_fixed_addr(volatile fixed_access_item_t *reg_tx, const uint8_t *ff_buf, uint16_t len) {
-  // Write full available 32 bit words to const address
-  uint16_t n_itmes = len / sizeof(fixed_access_item_t);
-  while (n_itmes--) {
-    *reg_tx = fixed_unaligned_read(ff_buf);
-    ff_buf += sizeof(fixed_access_item_t);
+static void ff_pull_stride(volatile stride_item_t *dest, const uint8_t *ff_buf, uint16_t len) {
+  // Write full available 16/32 bit words to dest
+  uint16_t n_items = len >> (CFG_TUSB_FIFO_ACCESS_DATA_STRIDE >> 1); // len / data_stride;
+  while (n_items--) {
+    *dest = stride_unaligned_read(ff_buf);
+    ff_buf += sizeof(stride_item_t);
+
+  #if CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
+    dest = (const volatile uint8_t *)dest + addr_stride;
+  #endif
   }
 
   // Write the remaining 1 byte (16bit) or 1-3 bytes (32bit)
-  const uint8_t bytes_rem = len & FIXED_ACCESS_REMAINDER_MASK;
+  const uint8_t bytes_rem = len & STRIDE_REMAIN_MASK;
   if (bytes_rem) {
-    fixed_access_item_t tmp = 0u;
+    stride_item_t tmp = 0u;
     memcpy(&tmp, ff_buf, bytes_rem);
-    *reg_tx = tmp;
+    *dest = tmp;
   }
 }
 #endif
 
 // send n items to fifo WITHOUT updating write pointer
-static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, uint8_t data_stride,
-                      uint8_t addr_stride) {
+static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, bool stride_mode) {
+  (void)stride_mode;
   uint16_t lin_bytes  = f->depth - wr_ptr;
   uint16_t wrap_bytes = n - lin_bytes;
   uint8_t *ff_buf     = f->buffer + wr_ptr;
 
-#if CFG_TUSB_FIFO_MULTI_BYTES_ACCESS
-  if (data_stride > 1) {
-    const volatile fixed_access_item_t *reg_rx = (volatile const fixed_access_item_t *)app_buf;
+#if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
+  if (stride_mode) {
+    const volatile stride_item_t *stride_src = (const volatile stride_item_t *)app_buf;
     if (n <= lin_bytes) {
-      // Linear only
-      ff_push_access_mode(ff_buf, reg_rx, n, data_stride, addr_stride);
+      // Linear only case
+      ff_push_stride(ff_buf, stride_src, n);
     } else {
-      // Wrap around
+      // Wrap around case
 
       // Write full words to linear part of buffer
-      uint16_t lin_nitems_bytes = lin_bytes & ~FIXED_ACCESS_REMAINDER_MASK;
-      ff_push_access_mode(ff_buf, reg_rx, lin_nitems_bytes, data_stride, addr_stride);
+      uint16_t lin_nitems_bytes = lin_bytes & ~STRIDE_REMAIN_MASK;
+      ff_push_stride(ff_buf, stride_src, lin_nitems_bytes);
       ff_buf += lin_nitems_bytes;
 
       // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
-      const uint8_t rem = lin_bytes & FIXED_ACCESS_REMAINDER_MASK;
+      const uint8_t rem = lin_bytes & STRIDE_REMAIN_MASK;
       if (rem > 0) {
-        const uint8_t             remrem = (uint8_t)tu_min16(wrap_bytes, sizeof(fixed_access_item_t) - rem);
-        const fixed_access_item_t tmp    = *reg_rx;
+        const uint8_t       remrem = (uint8_t)tu_min16(wrap_bytes, sizeof(stride_item_t) - rem);
+        const stride_item_t tmp    = *stride_src;
         tu_scatter_write32(tmp, ff_buf, rem, f->buffer, remrem);
 
         wrap_bytes -= remrem;
@@ -204,7 +209,7 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
 
       // Write data wrapped part
       if (wrap_bytes > 0) {
-        ff_push_access_mode(ff_buf, reg_rx, wrap_bytes, data_stride, addr_stride);
+        ff_push_stride(ff_buf, stride_src, wrap_bytes);
       }
     }
   } else
@@ -212,10 +217,10 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
   {
     // single byte access
     if (n <= lin_bytes) {
-      // Linear only
+      // Linear only case
       memcpy(ff_buf, app_buf, n);
     } else {
-      // Wrap around
+      // Wrap around case
       memcpy(ff_buf, app_buf, lin_bytes);                                    // linear part
       memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes); // wrapped part
     }
@@ -223,63 +228,58 @@ static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint1
 }
 
 // get n items from fifo WITHOUT updating read pointer
-static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_access_mode_t copy_mode) {
+static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, bool stride_mode) {
+  (void)stride_mode;
   uint16_t       lin_bytes  = f->depth - rd_ptr;
   uint16_t       wrap_bytes = n - lin_bytes; // only used if wrapped
   const uint8_t *ff_buf     = f->buffer + rd_ptr;
 
-  switch (copy_mode) {
-    case TU_FIFO_INC_ADDR_RW8:
-      if (n <= lin_bytes) {
-        // Linear only
-        memcpy(app_buf, ff_buf, n);
-      } else {
-        // Wrap around
-        memcpy(app_buf, ff_buf, lin_bytes);                            // linear part
-        memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); // wrapped part
-      }
-      break;
+#if CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
+  if (stride_mode) {
+    volatile stride_item_t *stride_dst = (volatile stride_item_t *)app_buf;
 
-#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH
-    case TU_FIFO_FIXED_ADDR_RW32: {
-      volatile fixed_access_item_t *reg_tx = (volatile fixed_access_item_t *)app_buf;
-
-      if (n <= lin_bytes) {
-        // Linear only
-        ff_pull_fixed_addr(reg_tx, ff_buf, n);
-      } else {
-        // Wrap around case
+    if (n <= lin_bytes) {
+      // Linear only case
+      ff_pull_stride(stride_dst, ff_buf, n);
+    } else {
+      // Wrap around case
 
-        // Read full words from linear part
-        uint16_t lin_nitems_bytes = lin_bytes & ~FIXED_ACCESS_REMAINDER_MASK;
-        ff_pull_fixed_addr(reg_tx, ff_buf, lin_nitems_bytes);
-        ff_buf += lin_nitems_bytes;
+      // Read full words from linear part
+      uint16_t lin_nitems_bytes = lin_bytes & ~STRIDE_REMAIN_MASK;
+      ff_pull_stride(stride_dst, ff_buf, lin_nitems_bytes);
+      ff_buf += lin_nitems_bytes;
 
-        // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
-        const uint8_t rem = lin_bytes & FIXED_ACCESS_REMAINDER_MASK;
-        if (rem > 0) {
-          const uint8_t             remrem  = (uint8_t)tu_min16(wrap_bytes, sizeof(fixed_access_item_t) - rem);
-          const fixed_access_item_t scatter = (fixed_access_item_t)tu_scatter_read32(ff_buf, rem, f->buffer, remrem);
+      // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
+      const uint8_t rem = lin_bytes & STRIDE_REMAIN_MASK;
+      if (rem > 0) {
+        const uint8_t       remrem  = (uint8_t)tu_min16(wrap_bytes, sizeof(stride_item_t) - rem);
+        const stride_item_t scatter = (stride_item_t)tu_scatter_read32(ff_buf, rem, f->buffer, remrem);
 
-          *reg_tx = scatter;
+        *stride_dst = scatter;
 
-          wrap_bytes -= remrem;
-          ff_buf = f->buffer + remrem; // wrap around
-        } else {
-          ff_buf = f->buffer;          // wrap around to beginning
-        }
+        wrap_bytes -= remrem;
+        ff_buf = f->buffer + remrem; // wrap around
+      } else {
+        ff_buf = f->buffer;          // wrap around to beginning
+      }
 
-        // Read data wrapped part
-        if (wrap_bytes > 0) {
-          ff_pull_fixed_addr(reg_tx, ff_buf, wrap_bytes);
-        }
+      // Read data wrapped part
+      if (wrap_bytes > 0) {
+        ff_pull_stride(stride_dst, ff_buf, wrap_bytes);
       }
-      break;
     }
+  } else
 #endif
-
-    default:
-      break; // unknown mode
+  {
+    // single byte access
+    if (n <= lin_bytes) {
+      // Linear only
+      memcpy(app_buf, ff_buf, n);
+    } else {
+      // Wrap around
+      memcpy(app_buf, ff_buf, lin_bytes);                            // linear part
+      memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); // wrapped part
+    }
   }
 }
 
@@ -332,7 +332,7 @@ static uint16_t correct_read_index(tu_fifo_t *f, uint16_t wr_idx) {
 // Works on local copies of w and r
 // Must be protected by read mutex since in case of an overflow read pointer gets modified
 uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx,
-                                    tu_fifo_access_mode_t access_mode) {
+                                    bool stride_mode) {
   uint16_t count = tu_ff_overflow_count(f->depth, wr_idx, rd_idx);
   if (count == 0) {
     return 0; // nothing to peek
@@ -349,7 +349,7 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
   }
 
   const uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
-  ff_pull_n(f, p_buffer, n, rd_ptr, access_mode);
+  ff_pull_n(f, p_buffer, n, rd_ptr, stride_mode);
 
   return n;
 }
@@ -357,17 +357,17 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
 // Read n items without removing it from the FIFO, correct read pointer if overflowed
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
   ff_lock(f->mutex_rd);
-  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_INC_ADDR_RW8);
+  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, false);
   ff_unlock(f->mutex_rd);
   return ret;
 }
 
 // Read n items from fifo with access mode
-uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode) {
+uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, bool stride_mode) {
   ff_lock(f->mutex_rd);
 
   // Peek the data: f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  n         = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, access_mode);
+  n         = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, stride_mode);
   f->rd_idx = advance_index(f->depth, f->rd_idx, n);
 
   ff_unlock(f->mutex_rd);
@@ -375,8 +375,7 @@ uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_f
 }
 
 // Write n items to fifo with access mode
-uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, uint8_t data_stride,
-                                     uint8_t addr_stride) {
+uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, bool stride_mode) {
   if (n == 0) {
     return 0;
   }
@@ -402,7 +401,7 @@ uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n,
     // function! Since it would end up in a race condition with read functions!
     if (n >= f->depth) {
       // Only copy last part
-      if (data_stride == TU_FIFO_INC_ADDR_RW8) {
+      if (!stride_mode) {
         buf8 += (n - f->depth);
       } else {
         // TODO should read from hw fifo to discard data, however reading an odd number could
@@ -438,7 +437,7 @@ uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n,
     const uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
     TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr);
 
-    ff_push_n(f, buf8, n, wr_ptr, data_stride, addr_stride);
+    ff_push_n(f, buf8, n, wr_ptr, stride_mode);
     f->wr_idx = advance_index(f->depth, wr_idx, n);
 
     TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index b48cf4cea..7623d4c4f 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -32,35 +32,31 @@
 extern "C" {
 #endif
 
-// Due to the use of unmasked pointers, this FIFO does not suffer from losing
-// one item slice. Furthermore, write and read operations are completely
-// decoupled as write and read functions do not modify a common state. Henceforth,
-// writing or reading from the FIFO within an ISR is safe as long as no other
-// process (thread or ISR) interferes.
-// Also, this FIFO is ready to be used in combination with a DMA as the write and
-// read pointers can be updated from within a DMA ISR. Overflows are detectable
-// within a certain number (see tu_fifo_overflow()).
-
 #include "common/tusb_common.h"
 #include "osal/osal.h"
 
-// mutex is only needed for RTOS
-// for OS None, we don't get preempted
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+// mutex is only needed for RTOS. For OS None, we don't get preempted
 #define CFG_FIFO_MUTEX      OSAL_MUTEX_REQUIRED
 
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO || CFG_TUH_EDPT_DEDICATED_HWFIFO
-  #ifndef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH
-    #define CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH 32
-  #endif
+#ifndef CFG_TUSB_FIFO_ACCESS_DATA_STRIDE
+  #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 0
 #endif
 
-#ifndef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH
-  #define CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH 0
+#ifndef CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
+  #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 0
 #endif
 
-#ifndef CFG_TUSB_FIFO_MULTI_BYTES_ACCESS
-  #define CFG_TUSB_FIFO_MULTI_BYTES_ACCESS 0
-#endif
+// Due to the use of unmasked pointers, this FIFO does not suffer from losing
+// one item slice. Furthermore, write and read operations are completely
+// decoupled as write and read functions do not modify a common state. Henceforth,
+// writing or reading from the FIFO within an ISR is safe as long as no other
+// process (thread or ISR) interferes.
+// Also, this FIFO is ready to be used in combination with a DMA as the write and
+// read pointers can be updated from within a DMA ISR. Overflows are detectable
+// within a certain number (see tu_fifo_overflow()).
 
 /* Write/Read "pointer" is in the range of: 0 .. depth - 1, and is used to get the fifo data.
  * Write/Read "index" is always in the range of: 0 .. 2*depth-1
@@ -122,6 +118,7 @@ typedef struct {
   uint8_t *buffer;              // buffer pointer
   uint16_t depth;               // max items
   bool     overwritable;        // ovwerwritable when full
+  // 1 byte padding  here
 
   volatile uint16_t wr_idx;     // write index TODO maybe can drop volatile
   volatile uint16_t rd_idx;     // read index
@@ -151,12 +148,10 @@ typedef struct {
   uint8_t   _name##_buf[_depth];                                     \
   tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _overwritable)
 
-// Write modes intended to allow special read and write functions to be able to
-// copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others
-typedef enum {
-  TU_FIFO_INC_ADDR_RW8,    // increased address read/write by bytes - normal (default) mode
-  TU_FIFO_FIXED_ADDR_RW32, // fixed address read/write by 2/4 bytes (items).
-} tu_fifo_access_mode_t;
+// Moving data from tusb_fifo <-> USB hardware FIFOs e.g. STM32s need to use a special stride mode which reads/writes
+// data in 2/4 byte chunks from/to a fixed address (USB FIFO register) instead of incrementing the address. For this use
+// read/write access_mode with stride_mode = true. The STRIPE DATA and ADDR stride must be configured with
+// CFG_TUSB_FIFO_ACCESS_DATA_STRIDE and CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE
 
 //--------------------------------------------------------------------+
 // Setup API
@@ -196,7 +191,7 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
 // peek() will correct/re-index read pointer in case of an overflowed fifo to form a full fifo
 //--------------------------------------------------------------------+
 uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx,
-                                    tu_fifo_access_mode_t access_mode);
+                                    bool stride_mode);
 bool     tu_fifo_peek(tu_fifo_t *f, void *p_buffer);
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
 
@@ -204,14 +199,10 @@ uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
 // Read API
 // peek() + advance read index
 //--------------------------------------------------------------------+
-uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode);
+uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, bool stride_mode);
 bool     tu_fifo_read(tu_fifo_t *f, void *buffer);
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) {
-  return tu_fifo_read_n_access_mode(f, buffer, n, TU_FIFO_INC_ADDR_RW8);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_read_n_fixed_addr(tu_fifo_t *f, void *buffer, uint16_t n) {
-  return tu_fifo_read_n_access_mode(f, buffer, n, TU_FIFO_FIXED_ADDR_RW32);
+  return tu_fifo_read_n_access_mode(f, buffer, n, false);
 }
 
 // discard first n items from fifo i.e advance read pointer by n with mutex
@@ -221,11 +212,10 @@ uint16_t tu_fifo_discard_n(tu_fifo_t *f, uint16_t n);
 //--------------------------------------------------------------------+
 // Write API
 //--------------------------------------------------------------------+
-uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, uint8_t data_stride,
-                                     uint8_t addr_stride);
+uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, bool stride_mode);
 bool     tu_fifo_write(tu_fifo_t *f, const void *data);
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) {
-  return tu_fifo_write_n_access_mode(f, data, n, 1, 1);
+  return tu_fifo_write_n_access_mode(f, data, n, false);
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index 1faac2aa8..4115eecc5 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -437,7 +437,7 @@ void dcd_int_handler(uint8_t rhport)
           // write to EP fifo
 #if 0 // TODO support dcd_edpt_xfer_fifo
           if (xfer->ff) {
-            tu_fifo_read_n_access_mode(xfer->ff, (void *) &UDP->UDP_FDR[epnum], xact_len, TU_FIFO_FIXED_ADDR_RW32);
+            tu_fifo_read_n_access_mode(xfer->ff, (void *) &UDP->UDP_FDR[epnum], xact_len, true);
           }
           else
 #endif
@@ -471,7 +471,7 @@ void dcd_int_handler(uint8_t rhport)
         // Read from EP fifo
 #if 0 // TODO support dcd_edpt_xfer_fifo API
         if (xfer->ff) {
-          tu_fifo_write_n_access_mode(xfer->ff, (const void *) &UDP->UDP_FDR[epnum], xact_len, TU_FIFO_FIXED_ADDR_RW32);
+          tu_fifo_write_n_access_mode(xfer->ff, (const void *) &UDP->UDP_FDR[epnum], xact_len, true);
         }
         else
 #endif
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index 91b876718..ca17d6251 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -194,7 +194,7 @@ static void dcd_userEP_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
   /* provided buffers are thankfully 32-bit aligned, allowing most data to be transferred as 32-bit */
 #if 0 // TODO support dcd_edpt_xfer_fifo API
   if (xfer->ff) {
-    tu_fifo_read_n_access_mode(xfer->ff, (void *) (&ep->EPDAT_BYTE), bytes_now, TU_FIFO_FIXED_ADDR_RW32);
+    tu_fifo_read_n_access_mode(xfer->ff, (void *) (&ep->EPDAT_BYTE), bytes_now, true);
   }
   else
 #endif
@@ -696,7 +696,7 @@ void dcd_int_handler(uint8_t rhport)
           /* copy the data from the PC to the previously provided buffer */
 #if 0 // TODO support dcd_edpt_xfer_fifo API
           if (xfer->ff) {
-            tu_fifo_write_n_access_mode(xfer->ff, (const void *) &ep->EPDAT_BYTE, tu_min16(available_bytes, xfer->total_bytes - xfer->out_bytes_so_far), TU_FIFO_FIXED_ADDR_RW32);
+            tu_fifo_write_n_access_mode(xfer->ff, (const void *) &ep->EPDAT_BYTE, tu_min16(available_bytes, xfer->total_bytes - xfer->out_bytes_so_far), true);
           }
           else
 #endif
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index aacef691f..8c97eaa2f 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -367,7 +367,7 @@ static uint16_t epin_write_tx_fifo(dwc2_regs_t *dwc2, uint8_t epnum) {
     // Push packet to Tx-FIFO
     if (xfer->ff) {
       volatile uint32_t* tx_fifo = dwc2->fifo[epnum];
-      tu_fifo_read_n_access_mode(xfer->ff, (void *)(uintptr_t)tx_fifo, xact_bytes, TU_FIFO_FIXED_ADDR_RW32);
+      tu_fifo_read_n_access_mode(xfer->ff, (void *)(uintptr_t)tx_fifo, xact_bytes, true);
       total_bytes_written += xact_bytes;
     } else {
       dfifo_write_packet(dwc2, epnum, xfer->buffer, xact_bytes);
@@ -889,8 +889,7 @@ static void handle_rxflvl_irq(uint8_t rhport) {
       if (byte_count != 0) {
         // Read packet off RxFIFO
         if (xfer->ff != NULL) {
-          tu_fifo_write_n_access_mode(xfer->ff, (const void *)(uintptr_t)rx_fifo, byte_count, TU_FIFO_FIXED_ADDR_RW32,
-                                      0);
+          tu_fifo_write_n_access_mode(xfer->ff, (const void *)(uintptr_t)rx_fifo, byte_count, true);
         } else {
           dfifo_read_packet(dwc2, xfer->buffer, byte_count);
           xfer->buffer += byte_count;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index de54d33d8..a0f4e7057 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -307,7 +307,8 @@
 #if defined(TUP_USBIP_DWC2)
   #if CFG_TUD_DWC2_SLAVE_ENABLE && !CFG_TUD_DWC2_DMA_ENABLE
     #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
-    #define CFG_TUSB_FIFO_MULTI_BYTES_ACCESS 1
+    #define CFG_TUSB_FIFO_ACCESS_DATA_STRIDE 4 // 32bit access
+    #define CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE 0 // fixed hwfifo address
   #endif
 
   #if CFG_TUH_DWC2_SLAVE_ENABLE && !CFG_TUH_DWC2_DMA_ENABLE
diff --git a/test/unit-test/project.yml b/test/unit-test/project.yml
index d7646ca7f..ea20c5f72 100644
--- a/test/unit-test/project.yml
+++ b/test/unit-test/project.yml
@@ -128,8 +128,8 @@
 :defines:
   :test:
     - _UNITY_TEST_
-    - CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_WIDTH=32
-    - CFG_TUSB_FIFO_MULTI_BYTES_ACCESS=1
+    - CFG_TUSB_FIFO_ACCESS_DATA_STRIDE=4
+    - CFG_TUSB_FIFO_ACCESS_ADDR_STRIDE=0
   :release: []
 
   # Enable to inject name of a test as a unique compilation symbol into its respective executable build.
diff --git a/test/unit-test/test/test_fifo.c b/test/unit-test/test/test_fifo.c
index d0e3c2d37..453930a2f 100644
--- a/test/unit-test/test/test_fifo.c
+++ b/test/unit-test/test/test_fifo.c
@@ -403,7 +403,7 @@ void test_write_n_fixed_addr_rw32_nowrap(void) {
 
   for (uint8_t n = 1; n <= 8; n++) {
     tu_fifo_clear(ff);
-    uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)&reg, n, sizeof(uint32_t), 0);
+    uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)&reg, n, true);
     TEST_ASSERT_EQUAL(n, written);
     TEST_ASSERT_EQUAL(n, tu_fifo_count(ff));
 
@@ -425,7 +425,7 @@ void test_write_n_fixed_addr_rw32_wrapped(void) {
     ff->wr_idx = FIFO_SIZE - 3;
     ff->rd_idx = FIFO_SIZE - 3;
 
-    uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)&reg, n, sizeof(uint32_t), 0);
+    uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)&reg, n, true);
     TEST_ASSERT_EQUAL(n, written);
     TEST_ASSERT_EQUAL(n, tu_fifo_count(ff));
 
@@ -445,7 +445,7 @@ void test_read_n_fixed_addr_rw32_nowrap(void) {
     tu_fifo_write_n(ff, pattern, 8);
 
     uint32_t reg      = 0;
-    uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, &reg, n, TU_FIFO_FIXED_ADDR_RW32);
+    uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, &reg, n, true);
     TEST_ASSERT_EQUAL(n, read_cnt);
     TEST_ASSERT_EQUAL(8 - n, tu_fifo_count(ff));
 
@@ -469,7 +469,7 @@ void test_read_n_fixed_addr_rw32_wrapped(void) {
     }
 
     uint32_t reg      = 0;
-    uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, &reg, n, TU_FIFO_FIXED_ADDR_RW32);
+    uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, &reg, n, true);
     TEST_ASSERT_EQUAL(n, read_cnt);
     TEST_ASSERT_EQUAL(0, tu_fifo_count(ff));