summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorhathach <[email protected]>2013-06-14 19:06:33 +0700
committerhathach <[email protected]>2013-06-14 19:06:33 +0700
commitf219a9c77da1b8e29e119118d86b3499448478f6 (patch)
tree6a8a1eafb39b4cc1e0c65389113018eda0d1a1a0
parent40b65b265c4a8d2de06b9164829169d629dbd847 (diff)
add dcd_pipe_control_read
-rw-r--r--tinyusb/class/hid_device.c4
-rw-r--r--tinyusb/device/dcd.h2
-rw-r--r--tinyusb/device/dcd_lpc175x_6x.c27
-rw-r--r--tinyusb/device/usbd.c8
4 files changed, 30 insertions, 11 deletions
diff --git a/tinyusb/class/hid_device.c b/tinyusb/class/hid_device.c
index 8ae673560..2aba541bb 100644
--- a/tinyusb/class/hid_device.c
+++ b/tinyusb/class/hid_device.c
@@ -94,7 +94,9 @@ tusb_error_t hidd_control_request(uint8_t coreid, tusb_std_request_t const * p_r
case HID_REQUEST_CONTROL_SET_REPORT:
// TODO hidd set report, has data phase
-// dcd_pipe_control_read(coreid, .....
+// TODO verify data read from control pipe
+// ; uint8_t hehe[10]= { 0 };
+// dcd_pipe_control_read(coreid, hehe, p_request->wLength);
break;
case HID_REQUEST_CONTROL_GET_REPORT:
diff --git a/tinyusb/device/dcd.h b/tinyusb/device/dcd.h
index 01eae9413..0ae804d08 100644
--- a/tinyusb/device/dcd.h
+++ b/tinyusb/device/dcd.h
@@ -63,7 +63,7 @@ void dcd_controller_connect(uint8_t coreid);
void dcd_isr(uint8_t coreid);
tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_t length);
-tusb_error_t dcd_pipe_control_read(uint8_t coreid, void const * buffer, uint16_t length);
+tusb_error_t dcd_pipe_control_read(uint8_t coreid, void * buffer, uint16_t length);
void dcd_pipe_control_write_zero_length(uint8_t coreid);
tusb_error_t dcd_endpoint_configure(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc) ATTR_WARN_UNUSED_RESULT;
diff --git a/tinyusb/device/dcd_lpc175x_6x.c b/tinyusb/device/dcd_lpc175x_6x.c
index dc19bb54e..cd5310284 100644
--- a/tinyusb/device/dcd_lpc175x_6x.c
+++ b/tinyusb/device/dcd_lpc175x_6x.c
@@ -101,7 +101,6 @@ static inline uint32_t sie_command_read (uint8_t cmd_code, uint8_t data_len)
//--------------------------------------------------------------------+
// IMPLEMENTATION
//--------------------------------------------------------------------+
-
void endpoint_control_isr(uint8_t coreid)
{
(void) coreid; // suppress compiler warning
@@ -248,9 +247,9 @@ tusb_error_t dcd_endpoint_configure(uint8_t coreid, tusb_descriptor_endpoint_t c
endpoint_set_max_packet_size(phy_ep, p_endpoint_desc->wMaxPacketSize.size);
#ifndef _TEST_
- while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0) {} // TODO can be omitted
-#endif
+ while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0) {} // TODO can be omitted, or move to set max packet size
LPC_USB->USBDevIntClr = DEV_INT_ENDPOINT_REALIZED_MASK;
+#endif
//------------- DMA set up -------------//
memclr_(dcd_dd + phy_ep, sizeof(dcd_dma_descriptor_t));
@@ -281,6 +280,12 @@ void dcd_device_set_configuration(uint8_t coreid, uint8_t config_num)
sie_command_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1);
}
+static inline uint16_t length_unit_byte2dword(uint16_t length_in_bytes) ATTR_ALWAYS_INLINE ATTR_CONST;
+static inline uint16_t length_unit_byte2dword(uint16_t length_in_bytes)
+{
+ return (length_in_bytes + 3) / 4; // length_in_dword
+}
+
tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_t length)
{
(void) coreid; // suppress compiler warning
@@ -290,7 +295,7 @@ tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_
LPC_USB->USBCtrl = SLAVE_CONTROL_WRITE_ENABLE_MASK; // logical endpoint = 0
LPC_USB->USBTxPLen = length;
- for (uint16_t count = 0; count < (length + 3) / 4; count++)
+ for (uint16_t count = 0; count < length_unit_byte2dword(length); count++)
{
LPC_USB->USBTxData = *((uint32_t *)buffer); // NOTE: cortex M3 have no problem with alignment
buffer += 4;
@@ -304,8 +309,20 @@ tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_
return TUSB_ERROR_NONE;
}
-tusb_error_t dcd_pipe_control_read(uint8_t coreid, void const * buffer, uint16_t length)
+tusb_error_t dcd_pipe_control_read(uint8_t coreid, void * buffer, uint16_t length)
{
+ LPC_USB->USBCtrl = SLAVE_CONTROL_READ_ENABLE_MASK; // logical endpoint = 0
+ while ((LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_READY_MASK) == 0) {}
+
+ uint16_t actual_length = min16_of(length, (uint16_t) (LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_LENGTH_MASK) );
+ uint32_t *p_read_data = (uint32_t*) buffer;
+ for( uint16_t count=0; count < length_unit_byte2dword(actual_length); count++)
+ {
+ *p_read_data = LPC_USB->USBRxData;
+ p_read_data++; // increase by 4 ( sizeof(uint32_t) )
+ }
+ LPC_USB->USBCtrl = 0;
+
return TUSB_ERROR_NONE;
}
diff --git a/tinyusb/device/usbd.c b/tinyusb/device/usbd.c
index 252363527..e827c9213 100644
--- a/tinyusb/device/usbd.c
+++ b/tinyusb/device/usbd.c
@@ -72,10 +72,10 @@ static tusb_error_t usbd_string_descriptor_init(void);
//--------------------------------------------------------------------+
// APPLICATION INTERFACE
//--------------------------------------------------------------------+
-//bool tusbd_is_configured(uint8_t coreid)
-//{
-//
-//}
+bool tusbd_is_configured(uint8_t coreid)
+{
+ return usbd_devices[coreid].state == TUSB_DEVICE_STATE_CONFIGURED;
+}
void usbd_bus_reset(uint32_t coreid)
{