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authorhathach <[email protected]>2019-07-19 21:19:06 +0700
committerhathach <[email protected]>2019-07-19 21:19:06 +0700
commitfa12a0e78685c2407a0961f794918b177e5d5e38 (patch)
treebe4e5c2e1acf565eaaa0427f4389969d0875bea7
parente9092708439e32b8eb68ca8302bb409628364ace (diff)
adding stm32f411 disco
compile ok
-rw-r--r--hw/bsp/stm32f411disco/STM32F411VETx_FLASH.ld169
-rw-r--r--hw/bsp/stm32f411disco/board.mk41
-rw-r--r--hw/bsp/stm32f411disco/board_stm32f411disco.c132
3 files changed, 342 insertions, 0 deletions
diff --git a/hw/bsp/stm32f411disco/STM32F411VETx_FLASH.ld b/hw/bsp/stm32f411disco/STM32F411VETx_FLASH.ld
new file mode 100644
index 000000000..3a0ce526f
--- /dev/null
+++ b/hw/bsp/stm32f411disco/STM32F411VETx_FLASH.ld
@@ -0,0 +1,169 @@
+/*
+*****************************************************************************
+**
+
+** File : LinkerScript.ld
+**
+** Abstract : Linker script for STM32F411VETx Device with
+** 512KByte FLASH, 128KByte RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+** (c)Copyright Ac6.
+** You may use this file as-is or modify it according to the needs of your
+** project. Distribution of this file (unmodified or modified) is not
+** permitted. Ac6 permit registered System Workbench for MCU users the
+** rights to distribute the assembled, compiled & linked contents of this
+** file as part of an application binary file, provided that it is built
+** using the System Workbench for MCU toolchain.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;; /* required amount of heap */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
+RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM AT> FLASH
+
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+
diff --git a/hw/bsp/stm32f411disco/board.mk b/hw/bsp/stm32f411disco/board.mk
new file mode 100644
index 000000000..43783f589
--- /dev/null
+++ b/hw/bsp/stm32f411disco/board.mk
@@ -0,0 +1,41 @@
+CFLAGS += \
+ -DHSE_VALUE=8000000 \
+ -DSTM32F411xE \
+ -mthumb \
+ -mabi=aapcs-linux \
+ -mcpu=cortex-m4 \
+ -mfloat-abi=hard \
+ -mfpu=fpv4-sp-d16 \
+ -nostdlib -nostartfiles \
+ -DCFG_TUSB_MCU=OPT_MCU_STM32F4
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/stm32f411disco/STM32F411VETx_FLASH.ld
+
+SRC_C += \
+ hw/mcu/st/system-init/system_stm32f4xx.c
+
+SRC_S += \
+ hw/mcu/st/startup/stm32f4/startup_stm32f411xe.s
+
+INC += \
+ $(TOP)/hw/mcu/st/stm32lib/CMSIS/STM32F4xx/Include \
+ $(TOP)/hw/mcu/st/cmsis
+
+# For TinyUSB port source
+VENDOR = st
+CHIP_FAMILY = stm32f4
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM4F
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f407vg
+JLINK_IF = swd
+
+# Path to STM32 Cube Programmer CLI, should be added into system path
+STM32Prog = STM32_Programmer_CLI
+
+# flash target using on-board stlink
+flash: $(BUILD)/$(BOARD)-firmware.elf
+ $(STM32Prog) --connect port=swd --write $< --go
diff --git a/hw/bsp/stm32f411disco/board_stm32f411disco.c b/hw/bsp/stm32f411disco/board_stm32f411disco.c
new file mode 100644
index 000000000..c5695733c
--- /dev/null
+++ b/hw/bsp/stm32f411disco/board_stm32f411disco.c
@@ -0,0 +1,132 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+
+#include "stm32f4xx.h"
+
+void board_init(void)
+{
+ // Init the LED on PD14
+ RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
+ GPIOD->MODER |= GPIO_MODER_MODE14_0;
+
+ // TODO Button
+
+ // USB Clock init
+ // PLL input- 8 MHz (External oscillator clock; HSI clock tolerance isn't
+ // tight enough- 1%, need 0.25%)
+ // VCO input- 1 to 2 MHz (2 MHz, M = 4)
+ // VCO output- 100 to 432 MHz (144 MHz, N = 72)
+ // Main PLL out- <= 180 MHz (18 MHz, P = 3- divides by 8)
+ // USB PLL out- 48 MHz (Q = 3)
+ RCC->PLLCFGR = RCC_PLLCFGR_PLLSRC_HSE | (3 << RCC_PLLCFGR_PLLQ_Pos) | \
+ (3 << RCC_PLLCFGR_PLLP_Pos) | (72 << RCC_PLLCFGR_PLLN_Pos) | \
+ (4 << RCC_PLLCFGR_PLLM_Pos);
+
+ // Wait for external clock to become ready
+ RCC->CR |= RCC_CR_HSEON;
+ while(!(RCC->CR & RCC_CR_HSERDY_Msk));
+
+ // Wait for PLL to become ready
+ RCC->CR |= RCC_CR_PLLON;
+ while(!(RCC->CR & RCC_CR_PLLRDY_Msk));
+
+ // Switch clocks!
+ RCC->CFGR |= RCC_CFGR_SW_1;
+
+ // Notify runtime of frequency change.
+ SystemCoreClockUpdate();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+ // 1ms tick timer
+ SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+ // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+ //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+ RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
+
+ // USB Pin Init
+ // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP
+ // PC0- Power on
+ RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
+ GPIOA->MODER |= GPIO_MODER_MODE9_1 | GPIO_MODER_MODE10_1 | \
+ GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1;
+ GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL9_Pos) | \
+ (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | \
+ (10 << GPIO_AFRH_AFSEL12_Pos);
+
+ // Pullup required on ID, despite the manual claiming there's an
+ // internal pullup already (page 1245, Rev 17)
+ GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0;
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+ if (!state) {
+ GPIOD->BSRR = GPIO_BSRR_BR14;
+ } else {
+ GPIOD->BSRR = GPIO_BSRR_BS14;
+ }
+}
+
+uint32_t board_button_read(void)
+{
+ // TODO implement
+ return 0;
+}
+
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+ system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+ return system_ticks;
+}
+#endif
+
+void HardFault_Handler (void)
+{
+ asm("bkpt");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}