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authorhathach <[email protected]>2018-11-22 17:40:20 +0700
committerhathach <[email protected]>2018-11-22 17:40:20 +0700
commit569e85a0c0a80848e3076b64363ce0e589d3a604 (patch)
treeaebb98121194b9a4333d4933701ce25a79baf071 /examples/device/cdc_msc_hid/src
parent60d8cde6951fa9fe9c43064ee701598e9da566f7 (diff)
cdc work ok with lpc43xx
Diffstat (limited to 'examples/device/cdc_msc_hid/src')
-rw-r--r--examples/device/cdc_msc_hid/src/tusb_config.h18
1 files changed, 13 insertions, 5 deletions
diff --git a/examples/device/cdc_msc_hid/src/tusb_config.h b/examples/device/cdc_msc_hid/src/tusb_config.h
index 3af109188..9bc97ecff 100644
--- a/examples/device/cdc_msc_hid/src/tusb_config.h
+++ b/examples/device/cdc_msc_hid/src/tusb_config.h
@@ -58,16 +58,24 @@
#define CFG_TUSB_DEBUG 2
#define CFG_TUSB_OS OPT_OS_NONE
-//--------------------------------------------------------------------
-// USB RAM PLACEMENT
-//--------------------------------------------------------------------
-#define CFG_TUSB_ATTR_USBRAM
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
+#endif
//--------------------------------------------------------------------
// DEVICE CONFIGURATION
//--------------------------------------------------------------------
-
#define CFG_TUD_ENDOINT0_SIZE 64
/*------------- Descriptors -------------*/