diff options
| author | hathach <[email protected]> | 2018-11-22 17:21:07 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2018-11-22 17:21:07 +0700 |
| commit | 60d8cde6951fa9fe9c43064ee701598e9da566f7 (patch) | |
| tree | dc8e7d25e7d5fd070c650b250491558d48b56aa4 /examples/obsolete/device/src/tusb_config.h | |
| parent | b20cb8852adc30f619fb15aaf30bf7e6a9d644a4 (diff) | |
rename CFG_TUSB_MEM_SECTION to CFG_TUSB_MEM_SECTION
Diffstat (limited to 'examples/obsolete/device/src/tusb_config.h')
| -rw-r--r-- | examples/obsolete/device/src/tusb_config.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/examples/obsolete/device/src/tusb_config.h b/examples/obsolete/device/src/tusb_config.h index 7b7c82299..c5739038f 100644 --- a/examples/obsolete/device/src/tusb_config.h +++ b/examples/obsolete/device/src/tusb_config.h @@ -97,31 +97,31 @@ #ifdef __CODE_RED // compiled with lpcxpresso #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned #elif CFG_TUSB_MCU == OPT_MCU_LPC175X_6X - #define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all + #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM3) + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM3) #endif #elif defined __CC_ARM // Compiled with Keil armcc, USBRAM_SECTION is defined in scatter files #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned #elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - #define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address + #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM // Use keil tool configure to have AHB SRAM as default memory + #define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory #endif #elif defined __ICCARM__ // compiled with IAR #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64) + #define CFG_TUSB_MEM_SECTION _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64) #elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - #define CFG_TUSB_ATTR_USBRAM + #define CFG_TUSB_MEM_SECTION #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".ahb_sram1\"") + #define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"") #endif #else |