diff options
| author | hathach <[email protected]> | 2018-09-11 22:37:44 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2018-09-11 22:37:44 +0700 |
| commit | 3b79ba845185893f6ce4b55ac40d529b7798982e (patch) | |
| tree | 4c69648b30db54d4f03d6e30dda87f075eca404b /examples | |
| parent | 154daf584c01fd2131d92233535c83ee15c246a2 (diff) | |
update qspi
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/device/nrf52840/src/msc_flash_qspi.c | 53 |
1 files changed, 25 insertions, 28 deletions
diff --git a/examples/device/nrf52840/src/msc_flash_qspi.c b/examples/device/nrf52840/src/msc_flash_qspi.c index c2cca9b20..d8058d8ac 100644 --- a/examples/device/nrf52840/src/msc_flash_qspi.c +++ b/examples/device/nrf52840/src/msc_flash_qspi.c @@ -68,28 +68,24 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff { uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset; + switch ( _fl_state ) + { + case FLASH_STATE_IDLE: + _fl_state = FLASH_STATE_BUSY; + flash_read(buffer, addr, bufsize); + return 0; // data not ready -// switch ( _fl_state ) -// { -// case FLASH_STATE_IDLE: -// _fl_state = FLASH_STATE_BUSY; -// flash_read(buffer, addr, bufsize); -// return 0; // data not ready -// -// case FLASH_STATE_BUSY: -// return 0; // data not ready -// -// case FLASH_STATE_COMPLETE: -// _fl_state = FLASH_STATE_IDLE; -// return bufsize; -// -// default: -// _fl_state = FLASH_STATE_IDLE; -// return -1; -// } + case FLASH_STATE_BUSY: + return 0; // data not ready - flash_read(buffer, addr, bufsize); - return bufsize; + case FLASH_STATE_COMPLETE: + _fl_state = FLASH_STATE_IDLE; + return bufsize; + + default: + _fl_state = FLASH_STATE_IDLE; + return -1; + } } // Callback invoked when received WRITE10 command. @@ -128,16 +124,16 @@ void flash_flush (void) if ( _fl_addr == NO_CACHE ) return; TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, _fl_addr),); -// while ( _fl_state != FLASH_STATE_COMPLETE ) -// { -// } -// _fl_state = FLASH_STATE_IDLE; + while ( _fl_state != FLASH_STATE_COMPLETE ) + { + } + _fl_state = FLASH_STATE_IDLE; TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_write(_fl_buf, FLASH_PAGE_SIZE, _fl_addr),); -// while ( _fl_state != FLASH_STATE_COMPLETE ) -// { -// } -// _fl_state = FLASH_STATE_IDLE; + while ( _fl_state != FLASH_STATE_COMPLETE ) + { + } + _fl_state = FLASH_STATE_IDLE; _fl_addr = NO_CACHE; } @@ -153,6 +149,7 @@ void flash_write (uint32_t dst, const void *src, int len) flash_read(_fl_buf, newAddr, FLASH_PAGE_SIZE); } + memcpy(_fl_buf + (dst & (FLASH_PAGE_SIZE - 1)), src, len); } |
