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authorhathach <[email protected]>2018-04-12 13:35:45 +0700
committerhathach <[email protected]>2018-04-12 13:35:45 +0700
commit6d8f4bca47d31ba4d114aa216042913031c56f1a (patch)
tree338d565fb389968b5ddb483f4ff5e25acc14bd0f /examples
parentfa780edfb8d28a618e7ca062edaa219295bc6c7d (diff)
clean up
Diffstat (limited to 'examples')
-rw-r--r--examples/obsolete/device/src/tusb_config.h14
1 files changed, 13 insertions, 1 deletions
diff --git a/examples/obsolete/device/src/tusb_config.h b/examples/obsolete/device/src/tusb_config.h
index 35101ff98..e2bd75baa 100644
--- a/examples/obsolete/device/src/tusb_config.h
+++ b/examples/obsolete/device/src/tusb_config.h
@@ -66,11 +66,23 @@
//--------------------------------------------------------------------+
// COMMON CONFIGURATION
//--------------------------------------------------------------------+
-#define CFG_TUSB_DEBUG 2
+#define CFG_TUSB_DEBUG 2
//#define CFG_TUSB_OS OPT_OS_NONE // be passed from IDE/command line for easy project switching
//#define CFG_TUSB_OS_TASK_PRIO 0 // be passed from IDE/command line for easy project switching
+
+/*------------------------------------------------------------------*/
+/* CLASS
+ *------------------------------------------------------------------*/
+
+// FIFO size of CDC TX and RX
+#define CFG_TUD_CDC_BUFSIZE 128
+
+// TX is sent automatically in Start of Frame event.
+// If not enabled, application must call tud_cdc_flush() periodically
+#define CFG_TUD_CDC_FLUSH_ON_SOF 1
+
//--------------------------------------------------------------------+
// USB RAM PLACEMENT
//--------------------------------------------------------------------+