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authorzhiqiang <[email protected]>2025-09-04 14:38:27 +0800
committerzhiqiang <[email protected]>2025-09-04 14:38:27 +0800
commitf6ca80ab13997d8fdee084d218c22ae15d734e2a (patch)
treeeca66dc58da7ae0b40bf70ed055bb49868232e0f /hw/bsp/at32f402_405
parent93487deab7449261fd42a2b7ceeffdbec469dc83 (diff)
modified the bsp files of at32 to make them work better
Diffstat (limited to 'hw/bsp/at32f402_405')
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f402/board.cmake8
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f402/board.h74
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f402/board.mk7
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f405/board.cmake9
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f405/board.h106
-rw-r--r--hw/bsp/at32f402_405/boards/at_start_f405/board.mk4
-rw-r--r--hw/bsp/at32f402_405/family.c32
-rw-r--r--hw/bsp/at32f402_405/family.cmake23
-rw-r--r--hw/bsp/at32f402_405/family.mk28
9 files changed, 159 insertions, 132 deletions
diff --git a/hw/bsp/at32f402_405/boards/at_start_f402/board.cmake b/hw/bsp/at32f402_405/boards/at_start_f402/board.cmake
new file mode 100644
index 000000000..4e7755c0f
--- /dev/null
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F402RCT7)
+set(MCU_LINKER_NAME AT32F402xC)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
diff --git a/hw/bsp/at32f402_405/boards/at_start_f402/board.h b/hw/bsp/at32f402_405/boards/at_start_f402/board.h
new file mode 100644
index 000000000..b11b7a80f
--- /dev/null
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.h
@@ -0,0 +1,74 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+ name: AT-START-F405
+ url: https://www.arterychip.com/en/product/AT32F405.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define USB_VBUS_IGNORE
+//#define USB_SOF_OUTPUT_ENABLE
+
+// LED
+#define LED_PORT GPIOF
+#define LED_PIN GPIO_PINS_4
+#define LED_STATE_ON 0 // Active Low
+#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT GPIOA
+#define BUTTON_PIN GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE 1
+#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+//USART
+#define PRINT_UART USART1
+#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN GPIO_PINS_9
+#define PRINT_UART_TX_GPIO GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
+
+//Vbus
+static inline void board_vbus_sense_init(void)
+{
+ *(int*)(0x50000038) |= (1<<21);
+ *(int*)(0x40040038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/at32f402_405/boards/at_start_f402/board.mk b/hw/bsp/at32f402_405/boards/at_start_f402/board.mk
new file mode 100644
index 000000000..f1082247b
--- /dev/null
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F402RCT7
+MCU_LINKER_NAME = AT32F402xC
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+ -D${MCU_VARIANT}
diff --git a/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake b/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
index 0d09680a1..39c5cd905 100644
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
@@ -3,6 +3,15 @@ set(MCU_LINKER_NAME AT32F405xC)
set(JLINK_DEVICE ${MCU_VARIANT})
+set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+
+if (NOT DEFINED RHPORT_DEVICE)
+ set(RHPORT_DEVICE 1)
+endif()
+if (NOT DEFINED RHPORT_HOST)
+ set(RHPORT_HOST 0)
+endif()
+
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()
diff --git a/hw/bsp/at32f402_405/boards/at_start_f405/board.h b/hw/bsp/at32f402_405/boards/at_start_f405/board.h
index 2d6cc3e57..b11b7a80f 100644
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.h
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.h
@@ -48,7 +48,7 @@
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE 0
+#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
//USART
@@ -60,111 +60,11 @@
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
-//USB
-#ifdef BOARD_TUD_RHPORT
- #if BOARD_TUD_RHPORT == 0
- #define USB_ID USB_OTG1_ID
- #define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
- #define OTG_IRQ OTGFS1_IRQn
- #define OTG_IRQ_HANDLER OTGFS1_IRQHandler
- #define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
- #define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
- #define OTG_WKUP_EXINT_LINE EXINT_LINE_18
- #define OTG_PIN_GPIO GPIOA
- #define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_VBUS GPIO_PINS_9
- #define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
- #define OTG_PIN_ID GPIO_PINS_10
- #define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
- #define OTG_PIN_SOF_GPIO GPIOA
- #define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_SOF GPIO_PINS_8
- #define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
- #define OTG_PIN_MUX GPIO_MUX_10
- #define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
- #elif BOARD_TUD_RHPORT == 1
- #define USB_ID USB_OTG2_ID
- #define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
- #define OTG_IRQ OTGHS_IRQn
- #define OTG_IRQ_HANDLER OTGHS_IRQHandler
- #define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
- #define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
- #define OTG_WKUP_EXINT_LINE EXINT_LINE_20
- #define OTG_PIN_GPIO GPIOB
- #define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
- #define OTG_PIN_VBUS GPIO_PINS_13
- #define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
- #define OTG_PIN_ID GPIO_PINS_12
- #define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
- #define OTG_PIN_SOF_GPIO GPIOA
- #define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_SOF GPIO_PINS_4
- #define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
- #define OTG_PIN_MUX GPIO_MUX_10
- #define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
- #endif
-#endif
-#ifdef BOARD_TUH_RHPORT
- #if BOARD_TUH_RHPORT == 0
- #define USB_ID USB_OTG1_ID
- #define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
- #define OTG_IRQ OTGFS1_IRQn
- #define OTG_IRQ_HANDLER OTGFS1_IRQHandler
- #define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
- #define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
- #define OTG_WKUP_EXINT_LINE EXINT_LINE_18
- #define OTG_PIN_GPIO GPIOA
- #define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_VBUS GPIO_PINS_9
- #define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
- #define OTG_PIN_ID GPIO_PINS_10
- #define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
- #define OTG_PIN_SOF_GPIO GPIOA
- #define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_SOF GPIO_PINS_8
- #define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
- #define OTG_PIN_MUX GPIO_MUX_10
- #define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
- #elif BOARD_TUH_RHPORT == 1
- #define USB_ID USB_OTG2_ID
- #define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
- #define OTG_IRQ OTGHS_IRQn
- #define OTG_IRQ_HANDLER OTGHS_IRQHandler
- #define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
- #define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
- #define OTG_WKUP_EXINT_LINE EXINT_LINE_20
- #define OTG_PIN_GPIO GPIOB
- #define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
- #define OTG_PIN_VBUS GPIO_PINS_13
- #define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
- #define OTG_PIN_ID GPIO_PINS_12
- #define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
- #define OTG_PIN_SOF_GPIO GPIOA
- #define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
- #define OTG_PIN_SOF GPIO_PINS_4
- #define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
- #define OTG_PIN_MUX GPIO_MUX_10
- #define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
- #endif
-#endif
-
//Vbus
static inline void board_vbus_sense_init(void)
{
- #ifdef BOARD_TUD_RHPORT
- #if BOARD_TUD_RHPORT == 0
- *(int*)(0x50000038) |= (1<<21);
- #elif BOARD_TUD_RHPORT == 1
- *(int*)(0x40040038) |= (1<<21);
- #endif
- #endif
- #ifdef BOARD_TUH_RHPORT
- #if BOARD_TUH_RHPORT == 0
- *(int*)(0x50000038) |= (1<<21);
- #elif BOARD_TUH_RHPORT == 1
- *(int*)(0x40040038) |= (1<<21);
- #endif
- #endif
+ *(int*)(0x50000038) |= (1<<21);
+ *(int*)(0x40040038) |= (1<<21);
}
#ifdef __cplusplus
diff --git a/hw/bsp/at32f402_405/boards/at_start_f405/board.mk b/hw/bsp/at32f402_405/boards/at_start_f405/board.mk
index 25a719ccf..b4d55ca8f 100644
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.mk
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.mk
@@ -3,5 +3,9 @@ MCU_LINKER_NAME = AT32F405xC
JLINK_DEVICE = ${MCU_VARIANT}
+RHPORT_SPEED = OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 0
+
CFLAGS += \
-D${MCU_VARIANT}
diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index 7d94f2564..6b69c0157 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -66,10 +66,11 @@ void board_init(void)
system_clock_config();
/* config usb io*/
- usb_gpio_config();
+ //usb_gpio_config();
/* enable usb clock */
- crm_periph_clock_enable(OTG_CLOCK, TRUE);
+ crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
+ crm_periph_clock_enable(CRM_OTGHS_PERIPH_CLOCK, TRUE);
/* select usb 48m clcok source */
usb_clock48m_select(USB_CLK_HEXT);
@@ -82,9 +83,11 @@ void board_init(void)
#if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
- NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+ NVIC_SetPriority(OTGHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+ NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#else
- NVIC_SetPriority(OTG_IRQ, 0);
+ NVIC_SetPriority(OTGHS_IRQn, 0);
+ NVIC_SetPriority(OTGFS1_IRQn, 0);
#endif
/* config led and key */
@@ -160,26 +163,7 @@ void usb_clock48m_select(usb_clk48_s clk_s)
void usb_gpio_config(void)
{
- gpio_init_type gpio_init_struct;
- crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
- gpio_default_para_init(&gpio_init_struct);
- gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
- gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
- gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
- gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
- #ifdef USB_SOF_OUTPUT_ENABLE
- crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
- gpio_init_struct.gpio_pins = OTG_PIN_SOF;
- gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
- gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
- #endif
- /* otgfs use vbus pin */
- #ifndef USB_VBUS_IGNORE
- gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
- gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
- gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
- gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
- #endif
+ /*if needed*/
}
/**
diff --git a/hw/bsp/at32f402_405/family.cmake b/hw/bsp/at32f402_405/family.cmake
index 010e36b88..b10760cef 100644
--- a/hw/bsp/at32f402_405/family.cmake
+++ b/hw/bsp/at32f402_405/family.cmake
@@ -14,6 +14,23 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
+if (NOT DEFINED RHPORT_DEVICE)
+ set(RHPORT_DEVICE 0)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+ set(RHPORT_HOST 0)
+endif ()
+
+if (NOT DEFINED RHPORT_SPEED)
+ set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_DEVICE_SPEED)
+ list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_HOST_SPEED)
+ list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+endif ()
+
#------------------------------------
# BOARD_TARGET
#------------------------------------
@@ -50,8 +67,10 @@ function(add_board_target BOARD_TARGET)
${AT32_SDK_LIB}/drivers/inc
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
- BOARD_TUD_RHPORT=0
- BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+ BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+ BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+ BOARD_TUH_RHPORT=${RHPORT_HOST}
+ BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
)
update_board(${BOARD_TARGET})
diff --git a/hw/bsp/at32f402_405/family.mk b/hw/bsp/at32f402_405/family.mk
index 60a0f93e9..09b2f1139 100644
--- a/hw/bsp/at32f402_405/family.mk
+++ b/hw/bsp/at32f402_405/family.mk
@@ -8,10 +8,32 @@ CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
-flto
+RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED
+RHPORT_DEVICE ?= 0
+RHPORT_HOST ?= 0
+
+ifndef RHPORT_DEVICE_SPEED
+ifeq ($(RHPORT_DEVICE), 0)
+ RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
+else
+ RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
+ifndef RHPORT_HOST_SPEED
+ifeq ($(RHPORT_HOST), 0)
+ RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
+else
+ RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
CFLAGS += \
- -DCFG_TUSB_MCU=OPT_MCU_AT32F402_405 \
- -DBOARD_TUD_RHPORT=0 \
- -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+ -DCFG_TUSB_MCU=OPT_MCU_AT32F402_405 \
+ -DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
+ -DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
+ -DBOARD_TUH_RHPORT=${RHPORT_HOST} \
+ -DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
LDFLAGS_GCC += \
-flto --specs=nosys.specs -nostdlib -nostartfiles