diff options
| author | hathach <[email protected]> | 2024-11-21 19:36:52 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-21 22:03:52 +0700 |
| commit | 01df8c36de16b21463085a96c3fb073237f968c5 (patch) | |
| tree | 05da6791f85b09cc14190b2d50af54a0e3525626 /hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h | |
| parent | 85e54b0fc3b53e3a690698bc5cf85581e6eaa69d (diff) | |
fix ci
Diffstat (limited to 'hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h')
| -rw-r--r-- | hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h index 6a9c90a4a..c621b48bb 100644 --- a/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h @@ -119,8 +119,9 @@ /* Define to trap errors during development. */ // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) -#define configASSERT(_exp) \ +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ + defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) + #define configASSERT(_exp) \ do {\ if ( !(_exp) ) { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ @@ -130,8 +131,6 @@ }\ }\ } while(0) -#else -#define configASSERT( x ) #endif /* FreeRTOS hooks to NVIC vectors */ |