diff options
| author | HiFiPhile <[email protected]> | 2026-06-24 20:48:42 +0200 |
|---|---|---|
| committer | HiFiPhile <[email protected]> | 2026-06-24 21:13:27 +0200 |
| commit | 3a1ced7e1333de7ddf57f8592a41cbf0605512ed (patch) | |
| tree | 1cba02b411980a49e46bffe027037d96f4c7079d /hw | |
| parent | 033dc6bb77e8a9e1c1172d74d47707848b5c5bf5 (diff) | |
typec: add stm32u5 support
Signed-off-by: HiFiPhile <[email protected]>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h | 4 | ||||
| -rw-r--r-- | hw/bsp/stm32u5/family.c | 28 | ||||
| -rw-r--r-- | hw/bsp/stm32u5/family.cmake | 1 | ||||
| -rw-r--r-- | hw/bsp/stm32u5/family.mk | 2 |
4 files changed, 35 insertions, 0 deletions
diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h index 48a9ae9fb..8b3118d79 100644 --- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h @@ -49,6 +49,10 @@ extern "C" #define BUTTON_PIN GPIO_PIN_13 #define BUTTON_STATE_ACTIVE 1 +// UCPD DBn +#define UCPD_DBn_PORT GPIOB +#define UCPD_DBn_PIN GPIO_PIN_5 + // UART Enable for STLink VCOM #define UART_ID 1 #define UART_GPIO_PORT GPIOA diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c index 7969b1c70..b722b4e98 100644 --- a/hw/bsp/stm32u5/family.c +++ b/hw/bsp/stm32u5/family.c @@ -82,6 +82,11 @@ void OTG_HS_IRQHandler(void) { tusb_int_handler(0, true); } #endif + +// USB PD +void UCPD1_IRQHandler(void) { + tuc_int_handler(0); +} //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -243,6 +248,29 @@ void board_init(void) { /* Non-standard VBus sense settings */ board_vbus_sense_init(); + +#if CFG_TUC_ENABLED + // USB PD + // Default CC1/CC2 is PA15/PB15 + + // Enable pwr for disabling dead battery feature in Power's CR3 + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_RCC_CRC_CLK_ENABLE(); + __HAL_RCC_UCPD_CLK_ENABLE(); + + // Enable DMA for USB PD + __HAL_RCC_GPDMA1_CLK_ENABLE(); + + #ifdef UCPD_DBn_PIN + // Configure DBn pin + GPIO_InitStruct.Pin = UCPD_DBn_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(UCPD_DBn_PORT, &GPIO_InitStruct); + HAL_GPIO_WritePin(UCPD_DBn_PORT, UCPD_DBn_PIN, GPIO_PIN_SET); + #endif + +#endif } //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake index 3d23c554d..c580892b8 100644 --- a/hw/bsp/stm32u5/family.cmake +++ b/hw/bsp/stm32u5/family.cmake @@ -74,6 +74,7 @@ function(family_configure_example TARGET RTOS) ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c + ${TOP}/src/portable/st/typec/typec_stm32.c ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} ) target_include_directories(${TARGET} PUBLIC diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk index e7bc4f299..bc2525448 100644 --- a/hw/bsp/stm32u5/family.mk +++ b/hw/bsp/stm32u5/family.mk @@ -53,6 +53,8 @@ SRC_C += \ src/portable/synopsys/dwc2/hcd_dwc2.c \ src/portable/synopsys/dwc2/dwc2_common.c endif +SRC_C += \ + src/portable/st/typec/typec_stm32.c INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ |
