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authorhathach <[email protected]>2024-04-23 10:57:45 +0700
committerhathach <[email protected]>2024-04-23 10:57:45 +0700
commit3fd82cfe225cb05c106eccac830bbcf19206bdb1 (patch)
treee9f93c692b45e6dd2071dd90dd1346b50794c05d /hw
parentd486a56ded8b1963308aca1513b7aca5dd8025d7 (diff)
clang work with lpc55
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/family_support.cmake2
-rw-r--r--hw/bsp/lpc55/family.c66
-rw-r--r--hw/bsp/lpc55/family.cmake69
3 files changed, 73 insertions, 64 deletions
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d86ecc0a2..5f0653646 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -239,7 +239,7 @@ function(family_configure_common TARGET RTOS)
if (NOT TARGET segger_rtt)
add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
- #target_compile_definitions(segger_rtt PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
+# target_compile_definitions(segger_rtt PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
endif()
target_link_libraries(${TARGET} PUBLIC segger_rtt)
endif ()
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 0fd85988a..cfd5b7032 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -72,13 +72,11 @@
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
+void USB0_IRQHandler(void) {
tud_int_handler(0);
}
-void USB1_IRQHandler(void)
-{
+void USB1_IRQHandler(void) {
tud_int_handler(1);
}
@@ -92,8 +90,7 @@ settings:
sources:
- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
******************************************************************/
-void BootClockFROHF96M(void)
-{
+void BootClockFROHF96M(void) {
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on */
@@ -116,8 +113,7 @@ void BootClockFROHF96M(void)
SystemCoreClock = 96000000U;
}
-void board_init(void)
-{
+void board_init(void) {
// Enable IOCON clock
CLOCK_EnableClock(kCLOCK_Iocon);
@@ -138,7 +134,7 @@ void board_init(void)
// LED
IOCON_PinMuxSet(IOCON, LED_PORT, LED_PIN, IOCON_PIO_DIG_FUNC0_EN);
- gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 1};
+ gpio_pin_config_t const led_config = {kGPIO_DigitalOutput, 1};
GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
board_led_write(0);
@@ -157,7 +153,7 @@ void board_init(void)
// Button
IOCON_PinMuxSet(IOCON, BUTTON_PORT, BUTTON_PIN, IOCON_PIO_DIG_FUNC0_EN);
- gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
+ gpio_pin_config_t const button_config = {kGPIO_DigitalInput, 0};
GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
#ifdef UART_DEV
@@ -170,8 +166,8 @@ void board_init(void)
usart_config_t uart_config;
USART_GetDefaultConfig(&uart_config);
uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
- uart_config.enableTx = true;
- uart_config.enableRx = true;
+ uart_config.enableTx = true;
+ uart_config.enableRx = true;
USART_Init(UART_DEV, &uart_config, 12000000);
#endif
@@ -250,9 +246,8 @@ void board_init(void)
// Board porting API
//--------------------------------------------------------------------+
-void board_led_write(bool state)
-{
- GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+ GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
#ifdef NEOPIXEL_PIN
if (state) {
@@ -266,33 +261,50 @@ void board_led_write(bool state)
#endif
}
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
// active low
return BUTTON_STATE_ACTIVE == GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
}
-int board_uart_read(uint8_t* buf, int len)
-{
- (void) buf; (void) len;
+int board_uart_read(uint8_t* buf, int len) {
+ (void) buf;
+ (void) len;
return 0;
}
-int board_uart_write(void const * buf, int len)
-{
- USART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len);
+int board_uart_write(void const* buf, int len) {
+ USART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+
+void SysTick_Handler(void) {
system_ticks++;
}
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
return system_ticks;
}
#endif
+
+
+#ifndef __ICCARM__
+// Implement _start() since we use linker flag '-nostartfiles'.
+// Requires defined __STARTUP_CLEAR_BSS,
+extern int main(void);
+
+TU_ATTR_UNUSED void _start(void) {
+ // called by startup code
+ main();
+ while (1) {}
+}
+
+#ifdef __clang__
+void _exit (int __status) {
+ while (1) {}
+}
+#endif
+
+#endif
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 75dabfe5a..21c57fc1f 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -1,9 +1,5 @@
include_guard()
-if (NOT BOARD)
- message(FATAL_ERROR "BOARD not specified")
-endif ()
-
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
@@ -30,9 +26,20 @@ set(HOST_PORT $<NOT:${PORT}>)
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
+ endif()
+
+ if (NOT DEFINED LD_FILE_GNU)
+ set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
endif ()
+ set(LD_FILE_Clang ${LD_FILE_GNU})
+
+ if (NOT DEFINED STARTUP_FILE_GNU)
+ set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+ endif ()
+ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
add_library(${BOARD_TARGET} STATIC
+ ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -44,12 +51,27 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
)
-
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${TOP}/lib/sct_neopixel
+ # driver
+ ${SDK_DIR}/drivers/common
+ ${SDK_DIR}/drivers/flexcomm
+ ${SDK_DIR}/drivers/lpc_iocon
+ ${SDK_DIR}/drivers/lpc_gpio
+ ${SDK_DIR}/drivers/lpuart
+ ${SDK_DIR}/drivers/sctimer
+ # mcu
+ ${SDK_DIR}/devices/${MCU_VARIANT}
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+ ${CMSIS_DIR}/CMSIS/Core/Include
+ )
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
BOARD_TUD_RHPORT=${PORT}
BOARD_TUH_RHPORT=${HOST_PORT}
+ __STARTUP_CLEAR_BSS
)
+
# Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
if (PORT EQUAL 1)
target_compile_definitions(${BOARD_TARGET} PUBLIC
@@ -65,42 +87,17 @@ function(add_board_target BOARD_TARGET)
)
endif ()
- target_include_directories(${BOARD_TARGET} PUBLIC
- ${TOP}/lib/sct_neopixel
- # driver
- ${SDK_DIR}/drivers/common
- ${SDK_DIR}/drivers/flexcomm
- ${SDK_DIR}/drivers/lpc_iocon
- ${SDK_DIR}/drivers/lpc_gpio
- ${SDK_DIR}/drivers/lpuart
- ${SDK_DIR}/drivers/sctimer
- # mcu
- ${CMSIS_DIR}/CMSIS/Core/Include
- ${SDK_DIR}/devices/${MCU_VARIANT}
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
- )
-
update_board(${BOARD_TARGET})
- if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
- set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
- endif ()
-
- if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
- set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
- endif ()
-
- target_sources(${BOARD_TARGET} PUBLIC
- ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
- )
-
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
- # linker file
"LINKER:--script=${LD_FILE_GNU}"
- # nanolib
- --specs=nosys.specs
- --specs=nano.specs
+ --specs=nosys.specs --specs=nano.specs
+ -nostartfiles
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_Clang}"
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC