diff options
| author | hathach <[email protected]> | 2023-12-26 22:50:01 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2023-12-26 22:50:01 +0700 |
| commit | 551e47a464f55e1e36e2812e79902f4ef2955a17 (patch) | |
| tree | 38ed41e05021db3b54788eed87623ee949b13348 /hw | |
| parent | a01d6d8b31fa2882603432461b355ae829973c48 (diff) | |
allow rp2040 to use max3421e as host controller
- fix warnings build hcd max3421 with rp2040
- add tinyusb_host_max3421 target for rp2040 cmake, -DMAX3421_HOST=1
will enable this
- add max3421 driver implementation for rp2040 family
- update tusb_config for host to allow easy enable host selection for
rp2040 (default/pio-usb/max3421)
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/bsp/rp2040/board.h | 11 | ||||
| -rw-r--r-- | hw/bsp/rp2040/family.c | 140 | ||||
| -rw-r--r-- | hw/bsp/rp2040/family.cmake | 22 |
3 files changed, 137 insertions, 36 deletions
diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h index 063c9580e..3849894ce 100644 --- a/hw/bsp/rp2040/board.h +++ b/hw/bsp/rp2040/board.h @@ -74,6 +74,17 @@ #define PICO_DEFAULT_PIO_USB_VBUSEN_STATE 1 #endif +//-------------------------------------------------------------------- +// USB Host MAX3421E +//-------------------------------------------------------------------- + +#define MAX3421_SPI PICO_DEFAULT_SPI_INSTANCE +#define MAX3421_SCK_PIN PICO_DEFAULT_SPI_SCK_PIN +#define MAX3421_MOSI_PIN PICO_DEFAULT_SPI_TX_PIN +#define MAX3421_MISO_PIN PICO_DEFAULT_SPI_RX_PIN +#define MAX3421_CS_PIN 10 +#define MAX3421_INTR_PIN 9 + #ifdef __cplusplus } #endif diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index 5ac104688..cffb632f3 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -37,10 +37,19 @@ #include "bsp/board_api.h" #include "board.h" +#ifdef UART_DEV +static uart_inst_t *uart_inst; +#endif + #if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB #include "pio_usb.h" #endif +#if CFG_TUH_ENABLED && CFG_TUH_MAX3421 +#include "hardware/spi.h" +static void max3421_init(void); +#endif + #ifdef BUTTON_BOOTSEL // This example blinks the Picoboard LED when the BOOTSEL button is pressed. // @@ -53,73 +62,66 @@ // This doesn't work if others are trying to access flash at the same time, // e.g. XIP streamer, or the other core. bool __no_inline_not_in_flash_func(get_bootsel_button)(void) { - const uint CS_PIN_INDEX = 1; + const uint CS_PIN_INDEX = 1; - // Must disable interrupts, as interrupt handlers may be in flash, and we - // are about to temporarily disable flash access! - uint32_t flags = save_and_disable_interrupts(); + // Must disable interrupts, as interrupt handlers may be in flash, and we + // are about to temporarily disable flash access! + uint32_t flags = save_and_disable_interrupts(); - // Set chip select to Hi-Z - hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl, - GPIO_OVERRIDE_LOW << IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_LSB, - IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS); + // Set chip select to Hi-Z + hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl, + GPIO_OVERRIDE_LOW << IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_LSB, + IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS); - // Note we can't call into any sleep functions in flash right now - for (volatile int i = 0; i < 1000; ++i); + // Note we can't call into any sleep functions in flash right now + for (volatile int i = 0; i < 1000; ++i); - // The HI GPIO registers in SIO can observe and control the 6 QSPI pins. - // Note the button pulls the pin *low* when pressed. - bool button_state = (sio_hw->gpio_hi_in & (1u << CS_PIN_INDEX)); + // The HI GPIO registers in SIO can observe and control the 6 QSPI pins. + // Note the button pulls the pin *low* when pressed. + bool button_state = (sio_hw->gpio_hi_in & (1u << CS_PIN_INDEX)); - // Need to restore the state of chip select, else we are going to have a - // bad time when we return to code in flash! - hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl, - GPIO_OVERRIDE_NORMAL << IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_LSB, - IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS); + // Need to restore the state of chip select, else we are going to have a + // bad time when we return to code in flash! + hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl, + GPIO_OVERRIDE_NORMAL << IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_LSB, + IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS); - restore_interrupts(flags); + restore_interrupts(flags); - return button_state; + return button_state; } #endif //------------- Segger RTT retarget -------------// #if defined(LOGGER_RTT) - // Logging with RTT // - If RTT Control Block is not found by 'Auto Detection` try to use 'Search Range` with '0x20000000 0x10000' // - SWD speed is rather slow around 1000Khz - #include "pico/stdio/driver.h" #include "SEGGER_RTT.h" -static void stdio_rtt_write (const char *buf, int length) -{ +static void stdio_rtt_write (const char *buf, int length) { SEGGER_RTT_Write(0, buf, (unsigned) length); } -static int stdio_rtt_read (char *buf, int len) -{ +static int stdio_rtt_read (char *buf, int len) { return (int) SEGGER_RTT_Read(0, buf, (unsigned) len); } -static stdio_driver_t stdio_rtt = -{ +static stdio_driver_t stdio_rtt = { .out_chars = stdio_rtt_write, .out_flush = NULL, .in_chars = stdio_rtt_read }; -void stdio_rtt_init(void) -{ +void stdio_rtt_init(void) { stdio_set_driver_enabled(&stdio_rtt, true); } - #endif -#ifdef UART_DEV -static uart_inst_t *uart_inst; -#endif +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ void board_init(void) { @@ -165,7 +167,9 @@ void board_init(void) #endif #if CFG_TUH_ENABLED - // set portfunc to host !!! + #if CFG_TUH_MAX3421 + max3421_init(); + #endif #endif #if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED @@ -242,3 +246,69 @@ int board_getchar(void) { // rp2040 implementation will install appropriate handler when initializing // tinyusb. There is no need to forward IRQ from application //--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// API: SPI transfer with MAX3421E, must be implemented by application +//--------------------------------------------------------------------+ +#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421 + +void max3421_int_handler(uint gpio, uint32_t event_mask) { + if (!(gpio == MAX3421_INTR_PIN && event_mask & GPIO_IRQ_EDGE_FALL)) return; + tuh_int_handler(BOARD_TUH_RHPORT, true); +} + +static void max3421_init(void) { + // CS pin + gpio_init(MAX3421_CS_PIN); + gpio_set_dir(MAX3421_CS_PIN, GPIO_OUT); + gpio_put(MAX3421_CS_PIN, true); + + // Interrupt pin + gpio_init(MAX3421_INTR_PIN); + gpio_set_dir(MAX3421_INTR_PIN, GPIO_IN); + gpio_pull_up(MAX3421_INTR_PIN); + gpio_set_irq_enabled_with_callback(MAX3421_INTR_PIN, GPIO_IRQ_EDGE_FALL, true, max3421_int_handler); + + // SPI init + spi_init(MAX3421_SPI, 4*1000000ul); + gpio_set_function(MAX3421_SCK_PIN, GPIO_FUNC_SPI); + gpio_set_function(MAX3421_MOSI_PIN, GPIO_FUNC_SPI); + gpio_set_function(MAX3421_MISO_PIN, GPIO_FUNC_SPI); + spi_set_format(MAX3421_SPI, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST); +} + +//// API to enable/disable MAX3421 INTR pin interrupt +void tuh_max3421_int_api(uint8_t rhport, bool enabled) { + (void) rhport; + irq_set_enabled(IO_IRQ_BANK0, enabled); +} + +// API to control MAX3421 SPI CS +void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) { + (void) rhport; + gpio_put(MAX3421_CS_PIN, !active); +} + +// API to transfer data with MAX3421 SPI +// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only +bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) { + (void) rhport; + + if (tx_buf == NULL && rx_buf == NULL) { + return false; + } + + int ret; + + if (tx_buf == NULL) { + ret = spi_read_blocking(MAX3421_SPI, 0, rx_buf, xfer_bytes); + }else if (rx_buf == NULL) { + ret = spi_write_blocking(MAX3421_SPI, tx_buf, xfer_bytes); + }else { + ret = spi_write_read_blocking(spi0, tx_buf, rx_buf, xfer_bytes); + } + + return ret == (int) xfer_bytes; +} + +#endif diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 77d8029d9..ec40806fd 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -104,6 +104,20 @@ target_compile_definitions(tinyusb_host_base INTERFACE ) #------------------------------------ +# Host MAX3421 +#------------------------------------ +add_library(tinyusb_host_max3421 INTERFACE) +target_sources(tinyusb_host_max3421 INTERFACE + ${TOP}/src/portable/analog/max3421/hcd_max3421.c + ) +target_compile_definitions(tinyusb_host_max3421 INTERFACE + CFG_TUH_MAX3421=1 + ) +target_link_libraries(tinyusb_host_max3421 INTERFACE + hardware_spi + ) + +#------------------------------------ # BSP & Additions #------------------------------------ add_library(tinyusb_bsp INTERFACE) @@ -126,7 +140,7 @@ target_compile_definitions(tinyusb_additions INTERFACE if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") target_compile_definitions(tinyusb_additions INTERFACE LOGGER_RTT - SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL + #SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL ) target_sources(tinyusb_additions INTERFACE @@ -186,6 +200,7 @@ function(family_add_pico_pio_usb TARGET) target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) endfunction() + # since Pico-PIO_USB compiler support may lag, and change from version to version, add a function that pico-sdk/pico-examples # can check (if present) in case the user has updated their TinyUSB function(is_compiler_supported_by_pico_pio_usb OUTVAR) @@ -209,6 +224,11 @@ function(family_configure_host_example TARGET RTOS) family_add_pico_pio_usb(${PROJECT}) endif() endif() + + # for max3421 host + if (MAX3421_HOST STREQUAL "1") + target_link_libraries(${TARGET} PUBLIC tinyusb_host_max3421) + endif() endfunction() |
