adding toolchain file from sdk

8 files changed, 1701 insertions, 0 deletions

diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.common b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.common
new file mode 100644
index 000000000..773c2b910
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.common
@@ -0,0 +1,307 @@
+# Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+# 
+# All rights reserved.
+# 
+# Redistribution and use in source and binary forms, with or without modification,
+# are permitted provided that the following conditions are met:
+# 
+# 1. Redistributions of source code must retain the above copyright notice, this
+#    list of conditions and the following disclaimer.
+# 
+# 2. Redistributions in binary form, except as embedded into a Nordic
+#    Semiconductor ASA integrated circuit in a product or a software update for
+#    such product, must reproduce the above copyright notice, this list of
+#    conditions and the following disclaimer in the documentation and/or other
+#    materials provided with the distribution.
+# 
+# 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+#    contributors may be used to endorse or promote products derived from this
+#    software without specific prior written permission.
+# 
+# 4. This software, with or without modification, must only be used with a
+#    Nordic Semiconductor ASA integrated circuit.
+# 
+# 5. Any software provided in binary form under this license must not be reverse
+#    engineered, decompiled, modified and/or disassembled.
+# 
+# THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+# OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+# Options:
+#   VERBOSE=1 (default is 0) - print each executed command
+#   PRETTY=1  (default is 0) - show progress, in percentage
+#   ABSOLUTE_PATHS=1 (default is 0) - convert all include folders and source
+#     file paths to their absolute forms
+#   PASS_INCLUDE_PATHS_VIA_FILE=1 (default is 0) - use <target>.inc file
+#     to pass include paths to gcc
+#   PASS_LINKER_INPUT_VIA_FILE=0  (default is 1) - don't use <target>.in file
+#     to pass the list of linker input files
+VERBOSE ?= 0
+PRETTY  ?= 0
+ABSOLUTE_PATHS ?= 0
+PASS_INCLUDE_PATHS_VIA_FILE ?= 0
+PASS_LINKER_INPUT_VIA_FILE  ?= 1
+
+.SUFFIXES: # ignore built-in rules
+%.d:       # don't try to make .d files
+.PRECIOUS: %.d %.o
+
+MK := mkdir
+RM := rm -rf
+
+# echo suspend
+ifeq ($(VERBOSE),1)
+  NO_ECHO :=
+else
+  NO_ECHO := @
+endif
+
+ifneq (,$(filter clean, $(MAKECMDGOALS)))
+
+OTHER_GOALS := $(filter-out clean, $(MAKECMDGOALS))
+ifneq (, $(OTHER_GOALS))
+$(info Cannot make anything in parallel with "clean".)
+$(info Execute "$(MAKE) clean \
+  $(foreach goal, $(OTHER_GOALS),&& $(MAKE) $(goal))" instead.)
+$(error Cannot continue)
+else
+.PHONY: clean
+clean:
+	$(RM) $(OUTPUT_DIRECTORY)
+endif # ifneq(, $(OTHER_GOALS))
+
+else # ifneq (,$(filter clean, $(MAKECMDGOALS)))
+
+ifndef PROGRESS
+
+ifeq ($(PRETTY),1)
+    X     := @
+    EMPTY :=
+    SPACE := $(EMPTY) $(EMPTY)
+    TOTAL := $(subst $(SPACE),,$(filter $(X), \
+               $(shell "$(MAKE)" $(MAKECMDGOALS) --dry-run \
+                 --no-print-directory PROGRESS=$(X))))
+
+    5   := $(X)$(X)$(X)$(X)$(X)
+    25  := $(5)$(5)$(5)$(5)$(5)
+    100 := $(25)$(25)$(25)$(25)
+
+    C       :=
+    COUNTER  = $(eval C := $(C)$(100))$(C)
+    P       :=
+    count    = $(if $(filter $1%,$2),$(eval \
+                 P += 1)$(call count,$1,$(2:$1%=%)),$(eval \
+                 C := $2))
+    print    = [$(if $(word 99,$1),99,$(if $(word 10,$1),, )$(words $1))%]
+    PROGRESS = $(call count,$(TOTAL),$(COUNTER))$(call print,$(P)) $1
+else
+    PROGRESS = $1
+endif # ifeq ($(PRETTY),1)
+
+PLATFORM_SUFFIX := $(if $(filter Windows%,$(OS)),windows,posix)
+TOOLCHAIN_CONFIG_FILE := $(TEMPLATE_PATH)/Makefile.$(PLATFORM_SUFFIX)
+include $(TOOLCHAIN_CONFIG_FILE)
+
+# $1 path
+define quote
+'$(subst ','\'',$(1))'
+endef
+
+# Toolchain commands
+CC      := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-gcc)
+CXX     := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-c++)
+AS      := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-as)
+AR      := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-ar) -r
+LD      := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-ld)
+NM      := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-nm)
+OBJDUMP := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-objdump)
+OBJCOPY := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-objcopy)
+SIZE    := $(call quote,$(GNU_INSTALL_ROOT)$(GNU_PREFIX)-size)
+$(if $(shell $(CC) --version),,$(info Cannot find: $(CC).) \
+  $(info Please set values in: "$(abspath $(TOOLCHAIN_CONFIG_FILE))") \
+  $(info according to the actual configuration of your system.) \
+  $(error Cannot continue))
+
+# Use ccache on linux if available
+CCACHE := $(if $(filter Windows%,$(OS)),, \
+               $(if $(wildcard /usr/bin/ccache),ccache))
+CC     := $(CCACHE) $(CC)
+
+endif # ifndef PROGRESS
+
+# $1 type of item
+# $2 items paths to check
+define ensure_exists_each
+$(foreach item, $(2), \
+  $(if $(wildcard $(item)),, $(warning Cannot find $(1): $(item))))
+endef
+
+ifeq ($(PASS_INCLUDE_PATHS_VIA_FILE),1)
+INC_PATHS = @$($@_INC)
+GENERATE_INC_FILE := 1
+else
+INC_PATHS = $(call target_specific, INC_PATHS, $($@_TGT))
+GENERATE_INC_FILE :=
+endif
+
+# $1 object file
+# $2 source file
+# $3 include paths container file
+# $4 target name
+define bind_obj_with_src
+$(eval $(1)     := $(2)) \
+$(eval $(1)_INC := $(3)) \
+$(eval $(1)_TGT := $(4)) \
+$(eval $(1): Makefile | $(dir $(1)).) \
+$(if $(GENERATE_INC_FILE), $(eval $(1): $(3)))
+endef
+
+# $1 target name
+# $2 source file name
+# Note: this additional .o for .s files is a workaround for issues with make 4.1
+#       from MinGW (it does nothing to remake .s.o files when a rule for .S.o
+#       files is defined as well).
+define get_object_file_name
+$(OUTPUT_DIRECTORY)/$(strip $(1))/$(notdir $(2:%.s=%.s.o)).o
+endef
+
+# $1 target name
+# $2 include paths container file
+# $3 list of source files
+define get_object_files
+$(call ensure_exists_each,source file, $(3)) \
+$(foreach src_file, $(3), \
+  $(eval obj_file := $(call get_object_file_name, $(1), $(src_file))) \
+  $(eval DEPENDENCIES += $(obj_file:.o=.d)) \
+  $(call bind_obj_with_src, $(obj_file), $(src_file), $(2), $(1)) \
+  $(obj_file))
+endef
+
+# $1 variable name
+# $2 target name
+define target_specific
+$($(addsuffix _$(strip $(2)), $(1)))
+endef
+
+ifeq ($(ABSOLUTE_PATHS),1)
+get_path = $(call quote,$(abspath $1))
+else
+get_path = $1
+endif
+
+# $1 list of include folders
+define get_inc_paths
+$(call ensure_exists_each,include folder,$(1)) \
+$(foreach folder,$(1),-I$(call get_path,$(folder)))
+endef
+
+# $1 target name
+# $2 include paths container file
+# $3 build goal name
+define prepare_build
+$(eval DEPENDENCIES :=) \
+$(eval $(3): \
+  $(call get_object_files, $(1), $(2), \
+    $(SRC_FILES) $(call target_specific, SRC_FILES, $(1)))) \
+$(eval -include $(DEPENDENCIES)) \
+$(eval INC_PATHS_$(strip $(1)) := \
+  $(call get_inc_paths, \
+    $(INC_FOLDERS) $(call target_specific, INC_FOLDERS, $(1))))
+endef
+
+# $1 target name
+define define_target
+$(eval OUTPUT_FILE := $(OUTPUT_DIRECTORY)/$(strip $(1))) \
+$(eval $(1): $(OUTPUT_FILE).out $(OUTPUT_FILE).hex $(OUTPUT_FILE).bin \
+           ; @echo DONE $(strip $(1))) \
+$(call prepare_build, $(1), $(OUTPUT_FILE).inc, $(OUTPUT_FILE).out)
+endef
+
+# $1 target name
+# $2 library file name
+define define_library
+$(eval OUTPUT_FILE := $(OUTPUT_DIRECTORY)/$(strip $(1))) \
+$(eval $(1) := $(2)) \
+$(call prepare_build, $(1), $(OUTPUT_FILE).inc, $(1))
+endef
+
+# $1 content to be dumped
+# Invokes another instance of MAKE to dump the specified content to stdout,
+# which may be then redirected in shell to a file and this way stored there.
+# MAKE in version prior to 4.0 does not provide the $(file ...) function.
+define dump
+$(eval CONTENT_TO_DUMP := $(1)) \
+"$(MAKE)" -s --no-print-directory \
+  -f "$(TEMPLATE_PATH)/dump.mk" VARIABLE=CONTENT_TO_DUMP
+endef
+export CONTENT_TO_DUMP
+
+.PHONY: $(TARGETS) all
+
+all: $(TARGETS)
+
+# Create build directories
+$(OUTPUT_DIRECTORY):
+	$(MK) $@
+$(OUTPUT_DIRECTORY)/%/.: | $(OUTPUT_DIRECTORY)
+	cd $(OUTPUT_DIRECTORY) && $(MK) $*
+
+$(OUTPUT_DIRECTORY)/%.inc: Makefile | $(OUTPUT_DIRECTORY)
+	$(info Generating $@)
+	$(NO_ECHO)$(call dump, $(call target_specific, INC_PATHS, $*)) > $@
+
+# $1 command
+# $2 flags
+# $3 message
+define run
+$(info $(call PROGRESS,$(3) file: $(notdir $($@)))) \
+$(NO_ECHO)$(1) -MP -MD -c -o $@ $(call get_path,$($@)) $(2) $(INC_PATHS)
+endef
+
+# Create object files from C source files
+%.c.o:
+	$(call run,$(CC) -std=c99,$(CFLAGS),Compiling)
+
+# Create object files from C++ source files
+%.cpp.o:
+	$(call run,$(CXX),$(CFLAGS) $(CXXFLAGS),Compiling)
+
+# Create object files from assembly source files
+%.S.o %.s.o.o:
+	$(call run,$(CC) -x assembler-with-cpp,$(ASMFLAGS),Assembling)
+
+ifeq ($(PASS_LINKER_INPUT_VIA_FILE),1)
+GENERATE_LD_INPUT_FILE = $(call dump, $^ $(LIB_FILES)) > $(@:.out=.in)
+LD_INPUT               = @$(@:.out=.in)
+else
+GENERATE_LD_INPUT_FILE =
+LD_INPUT               = $^ $(LIB_FILES)
+endif
+
+# Link object files
+%.out:
+	$(info $(call PROGRESS,Linking target: $@))
+	$(NO_ECHO)$(GENERATE_LD_INPUT_FILE)
+	$(NO_ECHO)$(CC) $(LDFLAGS) $(LD_INPUT) -Wl,-Map=$(@:.out=.map) -o $@
+	$(NO_ECHO)$(SIZE) $@
+
+# Create binary .bin file from the .out file
+%.bin: %.out
+	$(info Preparing: $@)
+	$(NO_ECHO)$(OBJCOPY) -O binary $< $@
+
+# Create binary .hex file from the .out file
+%.hex: %.out
+	$(info Preparing: $@)
+	$(NO_ECHO)$(OBJCOPY) -O ihex $< $@
+
+endif # ifneq (,$(filter clean, $(MAKECMDGOALS)))
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.posix b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.posix
new file mode 100644
index 000000000..03294a574
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.posix
@@ -0,0 +1,3 @@
+GNU_INSTALL_ROOT := /usr/local/gcc-arm-none-eabi-4_9-2015q3/bin/
+GNU_VERSION := 4.9.3
+GNU_PREFIX := arm-none-eabi
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.windows b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.windows
new file mode 100644
index 000000000..1cbdb26b8
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/Makefile.windows
@@ -0,0 +1,3 @@
+GNU_INSTALL_ROOT := C:/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q3/bin/
+GNU_VERSION := 4.9.3
+GNU_PREFIX := arm-none-eabi
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/gcc_startup_nrf52840.S b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/gcc_startup_nrf52840.S
new file mode 100644
index 000000000..ad45d5eed
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/gcc/gcc_startup_nrf52840.S
@@ -0,0 +1,410 @@
+/*
+ 
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+    .syntax unified
+    .arch armv7e-m
+
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+    .section .stack
+#if defined(__STARTUP_CONFIG)
+    .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+    .equ    Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+    .align 3
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .align 3
+    .equ    Stack_Size, 8192
+#endif
+    .globl __StackTop
+    .globl __StackLimit
+__StackLimit:
+    .space Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#if defined(__STARTUP_CONFIG)
+    .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+    .equ Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 8192
+#endif
+    .globl __HeapBase
+    .globl __HeapLimit
+__HeapBase:
+    .if Heap_Size
+    .space Heap_Size
+    .endif
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long   __StackTop                  /* Top of Stack */
+    .long   Reset_Handler
+    .long   NMI_Handler
+    .long   HardFault_Handler
+    .long   MemoryManagement_Handler
+    .long   BusFault_Handler
+    .long   UsageFault_Handler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   SVC_Handler
+    .long   DebugMon_Handler
+    .long   0                           /*Reserved */
+    .long   PendSV_Handler
+    .long   SysTick_Handler
+
+  /* External Interrupts */
+    .long   POWER_CLOCK_IRQHandler
+    .long   RADIO_IRQHandler
+    .long   UARTE0_UART0_IRQHandler
+    .long   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+    .long   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+    .long   NFCT_IRQHandler
+    .long   GPIOTE_IRQHandler
+    .long   SAADC_IRQHandler
+    .long   TIMER0_IRQHandler
+    .long   TIMER1_IRQHandler
+    .long   TIMER2_IRQHandler
+    .long   RTC0_IRQHandler
+    .long   TEMP_IRQHandler
+    .long   RNG_IRQHandler
+    .long   ECB_IRQHandler
+    .long   CCM_AAR_IRQHandler
+    .long   WDT_IRQHandler
+    .long   RTC1_IRQHandler
+    .long   QDEC_IRQHandler
+    .long   COMP_LPCOMP_IRQHandler
+    .long   SWI0_EGU0_IRQHandler
+    .long   SWI1_EGU1_IRQHandler
+    .long   SWI2_EGU2_IRQHandler
+    .long   SWI3_EGU3_IRQHandler
+    .long   SWI4_EGU4_IRQHandler
+    .long   SWI5_EGU5_IRQHandler
+    .long   TIMER3_IRQHandler
+    .long   TIMER4_IRQHandler
+    .long   PWM0_IRQHandler
+    .long   PDM_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   MWU_IRQHandler
+    .long   PWM1_IRQHandler
+    .long   PWM2_IRQHandler
+    .long   SPIM2_SPIS2_SPI2_IRQHandler
+    .long   RTC2_IRQHandler
+    .long   I2S_IRQHandler
+    .long   FPU_IRQHandler
+    .long   USBD_IRQHandler
+    .long   UARTE1_IRQHandler
+    .long   QSPI_IRQHandler
+    .long   CRYPTOCELL_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   PWM3_IRQHandler
+    .long   0                           /*Reserved */
+    .long   SPIM3_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+
+    .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+    .text
+    .thumb
+    .thumb_func
+    .align 1
+    .globl Reset_Handler
+    .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ *      __etext: LMA of start of the section to copy from. Usually end of text
+ *      __data_start__: VMA of start of the section to copy to.
+ *      __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ *                    the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+    ldr r1, =__etext
+    ldr r2, =__data_start__
+    ldr r3, =__bss_start__
+
+    subs r3, r2
+    ble .L_loop1_done
+
+.L_loop1:
+    subs r3, #4
+    ldr r0, [r1,r3]
+    str r0, [r2,r3]
+    bgt .L_loop1
+
+.L_loop1_done:
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+    ldr r1, =__bss_start__
+    ldr r2, =__bss_end__
+
+    movs r0, 0
+
+    subs r2, r1
+    ble .L_loop3_done
+
+.L_loop3:
+    subs r2, #4
+    str r0, [r1, r2]
+    bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+    bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+    bl __START
+
+    .pool
+    .size   Reset_Handler,.-Reset_Handler
+
+    .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+NMI_Handler:
+    b       .
+    .size   NMI_Handler, . - NMI_Handler
+
+
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+HardFault_Handler:
+    b       .
+    .size   HardFault_Handler, . - HardFault_Handler
+
+
+    .weak   MemoryManagement_Handler
+    .type   MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+    b       .
+    .size   MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+    .weak   BusFault_Handler
+    .type   BusFault_Handler, %function
+BusFault_Handler:
+    b       .
+    .size   BusFault_Handler, . - BusFault_Handler
+
+
+    .weak   UsageFault_Handler
+    .type   UsageFault_Handler, %function
+UsageFault_Handler:
+    b       .
+    .size   UsageFault_Handler, . - UsageFault_Handler
+
+
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+SVC_Handler:
+    b       .
+    .size   SVC_Handler, . - SVC_Handler
+
+
+    .weak   DebugMon_Handler
+    .type   DebugMon_Handler, %function
+DebugMon_Handler:
+    b       .
+    .size   DebugMon_Handler, . - DebugMon_Handler
+
+
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+PendSV_Handler:
+    b       .
+    .size   PendSV_Handler, . - PendSV_Handler
+
+
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+SysTick_Handler:
+    b       .
+    .size   SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+    .globl  Default_Handler
+    .type   Default_Handler, %function
+Default_Handler:
+    b       .
+    .size   Default_Handler, . - Default_Handler
+
+    .macro  IRQ handler
+    .weak   \handler
+    .set    \handler, Default_Handler
+    .endm
+
+    IRQ  POWER_CLOCK_IRQHandler
+    IRQ  RADIO_IRQHandler
+    IRQ  UARTE0_UART0_IRQHandler
+    IRQ  SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+    IRQ  SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+    IRQ  NFCT_IRQHandler
+    IRQ  GPIOTE_IRQHandler
+    IRQ  SAADC_IRQHandler
+    IRQ  TIMER0_IRQHandler
+    IRQ  TIMER1_IRQHandler
+    IRQ  TIMER2_IRQHandler
+    IRQ  RTC0_IRQHandler
+    IRQ  TEMP_IRQHandler
+    IRQ  RNG_IRQHandler
+    IRQ  ECB_IRQHandler
+    IRQ  CCM_AAR_IRQHandler
+    IRQ  WDT_IRQHandler
+    IRQ  RTC1_IRQHandler
+    IRQ  QDEC_IRQHandler
+    IRQ  COMP_LPCOMP_IRQHandler
+    IRQ  SWI0_EGU0_IRQHandler
+    IRQ  SWI1_EGU1_IRQHandler
+    IRQ  SWI2_EGU2_IRQHandler
+    IRQ  SWI3_EGU3_IRQHandler
+    IRQ  SWI4_EGU4_IRQHandler
+    IRQ  SWI5_EGU5_IRQHandler
+    IRQ  TIMER3_IRQHandler
+    IRQ  TIMER4_IRQHandler
+    IRQ  PWM0_IRQHandler
+    IRQ  PDM_IRQHandler
+    IRQ  MWU_IRQHandler
+    IRQ  PWM1_IRQHandler
+    IRQ  PWM2_IRQHandler
+    IRQ  SPIM2_SPIS2_SPI2_IRQHandler
+    IRQ  RTC2_IRQHandler
+    IRQ  I2S_IRQHandler
+    IRQ  FPU_IRQHandler
+    IRQ  USBD_IRQHandler
+    IRQ  UARTE1_IRQHandler
+    IRQ  QSPI_IRQHandler
+    IRQ  CRYPTOCELL_IRQHandler
+    IRQ  PWM3_IRQHandler
+    IRQ  SPIM3_IRQHandler
+
+  .end
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nRF_Startup.s b/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nRF_Startup.s
new file mode 100644
index 000000000..a4fa3c255
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nRF_Startup.s
@@ -0,0 +1,148 @@
+/*****************************************************************************
+ *                   SEGGER Microcontroller GmbH & Co. KG                    *
+ *            Solutions for real time microcontroller applications           *
+ *****************************************************************************
+ *                                                                           *
+ *               (c) 2017 SEGGER Microcontroller GmbH & Co. KG               *
+ *                                                                           *
+ *           Internet: www.segger.com   Support: [email protected]          *
+ *                                                                           *
+ *****************************************************************************/
+
+/*****************************************************************************
+ *                         Preprocessor Definitions                          *
+ *                         ------------------------                          *
+ * NO_FPU_ENABLE                                                             *
+ *                                                                           *
+ *   If defined, FPU will not be enabled.                                    *
+ *                                                                           *
+ * NO_STACK_INIT                                                             *
+ *                                                                           *
+ *   If defined, the stack pointer will not be initialised.                  *
+ *                                                                           *
+ * NO_SYSTEM_INIT                                                            *
+ *                                                                           *
+ *   If defined, the SystemInit() function will not be called. By default    *
+ *   SystemInit() is called after reset to enable the clocks and memories to *
+ *   be initialised prior to any C startup initialisation.                   *
+ *                                                                           *
+ * NO_VTOR_CONFIG                                                            *
+ *                                                                           *
+ *   If defined, the vector table offset register will not be configured.    *
+ *                                                                           *
+ * MEMORY_INIT                                                               *
+ *                                                                           *
+ *   If defined, the MemoryInit() function will be called. By default        *
+ *   MemoryInit() is called after SystemInit() to enable an external memory  *
+ *   controller.                                                             *
+ *                                                                           *
+ * STACK_INIT_VAL                                                            *
+ *                                                                           *
+ *   If defined, specifies the initial stack pointer value. If undefined,    *
+ *   the stack pointer will be initialised to point to the end of the        *
+ *   RAM segment.                                                            *
+ *                                                                           *
+ * VECTORS_IN_RAM                                                            *
+ *                                                                           *
+ *   If defined, the exception vectors will be copied from Flash to RAM.     *
+ *                                                                           *
+ *****************************************************************************/
+
+  .syntax unified
+
+  .global Reset_Handler
+#ifdef INITIALIZE_USER_SECTIONS  
+  .global InitializeUserMemorySections
+#endif
+  .extern _vectors
+
+  .section .init, "ax"
+  .thumb_func
+
+  .equ VTOR_REG, 0xE000ED08
+  .equ FPU_CPACR_REG, 0xE000ED88
+
+#ifndef STACK_INIT_VAL
+#define STACK_INIT_VAL __RAM_segment_end__
+#endif
+
+Reset_Handler:
+#ifndef NO_STACK_INIT
+  /* Initialise main stack */
+  ldr r0, =STACK_INIT_VAL
+  ldr r1, =0x7
+  bics r0, r1
+  mov sp, r0
+#endif
+
+#ifndef NO_SYSTEM_INIT
+  /* Initialise system */
+  ldr r0, =SystemInit
+  blx r0
+#endif
+
+#ifdef MEMORY_INIT
+  ldr r0, =MemoryInit
+  blx r0
+#endif
+
+#ifdef VECTORS_IN_RAM
+  /* Copy exception vectors into RAM */
+  ldr r0, =__vectors_start__
+  ldr r1, =__vectors_end__
+  ldr r2, =__vectors_ram_start__
+1:
+  cmp r0, r1
+  beq 2f
+  ldr r3, [r0]
+  str r3, [r2]
+  adds r0, r0, #4
+  adds r2, r2, #4
+  b 1b
+2:
+#endif
+
+#ifndef NO_VTOR_CONFIG
+  /* Configure vector table offset register */
+  ldr r0, =VTOR_REG
+#ifdef VECTORS_IN_RAM
+  ldr r1, =_vectors_ram
+#else
+  ldr r1, =_vectors
+#endif
+  str r1, [r0]
+#endif
+
+#if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
+  /* Enable FPU */
+  ldr r0, =FPU_CPACR_REG
+  ldr r1, [r0]
+  orr r1, r1, #(0xF << 20)
+  str r1, [r0]
+  dsb
+  isb
+#endif
+
+  /* Jump to program start */
+  b _start
+
+#ifdef INITIALIZE_USER_SECTIONS  
+  .thumb_func
+InitializeUserMemorySections:
+  ldr r0, =__start_nrf_sections
+  ldr r1, =__start_nrf_sections_run
+  ldr r2, =__end_nrf_sections_run
+  cmp r0, r1
+  beq 2f
+  subs r2, r2, r1
+  beq 2f
+1:
+  ldrb r3, [r0]
+  adds r0, r0, #1
+  strb r3, [r1]
+  adds r1, r1, #1
+  subs r2, r2, #1
+  bne 1b
+2:
+  bx lr
+#endif
\ No newline at end of file
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nrf52840_Vectors.s b/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nrf52840_Vectors.s
new file mode 100644
index 000000000..1606c79bc
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/ses/ses_nrf52840_Vectors.s
@@ -0,0 +1,513 @@
+/*****************************************************************************
+ *                   SEGGER Microcontroller GmbH & Co. KG                    *
+ *            Solutions for real time microcontroller applications           *
+ *****************************************************************************
+ *                                                                           *
+ *               (c) 2017 SEGGER Microcontroller GmbH & Co. KG               *
+ *                                                                           *
+ *           Internet: www.segger.com   Support: [email protected]          *
+ *                                                                           *
+ *****************************************************************************/
+
+/*****************************************************************************
+ *                         Preprocessor Definitions                          *
+ *                         ------------------------                          *
+ * VECTORS_IN_RAM                                                            *
+ *                                                                           *
+ *   If defined, an area of RAM will large enough to store the vector table  *
+ *   will be reserved.                                                       *
+ *                                                                           *
+ *****************************************************************************/
+
+  .syntax unified
+  .code 16
+
+  .section .init, "ax"
+  .align 0
+
+/*****************************************************************************
+ * Default Exception Handlers                                                *
+ *****************************************************************************/
+
+  .thumb_func
+  .weak NMI_Handler
+NMI_Handler:
+  b .
+
+  .thumb_func
+  .weak HardFault_Handler
+HardFault_Handler:
+  b .
+  
+  .thumb_func
+  .weak MemoryManagement_Handler
+MemoryManagement_Handler:
+  b .
+  
+  .thumb_func
+  .weak BusFault_Handler
+BusFault_Handler:
+  b .
+  
+  .thumb_func
+  .weak UsageFault_Handler
+UsageFault_Handler:
+  b .
+
+  .thumb_func
+  .weak SVC_Handler
+SVC_Handler:
+  b .
+  
+  .thumb_func
+  .weak DebugMon_Handler
+DebugMon_Handler:
+  b .
+
+  .thumb_func
+  .weak PendSV_Handler
+PendSV_Handler:
+  b .
+
+  .thumb_func
+  .weak SysTick_Handler
+SysTick_Handler:
+  b .
+
+  .thumb_func
+Dummy_Handler:
+  b .
+
+#if defined(__OPTIMIZATION_SMALL)
+
+  .weak POWER_CLOCK_IRQHandler
+  .thumb_set POWER_CLOCK_IRQHandler,Dummy_Handler
+
+  .weak RADIO_IRQHandler
+  .thumb_set RADIO_IRQHandler,Dummy_Handler
+
+  .weak UARTE0_UART0_IRQHandler
+  .thumb_set UARTE0_UART0_IRQHandler,Dummy_Handler
+
+  .weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+  .thumb_set SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,Dummy_Handler
+
+  .weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+  .thumb_set SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,Dummy_Handler
+
+  .weak NFCT_IRQHandler
+  .thumb_set NFCT_IRQHandler,Dummy_Handler
+
+  .weak GPIOTE_IRQHandler
+  .thumb_set GPIOTE_IRQHandler,Dummy_Handler
+
+  .weak SAADC_IRQHandler
+  .thumb_set SAADC_IRQHandler,Dummy_Handler
+
+  .weak TIMER0_IRQHandler
+  .thumb_set TIMER0_IRQHandler,Dummy_Handler
+
+  .weak TIMER1_IRQHandler
+  .thumb_set TIMER1_IRQHandler,Dummy_Handler
+
+  .weak TIMER2_IRQHandler
+  .thumb_set TIMER2_IRQHandler,Dummy_Handler
+
+  .weak RTC0_IRQHandler
+  .thumb_set RTC0_IRQHandler,Dummy_Handler
+
+  .weak TEMP_IRQHandler
+  .thumb_set TEMP_IRQHandler,Dummy_Handler
+
+  .weak RNG_IRQHandler
+  .thumb_set RNG_IRQHandler,Dummy_Handler
+
+  .weak ECB_IRQHandler
+  .thumb_set ECB_IRQHandler,Dummy_Handler
+
+  .weak CCM_AAR_IRQHandler
+  .thumb_set CCM_AAR_IRQHandler,Dummy_Handler
+
+  .weak WDT_IRQHandler
+  .thumb_set WDT_IRQHandler,Dummy_Handler
+
+  .weak RTC1_IRQHandler
+  .thumb_set RTC1_IRQHandler,Dummy_Handler
+
+  .weak QDEC_IRQHandler
+  .thumb_set QDEC_IRQHandler,Dummy_Handler
+
+  .weak COMP_LPCOMP_IRQHandler
+  .thumb_set COMP_LPCOMP_IRQHandler,Dummy_Handler
+
+  .weak SWI0_EGU0_IRQHandler
+  .thumb_set SWI0_EGU0_IRQHandler,Dummy_Handler
+
+  .weak SWI1_EGU1_IRQHandler
+  .thumb_set SWI1_EGU1_IRQHandler,Dummy_Handler
+
+  .weak SWI2_EGU2_IRQHandler
+  .thumb_set SWI2_EGU2_IRQHandler,Dummy_Handler
+
+  .weak SWI3_EGU3_IRQHandler
+  .thumb_set SWI3_EGU3_IRQHandler,Dummy_Handler
+
+  .weak SWI4_EGU4_IRQHandler
+  .thumb_set SWI4_EGU4_IRQHandler,Dummy_Handler
+
+  .weak SWI5_EGU5_IRQHandler
+  .thumb_set SWI5_EGU5_IRQHandler,Dummy_Handler
+
+  .weak TIMER3_IRQHandler
+  .thumb_set TIMER3_IRQHandler,Dummy_Handler
+
+  .weak TIMER4_IRQHandler
+  .thumb_set TIMER4_IRQHandler,Dummy_Handler
+
+  .weak PWM0_IRQHandler
+  .thumb_set PWM0_IRQHandler,Dummy_Handler
+
+  .weak PDM_IRQHandler
+  .thumb_set PDM_IRQHandler,Dummy_Handler
+
+  .weak MWU_IRQHandler
+  .thumb_set MWU_IRQHandler,Dummy_Handler
+
+  .weak PWM1_IRQHandler
+  .thumb_set PWM1_IRQHandler,Dummy_Handler
+
+  .weak PWM2_IRQHandler
+  .thumb_set PWM2_IRQHandler,Dummy_Handler
+
+  .weak SPIM2_SPIS2_SPI2_IRQHandler
+  .thumb_set SPIM2_SPIS2_SPI2_IRQHandler,Dummy_Handler
+
+  .weak RTC2_IRQHandler
+  .thumb_set RTC2_IRQHandler,Dummy_Handler
+
+  .weak I2S_IRQHandler
+  .thumb_set I2S_IRQHandler,Dummy_Handler
+
+  .weak FPU_IRQHandler
+  .thumb_set FPU_IRQHandler,Dummy_Handler
+
+  .weak USBD_IRQHandler
+  .thumb_set USBD_IRQHandler,Dummy_Handler
+
+  .weak UARTE1_IRQHandler
+  .thumb_set UARTE1_IRQHandler,Dummy_Handler
+
+  .weak QSPI_IRQHandler
+  .thumb_set QSPI_IRQHandler,Dummy_Handler
+
+  .weak CRYPTOCELL_IRQHandler
+  .thumb_set CRYPTOCELL_IRQHandler,Dummy_Handler
+
+  .weak SPIM3_IRQHandler
+  .thumb_set SPIM3_IRQHandler,Dummy_Handler
+
+  .weak PWM3_IRQHandler
+  .thumb_set PWM3_IRQHandler,Dummy_Handler
+
+#else
+
+  .thumb_func
+  .weak POWER_CLOCK_IRQHandler
+POWER_CLOCK_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak RADIO_IRQHandler
+RADIO_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak UARTE0_UART0_IRQHandler
+UARTE0_UART0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak NFCT_IRQHandler
+NFCT_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak GPIOTE_IRQHandler
+GPIOTE_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SAADC_IRQHandler
+SAADC_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TIMER0_IRQHandler
+TIMER0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TIMER1_IRQHandler
+TIMER1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TIMER2_IRQHandler
+TIMER2_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak RTC0_IRQHandler
+RTC0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TEMP_IRQHandler
+TEMP_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak RNG_IRQHandler
+RNG_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak ECB_IRQHandler
+ECB_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak CCM_AAR_IRQHandler
+CCM_AAR_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak WDT_IRQHandler
+WDT_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak RTC1_IRQHandler
+RTC1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak QDEC_IRQHandler
+QDEC_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak COMP_LPCOMP_IRQHandler
+COMP_LPCOMP_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI0_EGU0_IRQHandler
+SWI0_EGU0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI1_EGU1_IRQHandler
+SWI1_EGU1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI2_EGU2_IRQHandler
+SWI2_EGU2_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI3_EGU3_IRQHandler
+SWI3_EGU3_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI4_EGU4_IRQHandler
+SWI4_EGU4_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SWI5_EGU5_IRQHandler
+SWI5_EGU5_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TIMER3_IRQHandler
+TIMER3_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak TIMER4_IRQHandler
+TIMER4_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak PWM0_IRQHandler
+PWM0_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak PDM_IRQHandler
+PDM_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak MWU_IRQHandler
+MWU_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak PWM1_IRQHandler
+PWM1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak PWM2_IRQHandler
+PWM2_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SPIM2_SPIS2_SPI2_IRQHandler
+SPIM2_SPIS2_SPI2_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak RTC2_IRQHandler
+RTC2_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak I2S_IRQHandler
+I2S_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak FPU_IRQHandler
+FPU_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak USBD_IRQHandler
+USBD_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak UARTE1_IRQHandler
+UARTE1_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak QSPI_IRQHandler
+QSPI_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak CRYPTOCELL_IRQHandler
+CRYPTOCELL_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak SPIM3_IRQHandler
+SPIM3_IRQHandler:
+  b .
+
+  .thumb_func
+  .weak PWM3_IRQHandler
+PWM3_IRQHandler:
+  b .
+
+#endif
+
+/*****************************************************************************
+ * Vector Table                                                              *
+ *****************************************************************************/
+
+  .section .vectors, "ax"
+  .align 0
+  .global _vectors
+  .extern __stack_end__
+  .extern Reset_Handler
+
+_vectors:
+  .word __stack_end__
+  .word Reset_Handler
+  .word NMI_Handler
+  .word HardFault_Handler
+  .word MemoryManagement_Handler
+  .word BusFault_Handler
+  .word UsageFault_Handler
+  .word 0 /* Reserved */
+  .word 0 /* Reserved */
+  .word 0 /* Reserved */
+  .word 0 /* Reserved */
+  .word SVC_Handler
+  .word DebugMon_Handler
+  .word 0 /* Reserved */
+  .word PendSV_Handler
+  .word SysTick_Handler
+  .word POWER_CLOCK_IRQHandler
+  .word RADIO_IRQHandler
+  .word UARTE0_UART0_IRQHandler
+  .word SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+  .word SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+  .word NFCT_IRQHandler
+  .word GPIOTE_IRQHandler
+  .word SAADC_IRQHandler
+  .word TIMER0_IRQHandler
+  .word TIMER1_IRQHandler
+  .word TIMER2_IRQHandler
+  .word RTC0_IRQHandler
+  .word TEMP_IRQHandler
+  .word RNG_IRQHandler
+  .word ECB_IRQHandler
+  .word CCM_AAR_IRQHandler
+  .word WDT_IRQHandler
+  .word RTC1_IRQHandler
+  .word QDEC_IRQHandler
+  .word COMP_LPCOMP_IRQHandler
+  .word SWI0_EGU0_IRQHandler
+  .word SWI1_EGU1_IRQHandler
+  .word SWI2_EGU2_IRQHandler
+  .word SWI3_EGU3_IRQHandler
+  .word SWI4_EGU4_IRQHandler
+  .word SWI5_EGU5_IRQHandler
+  .word TIMER3_IRQHandler
+  .word TIMER4_IRQHandler
+  .word PWM0_IRQHandler
+  .word PDM_IRQHandler
+  .word Dummy_Handler /* Reserved */
+  .word Dummy_Handler /* Reserved */
+  .word MWU_IRQHandler
+  .word PWM1_IRQHandler
+  .word PWM2_IRQHandler
+  .word SPIM2_SPIS2_SPI2_IRQHandler
+  .word RTC2_IRQHandler
+  .word I2S_IRQHandler
+  .word FPU_IRQHandler
+  .word USBD_IRQHandler
+  .word UARTE1_IRQHandler
+  .word QSPI_IRQHandler
+  .word CRYPTOCELL_IRQHandler
+  .word SPIM3_IRQHandler
+  .word Dummy_Handler /* Reserved */
+  .word PWM3_IRQHandler
+_vectors_end:
+
+#ifdef VECTORS_IN_RAM
+  .section .vectors_ram, "ax"
+  .align 0
+  .global _vectors_ram
+
+_vectors_ram:
+  .space _vectors_end - _vectors, 0
+#endif
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.c b/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.c
new file mode 100644
index 000000000..dd821df94
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.c
@@ -0,0 +1,256 @@
+/*
+
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+   be copied into the application project folder prior to its use! */
+   
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52840.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M      (64000000UL)
+
+static bool errata_36(void);
+static bool errata_66(void);
+static bool errata_98(void);
+static bool errata_103(void);
+static bool errata_115(void);
+static bool errata_120(void);
+static bool errata_136(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+       Specification to see which one). */
+    #if defined (ENABLE_SWO)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+       Specification to see which ones). */
+    #if defined (ENABLE_TRACE)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[7]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[0]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[9]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+    
+    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_36()){
+        NRF_CLOCK->EVENTS_DONE = 0;
+        NRF_CLOCK->EVENTS_CTTO = 0;
+        NRF_CLOCK->CTIV = 0;
+    }
+    
+    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_66()){
+        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+    }
+    
+    /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_98()){
+        *(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
+    }
+    
+    /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_103()){
+        NRF_CCM->MAXPACKETSIZE = 0xFBul;
+    }
+    
+    /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_115()){
+        *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
+    }
+    
+    /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_120()){
+        *(volatile uint32_t *)0x40029640ul = 0x200ul;
+    }
+    
+    /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_136()){
+        if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
+            NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
+        }
+    }
+    
+    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+     * operations are not used in your code. */
+    #if (__FPU_USED == 1)
+        SCB->CPACR |= (3UL << 20) | (3UL << 22);
+        __DSB();
+        __ISB();
+    #endif
+
+    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+       normal GPIOs. */
+    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+      reserved for PinReset and not available as normal GPIO. */
+    #if defined (CONFIG_GPIO_AS_PINRESET)
+        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[0] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[1] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    SystemCoreClockUpdate();
+}
+
+
+static bool errata_36(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_66(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_98(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_103(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_115(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_120(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_136(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+/*lint --flb "Leave library region" */
diff --git a/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.h b/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.h
new file mode 100644
index 000000000..5a1e79496
--- /dev/null
+++ b/hw/mcu/nordic/nrf52/sdk/toolchain/system_nrf52840.h
@@ -0,0 +1,61 @@
+/*
+
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+#ifndef SYSTEM_NRF52840_H
+#define SYSTEM_NRF52840_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52840_H */