Merge pull request #808 from hathach/lpc55-port1-hs

Lpc55 port1 hs

8 files changed, 158 insertions, 49 deletions

diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.h b/hw/bsp/lpc55/boards/double_m33_express/board.h
index e73d700ba..6e43b8fc5 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.h
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.h
@@ -53,6 +53,9 @@
 #define UART_RX_PINMUX        0U, 29U, IOCON_PIO_DIG_FUNC1_EN
 #define UART_TX_PINMUX        0U, 30U, IOCON_PIO_DIG_FUNC1_EN
 
+// XTAL
+//#define XTAL0_CLK_HZ          16000000U
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
index 7e76df953..10f74ec3f 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
@@ -42,9 +42,12 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
-//#define UART_DEV              USART0
-//#define UART_RX_PINMUX        0U, 29U, IOCON_PIO_DIG_FUNC1_EN
-//#define UART_TX_PINMUX        0U, 30U, IOCON_PIO_DIG_FUNC1_EN
+#define UART_DEV              USART0
+#define UART_RX_PINMUX        0, 29, IOCON_PIO_DIG_FUNC1_EN
+#define UART_TX_PINMUX        0, 30, IOCON_PIO_DIG_FUNC1_EN
+
+// XTAL
+#define XTAL0_CLK_HZ          16000000U
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
index 7e76df953..10f74ec3f 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
@@ -42,9 +42,12 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
-//#define UART_DEV              USART0
-//#define UART_RX_PINMUX        0U, 29U, IOCON_PIO_DIG_FUNC1_EN
-//#define UART_TX_PINMUX        0U, 30U, IOCON_PIO_DIG_FUNC1_EN
+#define UART_DEV              USART0
+#define UART_RX_PINMUX        0, 29, IOCON_PIO_DIG_FUNC1_EN
+#define UART_TX_PINMUX        0, 30, IOCON_PIO_DIG_FUNC1_EN
+
+// XTAL
+#define XTAL0_CLK_HZ          16000000U
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
index 88a065d4c..8adf62df8 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
@@ -2,6 +2,7 @@ MCU_VARIANT = LPC55S69
 MCU_CORE = LPC55S69_cm33_core0
 
 CFLAGS += -DCPU_LPC55S69JBD100_cm33_core0
+PORT ?= 1
 
 JLINK_DEVICE = LPC55S69
 PYOCD_TARGET = LPC55S69
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.h b/hw/bsp/lpc55/boards/mcu_link/board.h
new file mode 100644
index 000000000..5e17cf9fd
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board.h
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              0
+#define LED_PIN               5
+#define LED_STATE_ON          0
+
+// WAKE button (Dummy, use unused pin
+#define BUTTON_PORT           0
+#define BUTTON_PIN            30
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_DEV              USART0
+#define UART_RX_PINMUX        0, 24, IOCON_PIO_DIG_FUNC1_EN
+#define UART_TX_PINMUX        0, 25, IOCON_PIO_DIG_FUNC1_EN
+
+// XTAL
+#define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.mk b/hw/bsp/lpc55/boards/mcu_link/board.mk
new file mode 100644
index 000000000..c3b55802e
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board.mk
@@ -0,0 +1,13 @@
+PORT ?= 1
+SPEED ?= high
+
+MCU_VARIANT = LPC55S69
+MCU_CORE = LPC55S69_cm33_core0
+
+CFLAGS += -DCPU_LPC55S69JBD64_cm33_core0
+
+JLINK_DEVICE = LPC55S69
+PYOCD_TARGET = LPC55S69
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 0e238129d..890c2f5c5 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -35,19 +35,6 @@
 #include "sct_neopixel.h"
 
 //--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-void USB1_IRQHandler(void)
-{
-  tud_int_handler(1);
-}
-
-//--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
@@ -67,6 +54,19 @@ void USB1_IRQHandler(void)
 #define IOCON_PIO_DIG_FUNC4_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC4) /*!<@brief Digital pin function 2 enabled */
 #define IOCON_PIO_DIG_FUNC7_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC7) /*!<@brief Digital pin function 2 enabled */
 
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB0_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+void USB1_IRQHandler(void)
+{
+  tud_int_handler(1);
+}
+
 /****************************************************************
 name: BOARD_BootClockFROHF96M
 outputs:
@@ -109,10 +109,10 @@ void board_init(void)
   // Init 96 MHz clock
   BootClockFROHF96M();
 
-#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
@@ -145,7 +145,7 @@ void board_init(void)
   gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
   GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
 
-#if defined(UART_DEV)
+#ifdef UART_DEV
   // UART
   IOCON_PinMuxSet(IOCON, UART_RX_PINMUX);
   IOCON_PinMuxSet(IOCON, UART_TX_PINMUX);
@@ -164,43 +164,71 @@ void board_init(void)
   /* PORT0 PIN22 configured as USB0_VBUS */
   IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN);
 
-  // USB Controller
-  POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB0 Phy */
-  POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); /*< Turn on USB1 Phy */
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
+  // Port0 is Full Speed
+
+  /* Turn on USB0 Phy */
+  POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
 
   /* reset the IP to make sure it's in reset state. */
   RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
   RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
   RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
-
-#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE
-  CLOCK_EnableClock(kCLOCK_Usbh1);
-  /* Put PHY powerdown under software control */
-  USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK;
-  /* According to reference mannual, device mode setting has to be set by access usb host register */
-  USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
-  /* enable usb1 host clock */
-  CLOCK_DisableClock(kCLOCK_Usbh1);
-#endif
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
   // Enable USB Clock Adjustments to trim the FRO for the full speed controller
   ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
   CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
   CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
-  /* enable usb0 host clock */
-  CLOCK_EnableClock(kCLOCK_Usbhsl0);
+
   /*According to reference mannual, device mode setting has to be set by access usb host register */
+  CLOCK_EnableClock(kCLOCK_Usbhsl0);  // enable usb0 host clock
   USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
-  /* disable usb0 host clock */
-  CLOCK_DisableClock(kCLOCK_Usbhsl0);
-  CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB Device clock */
+  CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
+
+  /* enable USB Device clock */
+  CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
 #endif
 
+#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE
+  // Port1 is High Speed
+
+  /* Turn on USB1 Phy */
+  POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY);
+
+  /* reset the IP to make sure it's in reset state. */
+  RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
+
+  /* According to reference mannual, device mode setting has to be set by access usb host register */
+  CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
+
+  USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
+  USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
+
+  CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
+
+  /* enable USB Device clock */
+  CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, XTAL0_CLK_HZ);
+  CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
+  CLOCK_EnableClock(kCLOCK_UsbRam1);
+
+  // Enable PHY support for Low speed device + LS via FS Hub
+  USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
+
+  // Enable all power for normal operation
+  USBPHY->PWD = 0;
+
+  USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK;
+  USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK;
+
+  // TX Timing
+//  uint32_t phytx = USBPHY->TX;
+//  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
+//  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
+//  USBPHY->TX = phytx;
+#endif
 }
 
 //--------------------------------------------------------------------+
@@ -237,8 +265,8 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-  (void) buf; (void) len;
-  return 0;
+  USART_WriteBlocking(UART_DEV, (uint8_t *)buf, len);
+  return len;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index c8874f571..46923cc4f 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -14,13 +14,15 @@ CFLAGS += \
   -mfloat-abi=hard \
   -mfpu=fpv5-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
   -DBOARD_DEVICE_RHPORT_NUM=$(PORT)
 
 ifeq ($(PORT), 1)
-  CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
   $(info "PORT1 High Speed")
+  CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
+
+  # LPC55 Highspeed Port1 can only write to USB_SRAM region
+  CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
 else
   $(info "PORT0 Full Speed")
 endif