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authorhathach <[email protected]>2023-11-20 22:09:38 +0700
committerhathach <[email protected]>2023-11-20 22:09:38 +0700
commit86f6588c3f5d682ca6d94064b5817a8a463fd23b (patch)
tree22908b0028ec9b13bf19c00f62885b32579c3ca2 /hw
parent1f71625a32a77d5fe243f71f9e8be03c9bbc41d1 (diff)
update example to work with featherwing max3421, set max3421 GPIO0 for vbus
tested with feather nrf52840, m0, m4
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/nrf/boards/feather_nrf52840_express/board.h4
-rw-r--r--hw/bsp/nrf/family.c2
-rw-r--r--hw/bsp/samd21/boards/feather_m0_express/board.h15
-rw-r--r--hw/bsp/samd51/family.c15
4 files changed, 17 insertions, 19 deletions
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index 3d59516d8..22946422b 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -49,8 +49,8 @@
#define MAX3421_SCK_PIN 14
#define MAX3421_MOSI_PIN 13
#define MAX3421_MISO_PIN 15
-#define MAX3421_CS_PIN 27 // D10
-#define MAX3421_INTR_PIN 26 // D9
+#define MAX3421_CS_PIN 6 // D11
+#define MAX3421_INTR_PIN 27 // D10
#ifdef __cplusplus
}
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index c431389f3..6e0cd85c3 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -95,9 +95,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
//------------- Host using MAX2341E -------------//
#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-
static void max3421_init(void);
-
static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
#endif
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h
index 8e0caa6bd..fd3d16aaa 100644
--- a/hw/bsp/samd21/boards/feather_m0_express/board.h
+++ b/hw/bsp/samd21/boards/feather_m0_express/board.h
@@ -43,6 +43,21 @@
#define UART_RX_PIN 4
#define UART_TX_PIN 5
+// SPI for USB host shield
+#define MAX3421_SERCOM_ID 4 // SERCOM4
+#define MAX3421_SERCOM_FUNCTION 3 // function D (Sercom Alt)
+
+#define MAX3421_SCK_PIN (32+11)
+#define MAX3421_MOSI_PIN (32+10)
+#define MAX3421_MISO_PIN 12
+#define MAX3421_TX_PAD 1 // MOSI = PAD_2, SCK = PAD_3
+#define MAX3421_RX_PAD 0 // MISO = PAD_2
+
+#define MAX3421_CS_PIN 16 // D11
+
+#define MAX3421_INTR_PIN 18 // D10
+#define MAX3421_INTR_EIC_ID 2 // EIC2
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 2a2aee982..009a0d290 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -78,12 +78,6 @@ void USB_3_Handler(void) {
#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
-// API to read MAX3421's register. Implemented by TinyUSB
-extern uint8_t tuh_max3421_reg_read(uint8_t rhport, uint8_t reg, bool in_isr);
-
-// API to write MAX3421's register. Implemented by TinyUSB
-extern bool tuh_max3421_reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr);
-
#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
#define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
@@ -148,15 +142,6 @@ void board_init(void) {
}
void board_init_after_tusb(void) {
-#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
- // FeatherWing MAX3421E use MAX3421E's GPIO0 for VBUS enable
- enum {
- IOPINS1_ADDR = 20u << 3, // 0xA0
- };
-
- uint8_t rhport = 1;
- tuh_max3421_reg_write(rhport, IOPINS1_ADDR, 0x01, false);
-#endif
}
//--------------------------------------------------------------------+