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authorHa Thach <[email protected]>2026-06-18 12:15:40 +0700
committerGitHub <[email protected]>2026-06-18 12:15:40 +0700
commit941d63e39a529593ee86caf7ea85e04839680d59 (patch)
tree6df899db9fe34d9385515cb0a27b905c176e4ea4 /hw
parent52035e2fa3174e85f9c43afdba05097519ae6ea9 (diff)
parent133de459505860f6961621b5619f4a4cb6c357c4 (diff)
Merge pull request #3710 from hathach/add-hil-ch32v103
ch32v103: bring up USB device (combined-control USBFS IP) + add to HIL
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/ch32v10x/family.c39
1 files changed, 18 insertions, 21 deletions
diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 9f5dc5572..aa709b0d8 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -66,26 +66,14 @@ uint32_t tusb_time_millis_api(void) {
}
#endif
-// 0x800 CSR register is writable in U-mode
-// according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
-__attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_enable_irq(void)
-{
- __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
-}
-
-__attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_disable_irq(void)
-{
- __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
- __asm volatile ("fence.i");
-}
-
void board_init(void) {
- /* __disable_irq() in CH32V103 EVT attempts to call
- * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
- * Replace this with CSR 0x800 to avoid hard-fault. */
- __wch_vendor_disable_irq();
+ /* Do NOT toggle the global interrupt enable here.
+ * CH32V103 startup enters U-mode (mret with mstatus.MPP=0), so:
+ * - the SDK __disable_irq()/__enable_irq() write mstatus, which faults in U-mode;
+ * - writing CSR 0x800 (INTSYSCR) corrupts the QingKe V3 interrupt-mode config,
+ * which made the USB interrupt vector to a bad address (PC=0) and hang.
+ * The startup already leaves interrupts correctly configured, and machine-mode
+ * interrupts are globally enabled while running in U-mode regardless of mstatus.MIE. */
#if CFG_TUSB_OS == OPT_OS_NONE
SysTick_Config(SystemCoreClock / 1000);
@@ -142,8 +130,6 @@ void board_init(void) {
USART_Init(USART1, &usart);
USART_Cmd(USART1, ENABLE);
- __wch_vendor_enable_irq();
-
board_led_write(true);
}
@@ -155,6 +141,17 @@ uint32_t board_button_read(void) {
return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN);
}
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+ (void) max_len;
+ volatile uint32_t* ch32_uuid = ((volatile uint32_t*) 0x1FFFF7E8UL);
+ uint32_t* serial_32 = (uint32_t*) (uintptr_t) id;
+ serial_32[0] = ch32_uuid[0];
+ serial_32[1] = ch32_uuid[1];
+ serial_32[2] = ch32_uuid[2];
+
+ return 12;
+}
+
int board_uart_read(uint8_t *buf, int len) {
(void) buf;
(void) len;