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authorHa Thach <[email protected]>2026-03-05 21:25:58 +0700
committerGitHub <[email protected]>2026-03-05 21:25:58 +0700
commitae3864d21f2b206ae41d1d424b96fea0ac7e0dc6 (patch)
tree2c35c9cd84662958fe7853e2a8563ca2bc8e6fe9 /hw
parentcd7bbba1ddc1ee8f6b4f896c98a5ec452b0953d6 (diff)
parentce8a77083dc00423b2c1a4c7657aa7290684dea6 (diff)
Merge pull request #3423 from armusin/threadx_osal
ThreadX OSAL header
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/board.c50
-rw-r--r--hw/bsp/espressif/boards/family.c11
-rw-r--r--hw/bsp/family_support.cmake20
-rw-r--r--hw/bsp/rp2040/family.c12
-rw-r--r--hw/bsp/stm32h7/family.c9
5 files changed, 79 insertions, 23 deletions
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 91e7de9fe..71c209950 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -251,3 +251,53 @@ void vApplicationSetupTimerInterrupt(void) {
#endif
#endif
+
+//--------------------------------------------------------------------
+// ThreadX hooks for ARM Cortex-M
+//--------------------------------------------------------------------
+#if CFG_TUSB_OS == OPT_OS_THREADX && defined(__ARM_ARCH)
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+
+// Newlib linker symbol: end of statically allocated RAM (start of heap)
+extern ULONG _end;
+
+// CMSIS standard variable for system clock frequency
+extern uint32_t SystemCoreClock;
+
+// Cortex-M SysTick registers (fixed addresses on all Cortex-M)
+#define _TX_SYST_CSR (*((volatile uint32_t *)0xE000E010U))
+#define _TX_SYST_RVR (*((volatile uint32_t *)0xE000E014U))
+#define _TX_SYST_CVR (*((volatile uint32_t *)0xE000E018U))
+// SCB->SHP[10] = PendSV priority, [11] = SysTick priority (byte access at SCB base + 0xD22)
+#define _TX_SCB_SHPR3 (*((volatile uint32_t *)0xE000ED20U))
+
+VOID _tx_initialize_low_level(VOID) {
+ // Set the first available memory address for tx_application_define
+ _tx_initialize_unused_memory = (VOID *)(&_end);
+
+ // Configure SysTick for ThreadX tick rate: enable with processor clock + interrupt
+ _TX_SYST_RVR = (SystemCoreClock / TX_TIMER_TICKS_PER_SECOND) - 1u;
+ _TX_SYST_CVR = 0u;
+ _TX_SYST_CSR = 0x07u; // CLKSOURCE=1, TICKINT=1, ENABLE=1
+
+ // SHPR3 bits[31:24] = SysTick priority, bits[23:16] = PendSV priority
+ // PendSV must be lowest priority (0xFF). SysTick must be higher than PendSV (0x40)
+ // so SysTick can preempt the PendSV scheduler idle loop (__tx_ts_wait) to tick the timer.
+ _TX_SCB_SHPR3 = (_TX_SCB_SHPR3 & 0x0000FFFFU) | 0x40FF0000U;
+}
+
+// Weak callback for board-specific SysTick work (e.g. HAL_IncTick on STM32)
+void osal_threadx_tick_cb(void);
+TU_ATTR_WEAK void osal_threadx_tick_cb(void) { }
+
+// SysTick drives the ThreadX timer tick
+extern void _tx_timer_interrupt(void);
+void SysTick_Handler(void);
+void SysTick_Handler(void) {
+ osal_threadx_tick_cb();
+ _tx_timer_interrupt();
+}
+
+#endif
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 2fad7feec..04d8a4001 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -364,14 +364,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
return true;
}
#endif
-
-// board test example does not use both device and host stack
-#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
-TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
- return osal_time_millis();
-}
-
-TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
- osal_task_delay(ms);
-}
-#endif
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 699afda92..4299ad44e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -380,6 +380,26 @@ function(family_add_rtos TARGET RTOS)
target_link_libraries(${TARGET} PUBLIC freertos_kernel)
target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_FREERTOS)
+ elseif (RTOS STREQUAL "threadx")
+ if (NOT TARGET threadx)
+ # Derive THREADX_ARCH from CMAKE_SYSTEM_CPU if not explicitly set
+ if (NOT DEFINED THREADX_ARCH)
+ string(REPLACE "-" "_" THREADX_ARCH ${CMAKE_SYSTEM_CPU})
+ endif ()
+ # Derive THREADX_TOOLCHAIN from TOOLCHAIN if not explicitly set
+ if (NOT DEFINED THREADX_TOOLCHAIN)
+ if (TOOLCHAIN STREQUAL "iar")
+ set(THREADX_TOOLCHAIN "iar")
+ elseif (TOOLCHAIN STREQUAL "clang")
+ set(THREADX_TOOLCHAIN "ac6")
+ else ()
+ set(THREADX_TOOLCHAIN "gnu")
+ endif ()
+ endif ()
+ add_subdirectory(${TOP}/lib/threadx ${CMAKE_BINARY_DIR}/lib/threadx)
+ endif ()
+ target_link_libraries(${TARGET} PUBLIC threadx)
+ target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_THREADX)
elseif (RTOS STREQUAL "zephyr")
target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_ZEPHYR)
target_include_directories(${TARGET} PUBLIC ${ZEPHYR_BASE}/include)
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index d68b13dd1..a51b3f758 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -377,15 +377,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
}
#endif
-
-
-// board test example does not use both device and host stack
-#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
-TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
- return osal_time_millis();
-}
-
-TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
- osal_task_delay(ms);
-}
-#endif
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 2759dac63..c94c2e755 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -139,6 +139,10 @@ void board_init(void) {
#endif
NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+ // Disable SysTick before kernel entry; _tx_initialize_low_level() will re-configure it
+ SysTick->CTRL &= ~1UL;
#endif
GPIO_InitTypeDef GPIO_InitStruct;
@@ -299,6 +303,11 @@ uint32_t tusb_time_millis_api(void) {
return system_ticks;
}
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+// Keep HAL_GetTick() working for HAL functions called from board_init()
+void osal_threadx_tick_cb(void) {
+ HAL_IncTick();
+}
#endif
void HardFault_Handler(void) {