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authorhathach <[email protected]>2019-11-27 14:49:19 +0700
committerhathach <[email protected]>2019-11-27 14:49:19 +0700
commitbc21714c7ee7767c0aae6d782b6b72b954dddcdf (patch)
tree13891810f2a9552d53771610f796cd132ea71e13 /hw
parent302746d02cd2824eecee4e0e947122ca9fb53b9d (diff)
detect bus reset
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/samg55xplained/samg55xplained.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c
index 67e7f9255..a5e145734 100644
--- a/hw/bsp/samg55xplained/samg55xplained.c
+++ b/hw/bsp/samg55xplained/samg55xplained.c
@@ -45,12 +45,8 @@
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
-//struct usart_async_descriptor _edbg_com;
-//static uint8_t _edbg_com_buf[64];
-
struct _usart_sync_device _edbg_com;
-
//------------- IMPLEMENTATION -------------//
void board_init(void)
{
@@ -81,7 +77,6 @@ void board_init(void)
_usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&_edbg_com);
-
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
SysTick_Config(CONF_CPU_FREQUENCY / 1000);