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authorhathach <[email protected]>2024-11-26 10:20:38 +0700
committerhathach <[email protected]>2024-11-26 10:20:38 +0700
commitbe25aa31f6720e0efe96e8656f46adf0ccbbce50 (patch)
tree4facacecc11a41afa07f1336657a3ddb07ad858c /hw
parent62f0e87bf16c750622999f3952506e3a364e4075 (diff)
hcd dwc2 add dcache support, usbh correctly use cache line size with TUH_EPBUF_DEF
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index 9f55c8d5a..95fb2e440 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -18,7 +18,8 @@ list(APPEND compile_definitions
if (target STREQUAL esp32p4)
# P4 change alignment to 64 (DCache line size) for possible DMA configuration
list(APPEND compile_definitions
- CFG_TUSB_MEM_ALIGN=__attribute__\(\(aligned\(64\)\)\)
+ CFG_TUD_MEM_ALIGN=__attribute__\(\(aligned\(64\)\)\)
+ CFG_TUH_MEM_ALIGN=__attribute__\(\(aligned\(64\)\)\)
)
endif ()