diff options
| author | Ha Thach <[email protected]> | 2019-11-22 15:16:41 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2019-11-22 15:16:41 +0700 |
| commit | ca741dfc2a88fdfebe0703e0d484dc5a684e3e99 (patch) | |
| tree | 11f8e391c7b3d2e55d9b84c165133e61060f5d6a /hw | |
| parent | f0682f62794290f4a17ac365b5c09b59dbc895ef (diff) | |
| parent | a02e723d098c3e2735e84a229968947e485e1b68 (diff) | |
Merge pull request #220 from hathach/develop
Port NXP iMX RT10XX
Diffstat (limited to 'hw')
51 files changed, 1027 insertions, 295 deletions
diff --git a/hw/bsp/circuitplayground_bluefruit/board.mk b/hw/bsp/circuitplayground_bluefruit/board.mk index 72b9ddfbe..bfeaa2355 100644 --- a/hw/bsp/circuitplayground_bluefruit/board.mk +++ b/hw/bsp/circuitplayground_bluefruit/board.mk @@ -1,11 +1,12 @@ CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -DCFG_TUSB_MCU=OPT_MCU_NRF5X \ - -DNRF52840_XXAA \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DCFG_TUSB_MCU=OPT_MCU_NRF5X \ + -DNRF52840_XXAA \ -DCONFIG_GPIO_AS_PINRESET # nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49 @@ -23,17 +24,17 @@ LD_FILE = hw/bsp/circuitplayground_bluefruit/nrf52840_s140_v6.ld LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk SRC_C += \ - hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \ - hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \ + hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \ + hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \ INC += \ - $(TOP)/hw/mcu/nordic/cmsis/Include \ - $(TOP)/hw/mcu/nordic \ - $(TOP)/hw/mcu/nordic/nrfx \ - $(TOP)/hw/mcu/nordic/nrfx/mdk \ - $(TOP)/hw/mcu/nordic/nrfx/hal \ - $(TOP)/hw/mcu/nordic/nrfx/drivers/include \ - $(TOP)/hw/mcu/nordic/nrfx/drivers/src \ + $(TOP)/hw/mcu/nordic/cmsis/Include \ + $(TOP)/hw/mcu/nordic \ + $(TOP)/hw/mcu/nordic/nrfx \ + $(TOP)/hw/mcu/nordic/nrfx/mdk \ + $(TOP)/hw/mcu/nordic/nrfx/hal \ + $(TOP)/hw/mcu/nordic/nrfx/drivers/include \ + $(TOP)/hw/mcu/nordic/nrfx/drivers/src \ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S diff --git a/hw/bsp/circuitplayground_express/board.mk b/hw/bsp/circuitplayground_express/board.mk index 158f543b3..115a81187 100644 --- a/hw/bsp/circuitplayground_express/board.mk +++ b/hw/bsp/circuitplayground_express/board.mk @@ -11,23 +11,23 @@ CFLAGS += \ LD_FILE = hw/bsp/circuitplayground_express/samd21g18a_flash.ld SRC_C += \ - hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \ - hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \ - hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \ - hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \ - hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \ - hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c + hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \ + hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \ + hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \ + hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \ + hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \ + hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c INC += \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/pm/ \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \ - $(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/pm/ \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \ + $(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include # For TinyUSB port source VENDOR = microchip diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk index f621affbf..a88976d3a 100644 --- a/hw/bsp/ea4088qs/board.mk +++ b/hw/bsp/ea4088qs/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ @@ -16,9 +17,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx # All source paths should be relative to the top level. LD_FILE = hw/bsp/ea4088qs/lpc4088.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \ $(MCU_DIR)/src/chip_17xx_40xx.c \ diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c index 8adb61fda..83b2d6b1e 100644 --- a/hw/bsp/ea4088qs/ea4088qs.c +++ b/hw/bsp/ea4088qs/ea4088qs.c @@ -114,6 +114,21 @@ void board_init(void) } //--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + + +//--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk index be6a307e1..098fb4c90 100644 --- a/hw/bsp/ea4357/board.mk +++ b/hw/bsp/ea4357/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ @@ -15,9 +16,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx # All source paths should be relative to the top level. LD_FILE = hw/bsp/ea4357/lpc4357.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \ $(MCU_DIR)/src/chip_18xx_43xx.c \ @@ -34,7 +32,7 @@ INC += \ # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc18_43 +CHIP_FAMILY = transdimension # For freeRTOS port source FREERTOS_PORT = ARM_CM4 diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c index c276f10d3..f5d2a199e 100644 --- a/hw/bsp/ea4357/ea4357.c +++ b/hw/bsp/ea4357/ea4357.c @@ -166,19 +166,19 @@ void board_init(void) #if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); - // Reset controller - LPC_USB0->USBCMD_D |= 0x02; - while( LPC_USB0->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - - LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging - #else // TODO OTG - LPC_USB0->USBMODE_D = USBMODE_DEVICE; - LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; - #endif +// // Reset controller +// LPC_USB0->USBCMD_D |= 0x02; +// while( LPC_USB0->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +// LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// +// LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging +// #else // TODO OTG +// LPC_USB0->USBMODE_D = USBMODE_DEVICE; +// LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; +// #endif #endif /* USB1 @@ -202,19 +202,19 @@ void board_init(void) #if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - // Reset controller - LPC_USB1->USBCMD_D |= 0x02; - while( LPC_USB1->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - #else // TODO OTG - LPC_USB1->USBMODE_D = USBMODE_DEVICE; - #endif - - // USB1 as fullspeed - LPC_USB1->PORTSC1_D |= (1<<24); +// // Reset controller +// LPC_USB1->USBCMD_D |= 0x02; +// while( LPC_USB1->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST +// LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// #else // TODO OTG +// LPC_USB1->USBMODE_D = USBMODE_DEVICE; +// #endif +// +// // USB1 as fullspeed +// LPC_USB1->PORTSC1_D |= (1<<24); #endif // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board) @@ -231,6 +231,31 @@ void board_init(void) } //--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + +void USB1_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST + tuh_isr(1); + #endif + + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + tud_isr(1); + #endif +} + +//--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/feather_m0_express/board.mk b/hw/bsp/feather_m0_express/board.mk index b7ba0b0e1..fe1913331 100644 --- a/hw/bsp/feather_m0_express/board.mk +++ b/hw/bsp/feather_m0_express/board.mk @@ -1,10 +1,11 @@ CFLAGS += \ - -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ - -D__SAMD21G18A__ \ + -flto \ -mthumb \ -mabi=aapcs-linux \ -mcpu=cortex-m0plus \ -nostdlib -nostartfiles \ + -D__SAMD21G18A__ \ + -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 # All source paths should be relative to the top level. diff --git a/hw/bsp/feather_m4_express/board.mk b/hw/bsp/feather_m4_express/board.mk index c62d9bc33..010e4b868 100644 --- a/hw/bsp/feather_m4_express/board.mk +++ b/hw/bsp/feather_m4_express/board.mk @@ -1,11 +1,12 @@ CFLAGS += \ - -D__SAMD51J19A__ \ + -flto \ -mthumb \ -mabi=aapcs-linux \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -D__SAMD51J19A__ \ -DCFG_TUSB_MCU=OPT_MCU_SAMD51 CFLAGS += -Wno-error=undef diff --git a/hw/bsp/feather_nrf52840_express/board.mk b/hw/bsp/feather_nrf52840_express/board.mk index 1e077bac7..b4d6fbe9f 100644 --- a/hw/bsp/feather_nrf52840_express/board.mk +++ b/hw/bsp/feather_nrf52840_express/board.mk @@ -1,11 +1,12 @@ CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -DCFG_TUSB_MCU=OPT_MCU_NRF5X \ - -DNRF52840_XXAA \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DCFG_TUSB_MCU=OPT_MCU_NRF5X \ + -DNRF52840_XXAA \ -DCONFIG_GPIO_AS_PINRESET # nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49 @@ -23,17 +24,17 @@ LD_FILE = hw/bsp/feather_nrf52840_express/nrf52840_s140_v6.ld LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk SRC_C += \ - hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \ - hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \ + hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \ + hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \ INC += \ - $(TOP)/hw/mcu/nordic/cmsis/Include \ - $(TOP)/hw/mcu/nordic \ - $(TOP)/hw/mcu/nordic/nrfx \ - $(TOP)/hw/mcu/nordic/nrfx/mdk \ - $(TOP)/hw/mcu/nordic/nrfx/hal \ - $(TOP)/hw/mcu/nordic/nrfx/drivers/include \ - $(TOP)/hw/mcu/nordic/nrfx/drivers/src \ + $(TOP)/hw/mcu/nordic/cmsis/Include \ + $(TOP)/hw/mcu/nordic \ + $(TOP)/hw/mcu/nordic/nrfx \ + $(TOP)/hw/mcu/nordic/nrfx/mdk \ + $(TOP)/hw/mcu/nordic/nrfx/hal \ + $(TOP)/hw/mcu/nordic/nrfx/drivers/include \ + $(TOP)/hw/mcu/nordic/nrfx/drivers/src \ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S diff --git a/hw/bsp/feather_stm32f405/board.mk b/hw/bsp/feather_stm32f405/board.mk index 14595e83e..1e68737b9 100644 --- a/hw/bsp/feather_stm32f405/board.mk +++ b/hw/bsp/feather_stm32f405/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=12000000 \ - -DSTM32F405xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32F405xx \ + -DHSE_VALUE=12000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver diff --git a/hw/bsp/fomu/board.mk b/hw/bsp/fomu/board.mk index cdcd63b28..4e8101b7f 100644 --- a/hw/bsp/fomu/board.mk +++ b/hw/bsp/fomu/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -march=rv32i \ -mabi=ilp32 \ -nostdlib \ diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index 72c5ef0d8..d3121ab95 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m0 \ diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index c1718395c..ba84b7d95 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m0plus \ diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index 1900ca0a8..54a83a3b6 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ diff --git a/hw/bsp/lpcxpresso1549/board.mk b/hw/bsp/lpcxpresso1549/board.mk index 66078f0f6..18325c5f7 100644 --- a/hw/bsp/lpcxpresso1549/board.mk +++ b/hw/bsp/lpcxpresso1549/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk index 412e0cd57..b87d6afc9 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ @@ -16,9 +17,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x # All source paths should be relative to the top level. LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \ $(MCU_DIR)/src/chip_17xx_40xx.c \ diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c index e2d5f6cf2..76755e89f 100644 --- a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c @@ -144,6 +144,20 @@ void board_init(void) } //--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + +//--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index f02dee033..61fbc0623 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m0plus \ diff --git a/hw/bsp/lpcxpresso54114/board.mk b/hw/bsp/lpcxpresso54114/board.mk index 24de4a44b..474a1ac5b 100644 --- a/hw/bsp/lpcxpresso54114/board.mk +++ b/hw/bsp/lpcxpresso54114/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ diff --git a/hw/bsp/lpcxpresso55s69/board.mk b/hw/bsp/lpcxpresso55s69/board.mk index fada53dc3..5977ce9f4 100644 --- a/hw/bsp/lpcxpresso55s69/board.mk +++ b/hw/bsp/lpcxpresso55s69/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m33 \ diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk index 9bb0a792c..60428bcb4 100644 --- a/hw/bsp/mbed1768/board.mk +++ b/hw/bsp/mbed1768/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ @@ -16,9 +17,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x # All source paths should be relative to the top level. LD_FILE = hw/bsp/mbed1768/lpc1768.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \ $(MCU_DIR)/src/chip_17xx_40xx.c \ @@ -43,5 +41,7 @@ FREERTOS_PORT = ARM_CM3 JLINK_DEVICE = LPC1768 JLINK_IF = swd -# flash using jlink -flash: flash-jlink +# flash using pyocd +flash: $(BUILD)/$(BOARD)-firmware.hex + pyocd flash -t lpc1768 $< + diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/mbed1768/mbed1768.c index 9f1ed12ef..66cf44a0e 100644 --- a/hw/bsp/mbed1768/mbed1768.c +++ b/hw/bsp/mbed1768/mbed1768.c @@ -136,6 +136,20 @@ void board_init(void) } //--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + +//--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/mcb1800/board.mk b/hw/bsp/mcb1800/board.mk index b50e47a2e..b05d4d71a 100644 --- a/hw/bsp/mcb1800/board.mk +++ b/hw/bsp/mcb1800/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ @@ -15,9 +16,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx # All source paths should be relative to the top level. LD_FILE = hw/bsp/mcb1800/lpc1857.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc18xx.c \ $(MCU_DIR)/src/chip_18xx_43xx.c \ @@ -32,7 +30,7 @@ INC += \ # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc18_43 +CHIP_FAMILY = transdimension # For freeRTOS port source FREERTOS_PORT = ARM_CM3 diff --git a/hw/bsp/mcb1800/mcb1800.c b/hw/bsp/mcb1800/mcb1800.c index deb17f113..6d5284869 100644 --- a/hw/bsp/mcb1800/mcb1800.c +++ b/hw/bsp/mcb1800/mcb1800.c @@ -139,39 +139,63 @@ void board_init(void) #if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); - // Reset controller - LPC_USB0->USBCMD_D |= 0x02; - while( LPC_USB0->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - #else // TODO OTG - LPC_USB0->USBMODE_D = USBMODE_DEVICE; - LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; - #endif +// // Reset controller +// LPC_USB0->USBCMD_D |= 0x02; +// while( LPC_USB0->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +// LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// #else // TODO OTG +// LPC_USB0->USBMODE_D = USBMODE_DEVICE; +// LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; +// #endif #endif // USB1 #if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - // Reset controller - LPC_USB1->USBCMD_D |= 0x02; - while( LPC_USB1->USBCMD_D & 0x02 ) {} +// // Reset controller +// LPC_USB1->USBCMD_D |= 0x02; +// while( LPC_USB1->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST +// LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// #else // TODO OTG +// LPC_USB1->USBMODE_D = USBMODE_DEVICE; +// #endif +// +// // USB1 as fullspeed +// LPC_USB1->PORTSC1_D |= (1<<24); +#endif +} - // Set mode - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - #else // TODO OTG - LPC_USB1->USBMODE_D = USBMODE_DEVICE; +//--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); #endif - // USB1 as fullspeed - LPC_USB1->PORTSC1_D |= (1<<24); -#endif + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif } +void USB1_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST + tuh_isr(1); + #endif + + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + tud_isr(1); + #endif +} //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/metro_m0_express/board.mk b/hw/bsp/metro_m0_express/board.mk index 3ea672807..2039219a4 100644 --- a/hw/bsp/metro_m0_express/board.mk +++ b/hw/bsp/metro_m0_express/board.mk @@ -1,10 +1,11 @@ CFLAGS += \ - -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ - -D__SAMD21G18A__ \ + -flto \ -mthumb \ -mabi=aapcs-linux \ -mcpu=cortex-m0plus \ -nostdlib -nostartfiles \ + -D__SAMD21G18A__ \ + -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 # All source paths should be relative to the top level. diff --git a/hw/bsp/metro_m4_express/board.mk b/hw/bsp/metro_m4_express/board.mk index c62d9bc33..010e4b868 100644 --- a/hw/bsp/metro_m4_express/board.mk +++ b/hw/bsp/metro_m4_express/board.mk @@ -1,11 +1,12 @@ CFLAGS += \ - -D__SAMD51J19A__ \ + -flto \ -mthumb \ -mabi=aapcs-linux \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -D__SAMD51J19A__ \ -DCFG_TUSB_MCU=OPT_MCU_SAMD51 CFLAGS += -Wno-error=undef diff --git a/hw/bsp/mimxrt1064_evk/board.h b/hw/bsp/mimxrt1064_evk/board.h new file mode 100644 index 000000000..3157e7d5e --- /dev/null +++ b/hw/bsp/mimxrt1064_evk/board.h @@ -0,0 +1,34 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +// required since iMX RT10xx SDK include this file for board size +#define BOARD_FLASH_SIZE (0x400000U) + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/mimxrt1064_evk/board.mk b/hw/bsp/mimxrt1064_evk/board.mk new file mode 100644 index 000000000..cd3c17ae7 --- /dev/null +++ b/hw/bsp/mimxrt1064_evk/board.mk @@ -0,0 +1,58 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-d16 \ + -D__ARMVFP__=0 -D__ARMFPV5__=0\ + -DCPU_MIMXRT1064DVL6A \ + -DXIP_EXTERNAL_FLASH=1 \ + -DXIP_BOOT_HEADER_ENABLE=1 \ + -DCFG_TUSB_MCU=OPT_MCU_RT10XX \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# mcu driver cause following warnings +#CFLAGS += -Wno-error=float-equal -Wno-error=nested-externs +CFLAGS += -Wno-error=unused-parameter + +MCU_DIR = hw/mcu/nxp/sdk/devices/MIMXRT1064 + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/MIMXRT1064xxxxx_flexspi_nor.ld + +SRC_C += \ + $(MCU_DIR)/system_MIMXRT1064.c \ + $(MCU_DIR)/xip/fsl_flexspi_nor_boot.c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_common.c \ + $(MCU_DIR)/drivers/fsl_lpuart.c + +INC += \ + $(TOP)/hw/bsp/$(BOARD) \ + $(TOP)/$(MCU_DIR)/../../CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(MCU_DIR)/project_template \ + +SRC_S += $(MCU_DIR)/gcc/startup_MIMXRT1064.S + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = transdimension + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM7 + +# For flash-jlink target +JLINK_DEVICE = MIMXRT1064xxx6A +JLINK_IF = swd + +# flash using pyocd +#flash: $(BUILD)/$(BOARD)-firmware.hex +# pyocd flash -t mimxrt1050_quadspi $< + +flash: $(BUILD)/$(BOARD)-firmware.bin + cp $< /media/$(USER)/RT1064-EVK/ diff --git a/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.c b/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.c new file mode 100644 index 000000000..bfb1c2d59 --- /dev/null +++ b/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.c @@ -0,0 +1,49 @@ +/* + * Copyright 2018 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "evkmimxrt1064_flexspi_nor_config.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_board" +#endif + +/******************************************************************************* + * Code + ******************************************************************************/ +#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.conf" +#endif + +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 3u, + .csSetupTime = 3u, + // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_100MHz, + .sflashA1Size = 8u * 1024u * 1024u, + .lookupTable = + { + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .blockSize = 256u * 1024u, + .isUniformBlockSize = false, +}; +#endif /* XIP_BOOT_HEADER_ENABLE */ diff --git a/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.h b/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.h new file mode 100644 index 000000000..efdfe583f --- /dev/null +++ b/hw/bsp/mimxrt1064_evk/evkmimxrt1064_flexspi_nor_config.h @@ -0,0 +1,268 @@ +/* + * Copyright 2018 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __EVKMIMXRT1064_FLEXSPI_NOR_CONFIG__ +#define __EVKMIMXRT1064_FLEXSPI_NOR_CONFIG__ + +#include <stdint.h> +#include <stdbool.h> +#include "fsl_common.h" + +/*! @name Driver version */ +/*@{*/ +/*! @brief XIP_BOARD driver version 2.0.0. */ +#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) +/*@}*/ + +/* FLEXSPI memory config block related defintions */ +#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian +#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0 +#define FLEXSPI_CFG_BLK_SIZE (512) + +/* FLEXSPI Feature related definitions */ +#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 + +/* Lookup table related defintions */ +#define CMD_INDEX_READ 0 +#define CMD_INDEX_READSTATUS 1 +#define CMD_INDEX_WRITEENABLE 2 +#define CMD_INDEX_WRITE 4 + +#define CMD_LUT_SEQ_IDX_READ 0 +#define CMD_LUT_SEQ_IDX_READSTATUS 1 +#define CMD_LUT_SEQ_IDX_WRITEENABLE 3 +#define CMD_LUT_SEQ_IDX_WRITE 9 + +#define CMD_SDR 0x01 +#define CMD_DDR 0x21 +#define RADDR_SDR 0x02 +#define RADDR_DDR 0x22 +#define CADDR_SDR 0x03 +#define CADDR_DDR 0x23 +#define MODE1_SDR 0x04 +#define MODE1_DDR 0x24 +#define MODE2_SDR 0x05 +#define MODE2_DDR 0x25 +#define MODE4_SDR 0x06 +#define MODE4_DDR 0x26 +#define MODE8_SDR 0x07 +#define MODE8_DDR 0x27 +#define WRITE_SDR 0x08 +#define WRITE_DDR 0x28 +#define READ_SDR 0x09 +#define READ_DDR 0x29 +#define LEARN_SDR 0x0A +#define LEARN_DDR 0x2A +#define DATSZ_SDR 0x0B +#define DATSZ_DDR 0x2B +#define DUMMY_SDR 0x0C +#define DUMMY_DDR 0x2C +#define DUMMY_RWDS_SDR 0x0D +#define DUMMY_RWDS_DDR 0x2D +#define JMP_ON_CS 0x1F +#define STOP 0 + +#define FLEXSPI_1PAD 0 +#define FLEXSPI_2PAD 1 +#define FLEXSPI_4PAD 2 +#define FLEXSPI_8PAD 3 + +#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ + (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ + FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + +//!@brief Definitions for FlexSPI Serial Clock Frequency +typedef enum _FlexSpiSerialClockFreq +{ + kFlexSpiSerialClk_30MHz = 1, + kFlexSpiSerialClk_50MHz = 2, + kFlexSpiSerialClk_60MHz = 3, + kFlexSpiSerialClk_75MHz = 4, + kFlexSpiSerialClk_80MHz = 5, + kFlexSpiSerialClk_100MHz = 6, + kFlexSpiSerialClk_120MHz = 7, + kFlexSpiSerialClk_133MHz = 8, + kFlexSpiSerialClk_166MHz = 9, +} flexspi_serial_clk_freq_t; + +//!@brief FlexSPI clock configuration type +enum +{ + kFlexSpiClk_SDR, //!< Clock configure for SDR mode + kFlexSpiClk_DDR, //!< Clock configurat for DDR mode +}; + +//!@brief FlexSPI Read Sample Clock Source definition +typedef enum _FlashReadSampleClkSource +{ + kFlexSPIReadSampleClk_LoopbackInternally = 0, + kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1, + kFlexSPIReadSampleClk_LoopbackFromSckPad = 2, + kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3, +} flexspi_read_sample_clk_t; + +//!@brief Misc feature bit definitions +enum +{ + kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable + kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable + kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable + kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable + kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable + kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable + kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication. +}; + +//!@brief Flash Type Definition +enum +{ + kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR + kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND + kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH + kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND + kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs +}; + +//!@brief Flash Pad Definitions +enum +{ + kSerialFlash_1Pad = 1, + kSerialFlash_2Pads = 2, + kSerialFlash_4Pads = 4, + kSerialFlash_8Pads = 8, +}; + +//!@brief FlexSPI LUT Sequence structure +typedef struct _lut_sequence +{ + uint8_t seqNum; //!< Sequence Number, valid number: 1-16 + uint8_t seqId; //!< Sequence Index, valid number: 0-15 + uint16_t reserved; +} flexspi_lut_seq_t; + +//!@brief Flash Configuration Command Type +enum +{ + kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc + kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command + kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode + kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode + kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode + kDeviceConfigCmdType_Reset, //!< Reset device command +}; + +//!@brief FlexSPI Memory Configuration Block +typedef struct _FlexSPIConfig +{ + uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL + uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix + uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use + uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 + uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3 + uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3 + uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For + //! Serial NAND, need to refer to datasheet + uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable + uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, + //! Generic configuration, etc. + uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for + //! DPI/QPI/OPI switch or reset command + flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt + //! sequence number, [31:16] Reserved + uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration + uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable + uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe + flexspi_lut_seq_t + configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq + uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use + uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands + uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use + uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more + //! details + uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details + uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal + uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot + //! Chapter for more details + uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot + //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH + uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use + uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1 + uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2 + uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1 + uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2 + uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value + uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value + uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value + uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value + uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command + uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands + uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns + uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31 + uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - + //! busy flag is 0 when flash device is busy + uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences + flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences + uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use +} flexspi_mem_config_t; + +/* */ +#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0 +#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1 +#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2 +#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3 +#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4 +#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5 +#define NOR_CMD_INDEX_DUMMY 6 //!< 6 +#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7 + +#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \ + CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ + 2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ + CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ + 4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \ + CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block +#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ + 14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ + 15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk + +/* + * Serial NOR configuration block + */ +typedef struct _flexspi_nor_config +{ + flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI + uint32_t pageSize; //!< Page size of Serial NOR + uint32_t sectorSize; //!< Sector size of Serial NOR + uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command + uint8_t isUniformBlockSize; //!< Sector/Block size is the same + uint8_t reserved0[2]; //!< Reserved for future use + uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3 + uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command + uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false + uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution + uint32_t blockSize; //!< Block size + uint32_t reserve2[11]; //!< Reserved for future use +} flexspi_nor_config_t; + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif +#endif /* __EVKMIMXRT1064_FLEXSPI_NOR_CONFIG__ */ diff --git a/hw/bsp/mimxrt1064_evk/mimxrt1064_evk.c b/hw/bsp/mimxrt1064_evk/mimxrt1064_evk.c new file mode 100644 index 000000000..a21dcdbfc --- /dev/null +++ b/hw/bsp/mimxrt1064_evk/mimxrt1064_evk.c @@ -0,0 +1,184 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_iomuxc.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 +#define LED_PORT GPIO1 +#define LED_PIN 9 +#define LED_STATE_ON 0 + +// SW8 button +#define BUTTON_PINMUX IOMUXC_SNVS_WAKEUP_GPIO5_IO00 +#define BUTTON_PORT GPIO5 +#define BUTTON_PIN 0 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART1 +#define UART_RX_PINMUX IOMUXC_GPIO_AD_B0_13_LPUART1_RX +#define UART_TX_PINMUX IOMUXC_GPIO_AD_B0_12_LPUART1_TX + +const uint8_t dcd_data[] = { 0x00 }; + +void board_init(void) +{ + // Init clock + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + + // Enable IOCON clock + CLOCK_EnableClock(kCLOCK_Iomuxc); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) +// NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // LED + IOMUXC_SetPinMux( LED_PINMUX, 0U); + IOMUXC_SetPinConfig( LED_PINMUX, 0x10B0U); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(LED_PORT, LED_PIN, &led_config); + board_led_write(true); + + // Button + IOMUXC_SetPinMux( BUTTON_PINMUX, 0U); + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0, kGPIO_IntRisingEdge, }; + GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config); + + // UART + IOMUXC_SetPinMux( UART_TX_PINMUX, 0U); + IOMUXC_SetPinMux( UART_RX_PINMUX, 0U); + IOMUXC_SetPinConfig( UART_TX_PINMUX, 0x10B0u); + IOMUXC_SetPinConfig( UART_RX_PINMUX, 0x10B0u); + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U)); + + //------------- USB0 -------------// + // Clock + CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); + CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + + USBPHY_Type* usb_phy = USBPHY1; + + // Enable PHY support for Low speed device + LS via FS Hub + usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + usb_phy->PWD = 0; + + // TX Timing + uint32_t phytx = usb_phy->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + usb_phy->TX = phytx; + + // USB1 +// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U); +// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U); +} + +//--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB_OTG1_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + +void USB_OTG2_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST + tuh_isr(1); + #endif + + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + tud_isr(1); + #endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + // active low + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t*)buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk index 565532b46..d95aaf056 100644 --- a/hw/bsp/ngx4330/board.mk +++ b/hw/bsp/ngx4330/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ @@ -15,9 +16,6 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/ngx4330.ld -# TODO remove later -SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c - SRC_C += \ $(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \ $(MCU_DIR)/src/chip_18xx_43xx.c \ @@ -32,7 +30,7 @@ INC += \ # For TinyUSB port source VENDOR = nxp -CHIP_FAMILY = lpc18_43 +CHIP_FAMILY = transdimension # For freeRTOS port source FREERTOS_PORT = ARM_CM4 diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c index 669180026..e1bafff8d 100644 --- a/hw/bsp/ngx4330/ngx4330.c +++ b/hw/bsp/ngx4330/ngx4330.c @@ -164,19 +164,19 @@ void board_init(void) #if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); - // Reset controller - LPC_USB0->USBCMD_D |= 0x02; - while( LPC_USB0->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - - LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging - #else // TODO OTG - LPC_USB0->USBMODE_D = USBMODE_DEVICE; - LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; - #endif +// // Reset controller +// LPC_USB0->USBCMD_D |= 0x02; +// while( LPC_USB0->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST +// LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// +// LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging +// #else // TODO OTG +// LPC_USB0->USBMODE_D = USBMODE_DEVICE; +// LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; +// #endif #endif /* USB1 @@ -200,19 +200,19 @@ void board_init(void) #if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - // Reset controller - LPC_USB1->USBCMD_D |= 0x02; - while( LPC_USB1->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - #else // TODO OTG - LPC_USB1->USBMODE_D = USBMODE_DEVICE; - #endif - - // USB1 as fullspeed - LPC_USB1->PORTSC1_D |= (1<<24); +// // Reset controller +// LPC_USB1->USBCMD_D |= 0x02; +// while( LPC_USB1->USBCMD_D & 0x02 ) {} +// +// // Set mode +// #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST +// LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); +// #else // TODO OTG +// LPC_USB1->USBMODE_D = USBMODE_DEVICE; +// #endif +// +// // USB1 as fullspeed +// LPC_USB1->PORTSC1_D |= (1<<24); // Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */ // Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */ @@ -220,6 +220,31 @@ void board_init(void) } //--------------------------------------------------------------------+ +// USB Interrupt Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + tuh_isr(0); + #endif + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + tud_isr(0); + #endif +} + +void USB1_IRQHandler(void) +{ + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST + tuh_isr(1); + #endif + + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + tud_isr(1); + #endif +} + +//--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf52840_mdk_dongle/board.mk index df834f963..b92556002 100644 --- a/hw/bsp/nrf52840_mdk_dongle/board.mk +++ b/hw/bsp/nrf52840_mdk_dongle/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ diff --git a/hw/bsp/pca10056/board.mk b/hw/bsp/pca10056/board.mk index abe0d642c..b4031844e 100644 --- a/hw/bsp/pca10056/board.mk +++ b/hw/bsp/pca10056/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ diff --git a/hw/bsp/pca10059/board.mk b/hw/bsp/pca10059/board.mk index 15801054c..19ec3eaea 100644 --- a/hw/bsp/pca10059/board.mk +++ b/hw/bsp/pca10059/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ diff --git a/hw/bsp/pca10100/board.mk b/hw/bsp/pca10100/board.mk index 97d9aa428..d7ac7ec4f 100644 --- a/hw/bsp/pca10100/board.mk +++ b/hw/bsp/pca10100/board.mk @@ -1,4 +1,5 @@ CFLAGS += \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ diff --git a/hw/bsp/pyboardv11/board.mk b/hw/bsp/pyboardv11/board.mk index ef9777976..0118b54a4 100644 --- a/hw/bsp/pyboardv11/board.mk +++ b/hw/bsp/pyboardv11/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=12000000 \ - -DSTM32F405xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32F405xx \ + -DHSE_VALUE=12000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver diff --git a/hw/bsp/spresense/board.mk b/hw/bsp/spresense/board.mk index 16421686a..2e88cf994 100644 --- a/hw/bsp/spresense/board.mk +++ b/hw/bsp/spresense/board.mk @@ -1,12 +1,3 @@ -SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk - -INC += \ - $(SPRESENSE_SDK)/nuttx/include \ - $(SPRESENSE_SDK)/nuttx/arch \ - $(SPRESENSE_SDK)/nuttx/arch/chip \ - $(SPRESENSE_SDK)/sdk/bsp/include \ - $(SPRESENSE_SDK)/sdk/bsp/include/sdk \ - CFLAGS += \ -DCONFIG_WCHAR_BUILTIN \ -DCONFIG_HAVE_DOUBLE \ @@ -23,6 +14,15 @@ CFLAGS += \ -fomit-frame-pointer \ -DCFG_TUSB_MCU=OPT_MCU_CXD56 \ +SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk + +INC += \ + $(SPRESENSE_SDK)/nuttx/include \ + $(SPRESENSE_SDK)/nuttx/arch \ + $(SPRESENSE_SDK)/nuttx/arch/chip \ + $(SPRESENSE_SDK)/sdk/bsp/include \ + $(SPRESENSE_SDK)/sdk/bsp/include/sdk \ + LIBS += \ $(SPRESENSE_SDK)/sdk/libs/libapps.a \ $(SPRESENSE_SDK)/sdk/libs/libsdk.a \ diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index f930f6a85..6e52b8141 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -1,13 +1,14 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F070xB \ - -mthumb \ - -mabi=aapcs-linux \ - -mcpu=cortex-m0 \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F0 + -flto \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m0 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DHSE_VALUE=8000000 \ + -DSTM32F070xB \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F0 # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter @@ -19,21 +20,21 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx LD_FILE = hw/bsp/$(BOARD)/stm32F070rbtx_flash.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_uart.c + $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_uart.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32f072disco/board.mk b/hw/bsp/stm32f072disco/board.mk index 39715e83f..5ed87cfa8 100644 --- a/hw/bsp/stm32f072disco/board.mk +++ b/hw/bsp/stm32f072disco/board.mk @@ -1,13 +1,14 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F072xB \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0 \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F0 + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DSTM32F072xB \ + -DHSE_VALUE=8000000 \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F0 # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter @@ -19,22 +20,22 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx LD_FILE = hw/bsp/$(BOARD)/STM32F072RBTx_FLASH.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c \ - $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_uart.c + $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_uart.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32f103bluepill/board.mk b/hw/bsp/stm32f103bluepill/board.mk index 26ad07b74..f464fa298 100644 --- a/hw/bsp/stm32f103bluepill/board.mk +++ b/hw/bsp/stm32f103bluepill/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F103xB \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F1 + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DSTM32F103xB \ + -DHSE_VALUE=8000000 \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F1 # mcu driver cause following warnings #CFLAGS += -Wno-error=unused-parameter @@ -18,21 +19,21 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F1xx LD_FILE = hw/bsp/$(BOARD)/STM32F103XB_FLASH.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32f1xx.c \ - $(ST_HAL_DRIVER)/Src/stm32f1xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_gpio.c + $(ST_CMSIS)/Source/Templates/system_stm32f1xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f1xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f1xx_hal_gpio.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f207nucleo/board.mk index cd2b26204..003a3dd41 100644 --- a/hw/bsp/stm32f207nucleo/board.mk +++ b/hw/bsp/stm32f207nucleo/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F207xx \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F2 + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DSTM32F207xx \ + -DHSE_VALUE=8000000 \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F2 # mcu driver cause following warnings CFLAGS += -Wno-error=sign-compare @@ -18,21 +19,21 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F2xx LD_FILE = hw/bsp/$(BOARD)/STM32F207ZGTx_FLASH.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32f2xx.c \ - $(ST_HAL_DRIVER)/Src/stm32f2xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_gpio.c + $(ST_CMSIS)/Source/Templates/system_stm32f2xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f2xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f2xx_hal_gpio.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index ab77c55c4..fbe034144 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -1,13 +1,14 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F303xC \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F3 + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles \ + -DSTM32F303xC \ + -DHSE_VALUE=8000000 \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F3 # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter @@ -19,21 +20,21 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx LD_FILE = hw/bsp/$(BOARD)/STM32F303VCTx_FLASH.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32f3xx.c \ - $(ST_HAL_DRIVER)/Src/stm32f3xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_gpio.c + $(ST_CMSIS)/Source/Templates/system_stm32f3xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_gpio.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32f407disco/board.mk b/hw/bsp/stm32f407disco/board.mk index 4f4c10091..216b51bf9 100644 --- a/hw/bsp/stm32f407disco/board.mk +++ b/hw/bsp/stm32f407disco/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F407xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32F407xx \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver diff --git a/hw/bsp/stm32f411disco/board.mk b/hw/bsp/stm32f411disco/board.mk index dcfee33cf..63aa76154 100644 --- a/hw/bsp/stm32f411disco/board.mk +++ b/hw/bsp/stm32f411disco/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F411xE \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32F411xE \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver diff --git a/hw/bsp/stm32f412disco/board.mk b/hw/bsp/stm32f412disco/board.mk index e059c81d1..ddb8402ec 100644 --- a/hw/bsp/stm32f412disco/board.mk +++ b/hw/bsp/stm32f412disco/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F412Zx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32F412Zx \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 # mcu driver cause following warnings diff --git a/hw/bsp/stm32f767nucleo/board.mk b/hw/bsp/stm32f767nucleo/board.mk index 46023334c..5d9645379 100644 --- a/hw/bsp/stm32f767nucleo/board.mk +++ b/hw/bsp/stm32f767nucleo/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32F767xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m7 \ -mfloat-abi=hard \ -mfpu=fpv5-d16 \ -nostdlib -nostartfiles \ + -DSTM32F767xx \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32F7 # mcu driver cause following warnings diff --git a/hw/bsp/stm32h743nucleo/board.mk b/hw/bsp/stm32h743nucleo/board.mk index 40b36413f..cfea7f57b 100644 --- a/hw/bsp/stm32h743nucleo/board.mk +++ b/hw/bsp/stm32h743nucleo/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32H743xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m7 \ -mfloat-abi=hard \ -mfpu=fpv5-d16 \ -nostdlib -nostartfiles \ + -DSTM32H743xx \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32H7 # mcu driver cause following warnings diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk index 7e11fa6cd..d81b2d887 100644 --- a/hw/bsp/stm32l0538disco/board.mk +++ b/hw/bsp/stm32l0538disco/board.mk @@ -1,13 +1,14 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32L053xx \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -mfloat-abi=soft \ - -nostdlib -nostartfiles \ - -DCFG_EXAMPLE_MSC_READONLY \ - -DCFG_TUSB_MCU=OPT_MCU_STM32L0 + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DSTM32L053xx \ + -DHSE_VALUE=8000000 \ + -DCFG_EXAMPLE_MSC_READONLY \ + -DCFG_TUSB_MCU=OPT_MCU_STM32L0 # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized @@ -19,21 +20,21 @@ ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32L0xx LD_FILE = hw/bsp/$(BOARD)/STM32L053C8Tx_FLASH.ld SRC_C += \ - $(ST_CMSIS)/Source/Templates/system_stm32l0xx.c \ - $(ST_HAL_DRIVER)/Src/stm32l0xx_hal.c \ - $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_cortex.c \ - $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_gpio.c + $(ST_CMSIS)/Source/Templates/system_stm32l0xx.c \ + $(ST_HAL_DRIVER)/Src/stm32l0xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32l0xx_hal_gpio.c SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s INC += \ - $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ - $(TOP)/$(ST_CMSIS)/Include \ - $(TOP)/$(ST_HAL_DRIVER)/Inc \ - $(TOP)/hw/bsp/$(BOARD) + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) # For TinyUSB port source VENDOR = st diff --git a/hw/bsp/stm32l476disco/board.mk b/hw/bsp/stm32l476disco/board.mk index c987fea64..3432ac2e5 100644 --- a/hw/bsp/stm32l476disco/board.mk +++ b/hw/bsp/stm32l476disco/board.mk @@ -1,12 +1,13 @@ CFLAGS += \ - -DHSE_VALUE=8000000 \ - -DSTM32L476xx \ + -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ + -DSTM32L476xx \ + -DHSE_VALUE=8000000 \ -DCFG_TUSB_MCU=OPT_MCU_STM32L4 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32L4xx_HAL_Driver |