Merge pull request #3137 from HiFiPhile/uac_simplify

uac2: remove support fifo

2 files changed, 45 insertions, 23 deletions

diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
index c7d809717..751df2251 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
@@ -55,9 +55,45 @@
 
 // Enable UART serial communication with the ST-Link
 #define UART_DEV              USART2
+#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF1_USART2
 #define UART_TX_PIN           GPIO_PIN_2
 #define UART_RX_PIN           GPIO_PIN_3
 
+static inline void board_clock_init(void) {
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+
+  /* -1- Enable HSIUSB48  Oscillator */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /* -2- Initializes the CPU, AHB and APB buses clocks */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSIUSB48;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
+
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
+
+
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  // Configures CRS
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+  RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+  RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+  RCC_CRSInitStruct.ErrorLimitValue = 34;
+  RCC_CRSInitStruct.HSI48CalibrationValue = 32;
+
+  HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+}
+
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index ace3f2a71..09704b527 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -53,31 +53,16 @@ UART_HandleTypeDef UartHandle;
 
 void board_init(void) {
   HAL_Init();
-
-  // Enable the HSIUSB48 48 MHz oscillator.
-  RCC->CR |= RCC_CR_HSIUSB48ON;
-
-  // Wait for HSIUSB48 to be ready.
-  while (!(RCC->CR & RCC_CR_HSIUSB48RDY)) { }
-
-  // Change the SYSCLK source to HSIUSB48.
-  RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW) | RCC_SYSCLKSOURCE_HSIUSB48;
-
-  // Wait for the SYSCLK source to change.
-  while ((RCC->CFGR & RCC_CFGR_SWS) >> RCC_CFGR_SWS_Pos != RCC_SYSCLKSOURCE_HSIUSB48) { }
-
-  // Disable HSI48 to save power.
-  RCC->CR &= ~RCC_CR_HSION;
+  board_clock_init();
 
   // Enable peripheral clocks.
-  RCC->APBENR1 = RCC_APBENR1_USBEN | RCC_APBENR1_CRSEN | RCC_APBENR1_USART2EN;
-  RCC->APBENR2 = RCC_APBENR2_USART1EN;
-
-  // Enable all GPIO clocks.
-  RCC->IOPENR = 0x2F;
-
-  // Turn on CRS to make the HSIUSB48 clock more precise when USB is connected.
-  CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN;
+  __HAL_RCC_USB_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -109,6 +94,7 @@ void board_init(void) {
   }
 
 #ifdef UART_DEV
+  UART_CLK_EN();
   // UART
   {
     GPIO_InitTypeDef gpio_init = { 0 };