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authorhathach <[email protected]>2025-06-12 21:20:49 +0700
committerhathach <[email protected]>2025-06-12 21:20:49 +0700
commit7d66a3e7758665138f495b5d9174c1874332ce1a (patch)
tree4a42611449e2adcf33c0947b6c8074a83cfb3edc /src/common
parent2e231a7517180a486211681127891d41cdbd48ee (diff)
merge n6 and h7rs (same config)
Diffstat (limited to 'src/common')
-rw-r--r--src/common/tusb_mcu.h11
1 files changed, 1 insertions, 10 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 027446a85..2ee2132bf 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -312,7 +312,7 @@
#define TUP_USBIP_FSDEV_STM32
#define TUP_DCD_ENDPOINT_MAX 8
-#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS)
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
@@ -322,15 +322,6 @@
// MCU with on-chip HS Phy
#define TUP_RHPORT_HIGHSPEED 1
-#elif TU_CHECK_MCU(OPT_MCU_STM32N6)
- #define TUP_USBIP_DWC2
- #define TUP_USBIP_DWC2_STM32
-
- #define TUP_DCD_ENDPOINT_MAX 9
-
- // MCU with on-chip HS Phy
- #define TUP_RHPORT_HIGHSPEED 2
-
//--------------------------------------------------------------------+
// Sony
//--------------------------------------------------------------------+